Lines Matching +full:inactive +full:- +full:delay

1 /* SPDX-License-Identifier: GPL-2.0 */
4  * simple SPI master driver.  Two do polled word-at-a-time I/O:
6  *   -	GPIO/parport bitbangers.  Provide chipselect() and txrx_word[](),
7  *	expanding the per-word routines from the inline templates below.
9  *   -	Drivers for controllers resembling bare shift registers.  Provide
15  *   -	Drivers leveraging smarter hardware, with fifos or DMA; or for half
36  * A non-inlined routine would call bitbang_txrx_*() routines.  The
38  * especially if the delay is a NOP (to run at peak speed).
55 	u32 oldbit = (!(word & (1<<(bits-1)))) << 31;  in bitbang_txrx_be_cpha0()
56 	/* clock starts at inactive polarity */  in bitbang_txrx_be_cpha0()
57 	for (word <<= (32 - bits); likely(bits); bits--) {  in bitbang_txrx_be_cpha0()
87 	u32 oldbit = (!(word & (1<<(bits-1)))) << 31;  in bitbang_txrx_be_cpha1()
88 	/* clock starts at inactive polarity */  in bitbang_txrx_be_cpha1()
89 	for (word <<= (32 - bits); likely(bits); bits--) {  in bitbang_txrx_be_cpha1()
119 	u8 rxbit = bits - 1;  in bitbang_txrx_le_cpha0()
121 	/* clock starts at inactive polarity */  in bitbang_txrx_le_cpha0()
122 	for (; likely(bits); bits--) {  in bitbang_txrx_le_cpha0()
152 	u8 rxbit = bits - 1;  in bitbang_txrx_le_cpha1()
154 	/* clock starts at inactive polarity */  in bitbang_txrx_le_cpha1()
155 	for (; likely(bits); bits--) {  in bitbang_txrx_le_cpha1()