Lines Matching defs:spifc
113 static int amlogic_spifc_a1_request(struct amlogic_spifc_a1 *spifc, bool read)
120 spifc->base + SPIFC_A1_USER_CTRL0_REG);
122 return readl_poll_timeout(spifc->base + SPIFC_A1_USER_CTRL0_REG,
127 static void amlogic_spifc_a1_drain_buffer(struct amlogic_spifc_a1 *spifc,
135 spifc->base + SPIFC_A1_DBUF_CTRL_REG);
136 ioread32_rep(spifc->base + SPIFC_A1_DBUF_DATA_REG, buf, count);
139 data = readl(spifc->base + SPIFC_A1_DBUF_DATA_REG);
144 static void amlogic_spifc_a1_fill_buffer(struct amlogic_spifc_a1 *spifc,
152 spifc->base + SPIFC_A1_DBUF_CTRL_REG);
153 iowrite32_rep(spifc->base + SPIFC_A1_DBUF_DATA_REG, buf, count);
157 writel(data, spifc->base + SPIFC_A1_DBUF_DATA_REG);
161 static void amlogic_spifc_a1_user_init(struct amlogic_spifc_a1 *spifc)
163 writel(0, spifc->base + SPIFC_A1_USER_CTRL0_REG);
164 writel(0, spifc->base + SPIFC_A1_USER_CTRL1_REG);
165 writel(0, spifc->base + SPIFC_A1_USER_CTRL2_REG);
166 writel(0, spifc->base + SPIFC_A1_USER_CTRL3_REG);
169 static void amlogic_spifc_a1_set_cmd(struct amlogic_spifc_a1 *spifc,
174 val = readl(spifc->base + SPIFC_A1_USER_CTRL1_REG);
177 writel(val, spifc->base + SPIFC_A1_USER_CTRL1_REG);
180 static void amlogic_spifc_a1_set_addr(struct amlogic_spifc_a1 *spifc, u32 addr,
185 writel(addr, spifc->base + SPIFC_A1_USER_ADDR_REG);
187 val = readl(spifc->base + SPIFC_A1_USER_CTRL1_REG);
190 writel(val, spifc->base + SPIFC_A1_USER_CTRL1_REG);
193 static void amlogic_spifc_a1_set_dummy(struct amlogic_spifc_a1 *spifc,
196 u32 val = readl(spifc->base + SPIFC_A1_USER_CTRL2_REG);
200 writel(val, spifc->base + SPIFC_A1_USER_CTRL2_REG);
203 static int amlogic_spifc_a1_read(struct amlogic_spifc_a1 *spifc, void *buf,
206 u32 val = readl(spifc->base + SPIFC_A1_USER_CTRL3_REG);
213 writel(val, spifc->base + SPIFC_A1_USER_CTRL3_REG);
215 ret = amlogic_spifc_a1_request(spifc, true);
217 amlogic_spifc_a1_drain_buffer(spifc, buf, size);
222 static int amlogic_spifc_a1_write(struct amlogic_spifc_a1 *spifc,
227 amlogic_spifc_a1_fill_buffer(spifc, buf, size);
229 val = readl(spifc->base + SPIFC_A1_USER_CTRL1_REG);
234 writel(val, spifc->base + SPIFC_A1_USER_CTRL1_REG);
236 return amlogic_spifc_a1_request(spifc, false);
239 static int amlogic_spifc_a1_set_freq(struct amlogic_spifc_a1 *spifc, u32 freq)
243 if (freq == spifc->curr_speed_hz)
246 ret = clk_set_rate(spifc->clk, freq);
250 spifc->curr_speed_hz = freq;
257 struct amlogic_spifc_a1 *spifc =
262 ret = amlogic_spifc_a1_set_freq(spifc, op->max_freq);
266 amlogic_spifc_a1_user_init(spifc);
267 amlogic_spifc_a1_set_cmd(spifc, SPIFC_A1_USER_CMD(op));
270 amlogic_spifc_a1_set_addr(spifc, op->addr.val,
274 amlogic_spifc_a1_set_dummy(spifc, SPIFC_A1_USER_DUMMY(op));
279 writel(0, spifc->base + SPIFC_A1_USER_DBUF_ADDR_REG);
282 ret = amlogic_spifc_a1_read(spifc, op->data.buf.in,
285 ret = amlogic_spifc_a1_write(spifc, op->data.buf.out,
288 ret = amlogic_spifc_a1_request(spifc, false);
301 static void amlogic_spifc_a1_hw_init(struct amlogic_spifc_a1 *spifc)
305 regv = readl(spifc->base + SPIFC_A1_AHB_REQ_CTRL_REG);
307 writel(regv, spifc->base + SPIFC_A1_AHB_REQ_CTRL_REG);
309 regv = readl(spifc->base + SPIFC_A1_AHB_CTRL_REG);
311 writel(regv, spifc->base + SPIFC_A1_AHB_CTRL_REG);
313 writel(SPIFC_A1_ACTIMING0_VAL, spifc->base + SPIFC_A1_ACTIMING0_REG);
315 writel(0, spifc->base + SPIFC_A1_USER_DBUF_ADDR_REG);
330 struct amlogic_spifc_a1 *spifc;
333 ctrl = devm_spi_alloc_host(&pdev->dev, sizeof(*spifc));
337 spifc = spi_controller_get_devdata(ctrl);
338 platform_set_drvdata(pdev, spifc);
340 spifc->dev = &pdev->dev;
341 spifc->ctrl = ctrl;
343 spifc->base = devm_platform_ioremap_resource(pdev, 0);
344 if (IS_ERR(spifc->base))
345 return PTR_ERR(spifc->base);
347 spifc->clk = devm_clk_get_enabled(spifc->dev, NULL);
348 if (IS_ERR(spifc->clk))
349 return dev_err_probe(spifc->dev, PTR_ERR(spifc->clk),
352 amlogic_spifc_a1_hw_init(spifc);
354 pm_runtime_set_autosuspend_delay(spifc->dev, 500);
355 pm_runtime_use_autosuspend(spifc->dev);
356 devm_pm_runtime_enable(spifc->dev);
369 ret = devm_spi_register_controller(spifc->dev, ctrl);
371 return dev_err_probe(spifc->dev, ret,
380 struct amlogic_spifc_a1 *spifc = dev_get_drvdata(dev);
383 ret = spi_controller_suspend(spifc->ctrl);
388 clk_disable_unprepare(spifc->clk);
395 struct amlogic_spifc_a1 *spifc = dev_get_drvdata(dev);
399 ret = clk_prepare_enable(spifc->clk);
404 amlogic_spifc_a1_hw_init(spifc);
406 ret = spi_controller_resume(spifc->ctrl);
408 clk_disable_unprepare(spifc->clk);
417 struct amlogic_spifc_a1 *spifc = dev_get_drvdata(dev);
419 clk_disable_unprepare(spifc->clk);
426 struct amlogic_spifc_a1 *spifc = dev_get_drvdata(dev);
429 ret = clk_prepare_enable(spifc->clk);
431 amlogic_spifc_a1_hw_init(spifc);
447 { .compatible = "amlogic,a1-spifc", },
456 .name = "amlogic-spifc-a1",