1 // SPDX-License-Identifier: GPL-2.0-only
4  * memory from OCMEM based on performance, latency and power requirements.
6  * some Snapdragon SoCs.
104 	writel(data, ocmem->mmio + reg);  in ocmem_write()
109 	return readl(ocmem->mmio + reg);  in ocmem_read()
118 		for (i = 0; i < ocmem->config->num_regions; i++) {  in update_ocmem()
119 			struct ocmem_region *region = &ocmem->regions[i];  in update_ocmem()
121 			if (region->mode == THIN_MODE)  in update_ocmem()
125 		dev_dbg(ocmem->dev, "ocmem_region_mode_control %x\n",  in update_ocmem()
130 	for (i = 0; i < ocmem->config->num_regions; i++) {  in update_ocmem()
131 		struct ocmem_region *region = &ocmem->regions[i];  in update_ocmem()
134 		data = OCMEM_PSGSC_CTL_MACRO0_MODE(region->macro_state[0]) |  in update_ocmem()
135 			OCMEM_PSGSC_CTL_MACRO1_MODE(region->macro_state[1]) |  in update_ocmem()
136 			OCMEM_PSGSC_CTL_MACRO2_MODE(region->macro_state[2]) |  in update_ocmem()
137 			OCMEM_PSGSC_CTL_MACRO3_MODE(region->macro_state[3]);  in update_ocmem()
146 	if (addr < ocmem->memory->start || addr >= ocmem->memory->end)  in phys_to_offset()
149 	return addr - ocmem->memory->start;  in phys_to_offset()
168 	for (i = 0; i < ocmem->config->num_regions; i++) {  in update_range()
169 		struct ocmem_region *region = &ocmem->regions[i];  in update_range()
171 		if (buf->offset <= offset && offset < buf->offset + buf->len)  in update_range()
172 			region->mode = rmode;  in update_range()
174 		for (j = 0; j < region->num_macros; j++) {  in update_range()
175 			if (buf->offset <= offset &&  in update_range()
176 			    offset < buf->offset + buf->len)  in update_range()
177 				region->macro_state[j] = mstate;  in update_range()
179 			offset += region->macro_size;  in update_range()
191 	struct device_node *devnode __free(device_node) = of_parse_phandle(dev->of_node,  in of_get_ocmem()
193 	if (!devnode || !devnode->parent) {  in of_get_ocmem()
195 		return ERR_PTR(-ENODEV);  in of_get_ocmem()
198 	pdev = of_find_device_by_node(devnode->parent);  in of_get_ocmem()
200 		dev_err(dev, "Cannot find device node %s\n", devnode->name);  in of_get_ocmem()
201 		return ERR_PTR(-EPROBE_DEFER);  in of_get_ocmem()
207 		put_device(&pdev->dev);  in of_get_ocmem()
208 		return ERR_PTR(-ENODEV);  in of_get_ocmem()
221 		return ERR_PTR(-ENODEV);  in ocmem_allocate()
224 		return ERR_PTR(-EINVAL);  in ocmem_allocate()
226 	if (test_and_set_bit_lock(BIT(client), &ocmem->active_allocations))  in ocmem_allocate()
227 		return ERR_PTR(-EBUSY);  in ocmem_allocate()
231 		ret = -ENOMEM;  in ocmem_allocate()
235 	buf->offset = 0;  in ocmem_allocate()
236 	buf->addr = device_address(ocmem, client, buf->offset);  in ocmem_allocate()
237 	buf->len = size;  in ocmem_allocate()
243 					  buf->offset, buf->len, WIDE_MODE);  in ocmem_allocate()
245 			dev_err(ocmem->dev, "could not lock: %d\n", ret);  in ocmem_allocate()
246 			ret = -EINVAL;  in ocmem_allocate()
250 		ocmem_write(ocmem, OCMEM_REG_GFX_MPU_START, buf->offset);  in ocmem_allocate()
252 			    buf->offset + buf->len);  in ocmem_allocate()
255 	dev_dbg(ocmem->dev, "using %ldK of OCMEM at 0x%08lx for client %d\n",  in ocmem_allocate()
256 		size / 1024, buf->addr, client);  in ocmem_allocate()
261 	clear_bit_unlock(BIT(client), &ocmem->active_allocations);  in ocmem_allocate()
280 					    buf->offset, buf->len);  in ocmem_free()
282 			dev_err(ocmem->dev, "could not unlock: %d\n", ret);  in ocmem_free()
290 	clear_bit_unlock(BIT(client), &ocmem->active_allocations);  in ocmem_free()
296 	struct device *dev = &pdev->dev;  in ocmem_dev_probe()
302 		return -EPROBE_DEFER;  in ocmem_dev_probe()
306 		return -ENOMEM;  in ocmem_dev_probe()
308 	ocmem->dev = dev;  in ocmem_dev_probe()
309 	ocmem->config = device_get_match_data(dev);  in ocmem_dev_probe()
311 	ocmem->core_clk = devm_clk_get(dev, "core");  in ocmem_dev_probe()
312 	if (IS_ERR(ocmem->core_clk))  in ocmem_dev_probe()
313 		return dev_err_probe(dev, PTR_ERR(ocmem->core_clk),  in ocmem_dev_probe()
316 	ocmem->iface_clk = devm_clk_get_optional(dev, "iface");  in ocmem_dev_probe()
317 	if (IS_ERR(ocmem->iface_clk))  in ocmem_dev_probe()
318 		return dev_err_probe(dev, PTR_ERR(ocmem->iface_clk),  in ocmem_dev_probe()
321 	ocmem->mmio = devm_platform_ioremap_resource_byname(pdev, "ctrl");  in ocmem_dev_probe()
322 	if (IS_ERR(ocmem->mmio))  in ocmem_dev_probe()
323 		return dev_err_probe(&pdev->dev, PTR_ERR(ocmem->mmio),  in ocmem_dev_probe()
326 	ocmem->memory = platform_get_resource_byname(pdev, IORESOURCE_MEM,  in ocmem_dev_probe()
328 	if (!ocmem->memory) {  in ocmem_dev_probe()
330 		return -ENXIO;  in ocmem_dev_probe()
334 	WARN_ON(clk_set_rate(ocmem->core_clk, 1000) < 0);  in ocmem_dev_probe()
336 	ret = clk_prepare_enable(ocmem->core_clk);  in ocmem_dev_probe()
338 		return dev_err_probe(ocmem->dev, ret, "Failed to enable core clock\n");  in ocmem_dev_probe()
340 	ret = clk_prepare_enable(ocmem->iface_clk);  in ocmem_dev_probe()
342 		clk_disable_unprepare(ocmem->core_clk);  in ocmem_dev_probe()
343 		return dev_err_probe(ocmem->dev, ret, "Failed to enable iface clock\n");  in ocmem_dev_probe()
362 	ocmem->num_ports = OCMEM_HW_PROFILE_NUM_PORTS(reg);  in ocmem_dev_probe()
363 	ocmem->num_macros = OCMEM_HW_PROFILE_NUM_MACROS(reg);  in ocmem_dev_probe()
364 	ocmem->interleaved = !!(reg & OCMEM_HW_PROFILE_INTERLEAVING);  in ocmem_dev_probe()
366 	num_banks = ocmem->num_ports / 2;  in ocmem_dev_probe()
367 	region_size = ocmem->config->macro_size * num_banks;  in ocmem_dev_probe()
370 		 ocmem->num_ports, ocmem->config->num_regions,  in ocmem_dev_probe()
371 		 ocmem->num_macros, ocmem->interleaved ? "" : "not ");  in ocmem_dev_probe()
373 	ocmem->regions = devm_kcalloc(dev, ocmem->config->num_regions,  in ocmem_dev_probe()
375 	if (!ocmem->regions) {  in ocmem_dev_probe()
376 		ret = -ENOMEM;  in ocmem_dev_probe()
380 	for (i = 0; i < ocmem->config->num_regions; i++) {  in ocmem_dev_probe()
381 		struct ocmem_region *region = &ocmem->regions[i];  in ocmem_dev_probe()
383 		if (WARN_ON(num_banks > ARRAY_SIZE(region->macro_state))) {  in ocmem_dev_probe()
384 			ret = -EINVAL;  in ocmem_dev_probe()
388 		region->mode = MODE_DEFAULT;  in ocmem_dev_probe()
389 		region->num_macros = num_banks;  in ocmem_dev_probe()
391 		if (i == (ocmem->config->num_regions - 1) &&  in ocmem_dev_probe()
393 			region->macro_size = ocmem->config->macro_size / 2;  in ocmem_dev_probe()
394 			region->region_size = region_size / 2;  in ocmem_dev_probe()
396 			region->macro_size = ocmem->config->macro_size;  in ocmem_dev_probe()
397 			region->region_size = region_size;  in ocmem_dev_probe()
400 		for (j = 0; j < ARRAY_SIZE(region->macro_state); j++)  in ocmem_dev_probe()
401 			region->macro_state[j] = CLK_OFF;  in ocmem_dev_probe()
409 	clk_disable_unprepare(ocmem->core_clk);  in ocmem_dev_probe()
410 	clk_disable_unprepare(ocmem->iface_clk);  in ocmem_dev_probe()
418 	clk_disable_unprepare(ocmem->core_clk);  in ocmem_dev_remove()
419 	clk_disable_unprepare(ocmem->iface_clk);  in ocmem_dev_remove()
433 	{ .compatible = "qcom,msm8226-ocmem", .data = &ocmem_8226_config },
434 	{ .compatible = "qcom,msm8974-ocmem", .data = &ocmem_8974_config },
451 MODULE_DESCRIPTION("On Chip Memory (OCMEM) allocator for some Snapdragon SoCs");