3  * Qualcomm ICE (Inline Crypto Engine) support.
22 #include <soc/qcom/ice.h>
27 /* QCOM ICE registers */
59 /* QCOM ICE HWKM (Hardware Key Manager) registers */
102 static bool qcom_ice_check_supported(struct qcom_ice *ice)  in qcom_ice_check_supported()  argument
104 	u32 regval = qcom_ice_readl(ice, QCOM_ICE_REG_VERSION);  in qcom_ice_check_supported()
105 	struct device *dev = ice->dev;  in qcom_ice_check_supported()
110 	/* For now this driver only supports ICE version 3 and 4. */  in qcom_ice_check_supported()
112 		dev_warn(dev, "Unsupported ICE version: v%d.%d.%d\n",  in qcom_ice_check_supported()
117 	dev_info(dev, "Found QC Inline Crypto Engine (ICE) v%d.%d.%d\n",  in qcom_ice_check_supported()
120 	/* If fuses are blown, ICE might not work in the standard way. */  in qcom_ice_check_supported()
121 	regval = qcom_ice_readl(ice, QCOM_ICE_REG_FUSE_SETTING);  in qcom_ice_check_supported()
125 		dev_warn(dev, "Fuses are blown; ICE is unusable!\n");  in qcom_ice_check_supported()
130 	 * Check for HWKM support and decide whether to use it or not.  ICE  in qcom_ice_check_supported()
131 	 * v3.2.1 and later have HWKM v2.  ICE v3.2.0 has HWKM v1.  Earlier ICE  in qcom_ice_check_supported()
140 	 * ICE-capable storage driver(s) need to know early on whether to  in qcom_ice_check_supported()
149 			ice->use_hwkm = true;  in qcom_ice_check_supported()
161 static void qcom_ice_low_power_mode_enable(struct qcom_ice *ice)  in qcom_ice_low_power_mode_enable()  argument
165 	regval = qcom_ice_readl(ice, QCOM_ICE_REG_ADVANCED_CONTROL);  in qcom_ice_low_power_mode_enable()
169 	qcom_ice_writel(ice, regval, QCOM_ICE_REG_ADVANCED_CONTROL);  in qcom_ice_low_power_mode_enable()
172 static void qcom_ice_optimization_enable(struct qcom_ice *ice)  in qcom_ice_optimization_enable()  argument
176 	/* ICE Optimizations Enable Sequence */  in qcom_ice_optimization_enable()
177 	regval = qcom_ice_readl(ice, QCOM_ICE_REG_ADVANCED_CONTROL);  in qcom_ice_optimization_enable()
179 	/* ICE HPG requires delay before writing */  in qcom_ice_optimization_enable()
181 	qcom_ice_writel(ice, regval, QCOM_ICE_REG_ADVANCED_CONTROL);  in qcom_ice_optimization_enable()
186  * Wait until the ICE BIST (built-in self-test) has completed.
188  * This may be necessary before ICE can be used.
192  * practice, (b) ICE is documented to reject crypto requests if the BIST
197 static int qcom_ice_wait_bist_status(struct qcom_ice *ice)  in qcom_ice_wait_bist_status()  argument
202 	err = readl_poll_timeout(ice->base + QCOM_ICE_REG_BIST_STATUS,  in qcom_ice_wait_bist_status()
206 		dev_err(ice->dev, "Timed out waiting for ICE self-test to complete\n");  in qcom_ice_wait_bist_status()
210 	if (ice->use_hwkm &&  in qcom_ice_wait_bist_status()
211 	    qcom_ice_readl(ice, QCOM_ICE_REG_HWKM_TZ_KM_STATUS) !=  in qcom_ice_wait_bist_status()
217 		dev_err(ice->dev, "HWKM self-test error!\n");  in qcom_ice_wait_bist_status()
226 static void qcom_ice_hwkm_init(struct qcom_ice *ice)  in qcom_ice_hwkm_init()  argument
230 	if (!ice->use_hwkm)  in qcom_ice_hwkm_init()
236 	 * When ICE is in HWKM mode, it only supports wrapped keys.  in qcom_ice_hwkm_init()
237 	 * When ICE is in legacy mode, it only supports raw keys.  in qcom_ice_hwkm_init()
239 	 * Put ICE in HWKM mode.  ICE defaults to legacy mode.  in qcom_ice_hwkm_init()
241 	regval = qcom_ice_readl(ice, QCOM_ICE_REG_CONTROL);  in qcom_ice_hwkm_init()
243 	qcom_ice_writel(ice, regval, QCOM_ICE_REG_CONTROL);  in qcom_ice_hwkm_init()
246 	qcom_ice_writel(ice, QCOM_ICE_HWKM_DISABLE_CRC_CHECKS_VAL,  in qcom_ice_hwkm_init()
250 	 * Allow the HWKM slave to read and write the keyslots in the ICE HWKM  in qcom_ice_hwkm_init()
251 	 * slave.  Without this, TrustZone cannot program keys into ICE.  in qcom_ice_hwkm_init()
253 	qcom_ice_writel(ice, GENMASK(31, 0), QCOM_ICE_REG_HWKM_BANK0_BBAC_0);  in qcom_ice_hwkm_init()
254 	qcom_ice_writel(ice, GENMASK(31, 0), QCOM_ICE_REG_HWKM_BANK0_BBAC_1);  in qcom_ice_hwkm_init()
255 	qcom_ice_writel(ice, GENMASK(31, 0), QCOM_ICE_REG_HWKM_BANK0_BBAC_2);  in qcom_ice_hwkm_init()
256 	qcom_ice_writel(ice, GENMASK(31, 0), QCOM_ICE_REG_HWKM_BANK0_BBAC_3);  in qcom_ice_hwkm_init()
257 	qcom_ice_writel(ice, GENMASK(31, 0), QCOM_ICE_REG_HWKM_BANK0_BBAC_4);  in qcom_ice_hwkm_init()
260 	qcom_ice_writel(ice, QCOM_ICE_HWKM_RSP_FIFO_CLEAR_VAL,  in qcom_ice_hwkm_init()
262 	ice->hwkm_init_complete = true;  in qcom_ice_hwkm_init()
265 int qcom_ice_enable(struct qcom_ice *ice)  in qcom_ice_enable()  argument
267 	qcom_ice_low_power_mode_enable(ice);  in qcom_ice_enable()
268 	qcom_ice_optimization_enable(ice);  in qcom_ice_enable()
269 	qcom_ice_hwkm_init(ice);  in qcom_ice_enable()
270 	return qcom_ice_wait_bist_status(ice);  in qcom_ice_enable()
274 int qcom_ice_resume(struct qcom_ice *ice)  in qcom_ice_resume()  argument
276 	struct device *dev = ice->dev;  in qcom_ice_resume()
279 	err = clk_prepare_enable(ice->core_clk);  in qcom_ice_resume()
285 	qcom_ice_hwkm_init(ice);  in qcom_ice_resume()
286 	return qcom_ice_wait_bist_status(ice);  in qcom_ice_resume()
290 int qcom_ice_suspend(struct qcom_ice *ice)  in qcom_ice_suspend()  argument
292 	clk_disable_unprepare(ice->core_clk);  in qcom_ice_suspend()
293 	ice->hwkm_init_complete = false;  in qcom_ice_suspend()
299 static unsigned int translate_hwkm_slot(struct qcom_ice *ice, unsigned int slot)  in translate_hwkm_slot()  argument
304 static int qcom_ice_program_wrapped_key(struct qcom_ice *ice, unsigned int slot,  in qcom_ice_program_wrapped_key()  argument
307 	struct device *dev = ice->dev;  in qcom_ice_program_wrapped_key()
315 	if (!ice->use_hwkm) {  in qcom_ice_program_wrapped_key()
319 	if (!ice->hwkm_init_complete) {  in qcom_ice_program_wrapped_key()
325 	qcom_ice_writel(ice, 0x0, QCOM_ICE_REG_CRYPTOCFG(slot));  in qcom_ice_program_wrapped_key()
328 	err = qcom_scm_ice_set_key(translate_hwkm_slot(ice, slot), bkey->bytes,  in qcom_ice_program_wrapped_key()
338 	qcom_ice_writel(ice, le32_to_cpu(cfg.regval),  in qcom_ice_program_wrapped_key()
343 int qcom_ice_program_key(struct qcom_ice *ice, unsigned int slot,  in qcom_ice_program_key()  argument
346 	struct device *dev = ice->dev;  in qcom_ice_program_key()
363 		return qcom_ice_program_wrapped_key(ice, slot, blk_key);  in qcom_ice_program_key()
365 	if (ice->use_hwkm) {  in qcom_ice_program_key()
390 int qcom_ice_evict_key(struct qcom_ice *ice, int slot)  in qcom_ice_evict_key()  argument
392 	if (ice->hwkm_init_complete)  in qcom_ice_evict_key()
393 		slot = translate_hwkm_slot(ice, slot);  in qcom_ice_evict_key()
400  * @ice: ICE driver data
402  * Return: the blk-crypto key type that the ICE driver is configured to use.
403  * This is the key type that ICE-capable storage drivers should advertise as
406 enum blk_crypto_key_type qcom_ice_get_supported_key_type(struct qcom_ice *ice)  in qcom_ice_get_supported_key_type()  argument
408 	if (ice->use_hwkm)  in qcom_ice_get_supported_key_type()
416  * @ice: ICE driver data
427 int qcom_ice_derive_sw_secret(struct qcom_ice *ice,  in qcom_ice_derive_sw_secret()  argument
442  * @ice: ICE driver data
449 int qcom_ice_generate_key(struct qcom_ice *ice,  in qcom_ice_generate_key()  argument
464  * @ice: ICE driver data
474 int qcom_ice_prepare_key(struct qcom_ice *ice,  in qcom_ice_prepare_key()  argument
493  * @ice: ICE driver data
502 int qcom_ice_import_key(struct qcom_ice *ice,  in qcom_ice_import_key()  argument
526 		dev_warn(dev, "ICE SCM interface not found\n");  in qcom_ice_create()
546 		engine->core_clk = devm_clk_get_optional_enabled(dev, "ice");  in qcom_ice_create()
561  * of_qcom_ice_get() - get an ICE instance from a DT node
564  * This function will provide an ICE instance either by creating one for the
565  * consumer device if its DT node provides the 'ice' reg range and the 'ice'
567  * phandle via 'qcom,ice' property to an ICE DT, the ICE instance will already
570  * Return: ICE pointer on success, NULL if there is no ICE data provided by the
576 	struct qcom_ice *ice;  in of_qcom_ice_get()  local
586 	 * to create the ICE instance using the consumer device and the reg  in of_qcom_ice_get()
587 	 * range called 'ice' it provides.  in of_qcom_ice_get()
589 	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ice");  in of_qcom_ice_get()
595 		/* create ICE instance using consumer dev */  in of_qcom_ice_get()
600 	 * If the consumer node does not provider an 'ice' reg range  in of_qcom_ice_get()
602 	 * to the ICE devicetree node, otherwise ICE is not supported.  in of_qcom_ice_get()
605 									"qcom,ice", 0);  in of_qcom_ice_get()
615 	ice = platform_get_drvdata(pdev);  in of_qcom_ice_get()
616 	if (!ice) {  in of_qcom_ice_get()
617 		dev_err(dev, "Cannot get ice instance from %s\n",  in of_qcom_ice_get()
629 		ice = ERR_PTR(-EINVAL);  in of_qcom_ice_get()
632 	return ice;  in of_qcom_ice_get()
635 static void qcom_ice_put(const struct qcom_ice *ice)  in qcom_ice_put()  argument
637 	struct platform_device *pdev = to_platform_device(ice->dev);  in qcom_ice_put()
639 	if (!platform_get_resource_byname(pdev, IORESOURCE_MEM, "ice"))  in qcom_ice_put()
649  * devm_of_qcom_ice_get() - Devres managed helper to get an ICE instance from
653  * This function will provide an ICE instance either by creating one for the
654  * consumer device if its DT node provides the 'ice' reg range and the 'ice'
656  * phandle via 'qcom,ice' property to an ICE DT, the ICE instance will already
659  * Return: ICE pointer on success, NULL if there is no ICE data provided by the
664 	struct qcom_ice *ice, **dr;  in devm_of_qcom_ice_get()  local
670 	ice = of_qcom_ice_get(dev);  in devm_of_qcom_ice_get()
671 	if (!IS_ERR_OR_NULL(ice)) {  in devm_of_qcom_ice_get()
672 		*dr = ice;  in devm_of_qcom_ice_get()
678 	return ice;  in devm_of_qcom_ice_get()
689 		dev_warn(&pdev->dev, "ICE registers not found\n");  in qcom_ice_probe()
711 		.name = "qcom-ice",