1 // SPDX-License-Identifier: GPL-2.0-only
12 #include <linux/soc/mediatek/mtk-mmsys.h>
13 #include <linux/soc/mediatek/mtk-mutex.h>
14 #include <linux/soc/mediatek/mtk-cmdq.h>
814 		if (!mtx->mutex[i].claimed) {  in mtk_mutex_get()
815 			mtx->mutex[i].claimed = true;  in mtk_mutex_get()
816 			return &mtx->mutex[i];  in mtk_mutex_get()
819 	return ERR_PTR(-EBUSY);  in mtk_mutex_get()
826 						 mutex[mutex->id]);  in mtk_mutex_put()
828 	WARN_ON(&mtx->mutex[mutex->id] != mutex);  in mtk_mutex_put()
830 	mutex->claimed = false;  in mtk_mutex_put()
837 						 mutex[mutex->id]);  in mtk_mutex_prepare()
838 	return clk_prepare_enable(mtx->clk);  in mtk_mutex_prepare()
845 						 mutex[mutex->id]);  in mtk_mutex_unprepare()
846 	clk_disable_unprepare(mtx->clk);  in mtk_mutex_unprepare()
854 						 mutex[mutex->id]);  in mtk_mutex_add_comp()
859 	WARN_ON(&mtx->mutex[mutex->id] != mutex);  in mtk_mutex_add_comp()
887 		if (mtx->data->mutex_mod[id] < 32) {  in mtk_mutex_add_comp()
888 			offset = DISP_REG_MUTEX_MOD(mtx->data->mutex_mod_reg,  in mtk_mutex_add_comp()
889 						    mutex->id);  in mtk_mutex_add_comp()
890 			reg = readl_relaxed(mtx->regs + offset);  in mtk_mutex_add_comp()
891 			reg |= 1 << mtx->data->mutex_mod[id];  in mtk_mutex_add_comp()
892 			writel_relaxed(reg, mtx->regs + offset);  in mtk_mutex_add_comp()
894 			offset = DISP_REG_MUTEX_MOD2(mutex->id);  in mtk_mutex_add_comp()
895 			reg = readl_relaxed(mtx->regs + offset);  in mtk_mutex_add_comp()
896 			reg |= 1 << (mtx->data->mutex_mod[id] - 32);  in mtk_mutex_add_comp()
897 			writel_relaxed(reg, mtx->regs + offset);  in mtk_mutex_add_comp()
902 	writel_relaxed(mtx->data->mutex_sof[sof_id],  in mtk_mutex_add_comp()
903 		       mtx->regs +  in mtk_mutex_add_comp()
904 		       DISP_REG_MUTEX_SOF(mtx->data->mutex_sof_reg, mutex->id));  in mtk_mutex_add_comp()
912 						 mutex[mutex->id]);  in mtk_mutex_remove_comp()
916 	WARN_ON(&mtx->mutex[mutex->id] != mutex);  in mtk_mutex_remove_comp()
928 			       mtx->regs +  in mtk_mutex_remove_comp()
929 			       DISP_REG_MUTEX_SOF(mtx->data->mutex_sof_reg,  in mtk_mutex_remove_comp()
930 						  mutex->id));  in mtk_mutex_remove_comp()
933 		if (mtx->data->mutex_mod[id] < 32) {  in mtk_mutex_remove_comp()
934 			offset = DISP_REG_MUTEX_MOD(mtx->data->mutex_mod_reg,  in mtk_mutex_remove_comp()
935 						    mutex->id);  in mtk_mutex_remove_comp()
936 			reg = readl_relaxed(mtx->regs + offset);  in mtk_mutex_remove_comp()
937 			reg &= ~(1 << mtx->data->mutex_mod[id]);  in mtk_mutex_remove_comp()
938 			writel_relaxed(reg, mtx->regs + offset);  in mtk_mutex_remove_comp()
940 			offset = DISP_REG_MUTEX_MOD2(mutex->id);  in mtk_mutex_remove_comp()
941 			reg = readl_relaxed(mtx->regs + offset);  in mtk_mutex_remove_comp()
942 			reg &= ~(1 << (mtx->data->mutex_mod[id] - 32));  in mtk_mutex_remove_comp()
943 			writel_relaxed(reg, mtx->regs + offset);  in mtk_mutex_remove_comp()
953 						 mutex[mutex->id]);  in mtk_mutex_enable()
955 	WARN_ON(&mtx->mutex[mutex->id] != mutex);  in mtk_mutex_enable()
957 	writel(1, mtx->regs + DISP_REG_MUTEX_EN(mutex->id));  in mtk_mutex_enable()
964 						 mutex[mutex->id]);  in mtk_mutex_enable_by_cmdq()
967 	WARN_ON(&mtx->mutex[mutex->id] != mutex);  in mtk_mutex_enable_by_cmdq()
969 	if (!mtx->cmdq_reg.size) {  in mtk_mutex_enable_by_cmdq()
970 		dev_err(mtx->dev, "mediatek,gce-client-reg hasn't been set");  in mtk_mutex_enable_by_cmdq()
971 		return -ENODEV;  in mtk_mutex_enable_by_cmdq()
974 	cmdq_pkt_write(cmdq_pkt, mtx->cmdq_reg.subsys,  in mtk_mutex_enable_by_cmdq()
975 		       mtx->addr + DISP_REG_MUTEX_EN(mutex->id), 1);  in mtk_mutex_enable_by_cmdq()
983 						 mutex[mutex->id]);  in mtk_mutex_disable()
985 	WARN_ON(&mtx->mutex[mutex->id] != mutex);  in mtk_mutex_disable()
987 	writel(0, mtx->regs + DISP_REG_MUTEX_EN(mutex->id));  in mtk_mutex_disable()
994 						 mutex[mutex->id]);  in mtk_mutex_acquire()
997 	writel(1, mtx->regs + DISP_REG_MUTEX_EN(mutex->id));  in mtk_mutex_acquire()
998 	writel(1, mtx->regs + DISP_REG_MUTEX(mutex->id));  in mtk_mutex_acquire()
999 	if (readl_poll_timeout_atomic(mtx->regs + DISP_REG_MUTEX(mutex->id),  in mtk_mutex_acquire()
1001 		pr_err("could not acquire mutex %d\n", mutex->id);  in mtk_mutex_acquire()
1008 						 mutex[mutex->id]);  in mtk_mutex_release()
1010 	writel(0, mtx->regs + DISP_REG_MUTEX(mutex->id));  in mtk_mutex_release()
1018 						 mutex[mutex->id]);  in mtk_mutex_write_mod()
1022 	WARN_ON(&mtx->mutex[mutex->id] != mutex);  in mtk_mutex_write_mod()
1026 		dev_err(mtx->dev, "Not supported MOD table index : %d", idx);  in mtk_mutex_write_mod()
1027 		return -EINVAL;  in mtk_mutex_write_mod()
1032 	 * are present, hence requiring multiple 32-bits registers.  in mtk_mutex_write_mod()
1042 	if (mtx->data->mutex_table_mod[idx] < 32) {  in mtk_mutex_write_mod()
1043 		reg_offset = DISP_REG_MUTEX_MOD(mtx->data->mutex_mod_reg,  in mtk_mutex_write_mod()
1044 						mutex->id);  in mtk_mutex_write_mod()
1046 		reg_offset = DISP_REG_MUTEX_MOD1(mtx->data->mutex_mod_reg,  in mtk_mutex_write_mod()
1047 						 mutex->id);  in mtk_mutex_write_mod()
1051 	reg = readl_relaxed(mtx->regs + reg_offset);  in mtk_mutex_write_mod()
1053 		reg &= ~BIT(mtx->data->mutex_table_mod[idx] - id_offset);  in mtk_mutex_write_mod()
1055 		reg |= BIT(mtx->data->mutex_table_mod[idx] - id_offset);  in mtk_mutex_write_mod()
1057 	writel_relaxed(reg, mtx->regs + reg_offset);  in mtk_mutex_write_mod()
1067 						 mutex[mutex->id]);  in mtk_mutex_write_sof()
1069 	WARN_ON(&mtx->mutex[mutex->id] != mutex);  in mtk_mutex_write_sof()
1073 		dev_err(mtx->dev, "Not supported SOF index : %d", idx);  in mtk_mutex_write_sof()
1074 		return -EINVAL;  in mtk_mutex_write_sof()
1077 	writel_relaxed(idx, mtx->regs +  in mtk_mutex_write_sof()
1078 		       DISP_REG_MUTEX_SOF(mtx->data->mutex_sof_reg, mutex->id));  in mtk_mutex_write_sof()
1086 	struct device *dev = &pdev->dev;  in mtk_mutex_probe()
1093 		return -ENOMEM;  in mtk_mutex_probe()
1096 		mtx->mutex[i].id = i;  in mtk_mutex_probe()
1098 	mtx->data = of_device_get_match_data(dev);  in mtk_mutex_probe()
1100 	if (!mtx->data->no_clk) {  in mtk_mutex_probe()
1101 		mtx->clk = devm_clk_get(dev, NULL);  in mtk_mutex_probe()
1102 		if (IS_ERR(mtx->clk))  in mtk_mutex_probe()
1103 			return dev_err_probe(dev, PTR_ERR(mtx->clk), "Failed to get clock\n");  in mtk_mutex_probe()
1106 	mtx->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &regs);  in mtk_mutex_probe()
1107 	if (IS_ERR(mtx->regs)) {  in mtk_mutex_probe()
1109 		return PTR_ERR(mtx->regs);  in mtk_mutex_probe()
1111 	mtx->addr = regs->start;  in mtk_mutex_probe()
1114 	ret = cmdq_dev_get_client_reg(dev, &mtx->cmdq_reg, 0);  in mtk_mutex_probe()
1116 		dev_dbg(dev, "No mediatek,gce-client-reg!\n");  in mtk_mutex_probe()
1124 	{ .compatible = "mediatek,mt2701-disp-mutex", .data = &mt2701_mutex_driver_data },
1125 	{ .compatible = "mediatek,mt2712-disp-mutex", .data = &mt2712_mutex_driver_data },
1126 	{ .compatible = "mediatek,mt6795-disp-mutex", .data = &mt6795_mutex_driver_data },
1127 	{ .compatible = "mediatek,mt8167-disp-mutex", .data = &mt8167_mutex_driver_data },
1128 	{ .compatible = "mediatek,mt8173-disp-mutex", .data = &mt8173_mutex_driver_data },
1129 	{ .compatible = "mediatek,mt8183-disp-mutex", .data = &mt8183_mutex_driver_data },
1130 	{ .compatible = "mediatek,mt8186-disp-mutex", .data = &mt8186_mutex_driver_data },
1131 	{ .compatible = "mediatek,mt8186-mdp3-mutex", .data = &mt8186_mdp_mutex_driver_data },
1132 	{ .compatible = "mediatek,mt8188-disp-mutex", .data = &mt8188_mutex_driver_data },
1133 	{ .compatible = "mediatek,mt8188-vpp-mutex",  .data = &mt8188_vpp_mutex_driver_data },
1134 	{ .compatible = "mediatek,mt8192-disp-mutex", .data = &mt8192_mutex_driver_data },
1135 	{ .compatible = "mediatek,mt8195-disp-mutex", .data = &mt8195_mutex_driver_data },
1136 	{ .compatible = "mediatek,mt8195-vpp-mutex",  .data = &mt8195_vpp_mutex_driver_data },
1137 	{ .compatible = "mediatek,mt8365-disp-mutex", .data = &mt8365_mutex_driver_data },
1145 		.name	= "mediatek-mutex",