Lines Matching +full:ixp4xx +full:- +full:ahb +full:- +full:queue +full:- +full:manager
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Intel IXP4xx Queue Manager driver for Linux
14 #include <linux/soc/ixp4xx/qmgr.h>
15 #include <linux/soc/ixp4xx/cpu.h>
21 static u32 used_sram_bitmap[4]; /* 128 16-dword pages */
29 void qmgr_put_entry(unsigned int queue, u32 val) in qmgr_put_entry() argument
32 BUG_ON(!qmgr_queue_descs[queue]); /* not yet requested */ in qmgr_put_entry()
34 printk(KERN_DEBUG "Queue %s(%i) put %X\n", in qmgr_put_entry()
35 qmgr_queue_descs[queue], queue, val); in qmgr_put_entry()
37 __raw_writel(val, &qmgr_regs->acc[queue][0]); in qmgr_put_entry()
40 u32 qmgr_get_entry(unsigned int queue) in qmgr_get_entry() argument
43 val = __raw_readl(&qmgr_regs->acc[queue][0]); in qmgr_get_entry()
45 BUG_ON(!qmgr_queue_descs[queue]); /* not yet requested */ in qmgr_get_entry()
47 printk(KERN_DEBUG "Queue %s(%i) get %X\n", in qmgr_get_entry()
48 qmgr_queue_descs[queue], queue, val); in qmgr_get_entry()
53 static int __qmgr_get_stat1(unsigned int queue) in __qmgr_get_stat1() argument
55 return (__raw_readl(&qmgr_regs->stat1[queue >> 3]) in __qmgr_get_stat1()
56 >> ((queue & 7) << 2)) & 0xF; in __qmgr_get_stat1()
59 static int __qmgr_get_stat2(unsigned int queue) in __qmgr_get_stat2() argument
61 BUG_ON(queue >= HALF_QUEUES); in __qmgr_get_stat2()
62 return (__raw_readl(&qmgr_regs->stat2[queue >> 4]) in __qmgr_get_stat2()
63 >> ((queue & 0xF) << 1)) & 0x3; in __qmgr_get_stat2()
67 * qmgr_stat_empty() - checks if a hardware queue is empty
68 * @queue: queue number
70 * Returns non-zero value if the queue is empty.
72 int qmgr_stat_empty(unsigned int queue) in qmgr_stat_empty() argument
74 BUG_ON(queue >= HALF_QUEUES); in qmgr_stat_empty()
75 return __qmgr_get_stat1(queue) & QUEUE_STAT1_EMPTY; in qmgr_stat_empty()
79 * qmgr_stat_below_low_watermark() - checks if a queue is below low watermark
80 * @queue: queue number
82 * Returns non-zero value if the queue is below low watermark.
84 int qmgr_stat_below_low_watermark(unsigned int queue) in qmgr_stat_below_low_watermark() argument
86 if (queue >= HALF_QUEUES) in qmgr_stat_below_low_watermark()
87 return (__raw_readl(&qmgr_regs->statne_h) >> in qmgr_stat_below_low_watermark()
88 (queue - HALF_QUEUES)) & 0x01; in qmgr_stat_below_low_watermark()
89 return __qmgr_get_stat1(queue) & QUEUE_STAT1_NEARLY_EMPTY; in qmgr_stat_below_low_watermark()
93 * qmgr_stat_full() - checks if a hardware queue is full
94 * @queue: queue number
96 * Returns non-zero value if the queue is full.
98 int qmgr_stat_full(unsigned int queue) in qmgr_stat_full() argument
100 if (queue >= HALF_QUEUES) in qmgr_stat_full()
101 return (__raw_readl(&qmgr_regs->statf_h) >> in qmgr_stat_full()
102 (queue - HALF_QUEUES)) & 0x01; in qmgr_stat_full()
103 return __qmgr_get_stat1(queue) & QUEUE_STAT1_FULL; in qmgr_stat_full()
107 * qmgr_stat_overflow() - checks if a hardware queue experienced overflow
108 * @queue: queue number
110 * Returns non-zero value if the queue experienced overflow.
112 int qmgr_stat_overflow(unsigned int queue) in qmgr_stat_overflow() argument
114 return __qmgr_get_stat2(queue) & QUEUE_STAT2_OVERFLOW; in qmgr_stat_overflow()
117 void qmgr_set_irq(unsigned int queue, int src, in qmgr_set_irq() argument
123 if (queue < HALF_QUEUES) { in qmgr_set_irq()
127 reg = &qmgr_regs->irqsrc[queue >> 3]; /* 8 queues per u32 */ in qmgr_set_irq()
128 bit = (queue % 8) * 4; /* 3 bits + 1 reserved bit per queue */ in qmgr_set_irq()
132 /* IRQ source for queues 32-63 is fixed */ in qmgr_set_irq()
135 irq_handlers[queue] = handler; in qmgr_set_irq()
136 irq_pdevs[queue] = pdev; in qmgr_set_irq()
146 /* ACK - it may clear any bits so don't rely on it */ in qmgr_irq1_a0()
147 __raw_writel(0xFFFFFFFF, &qmgr_regs->irqstat[0]); in qmgr_irq1_a0()
149 en_bitmap = __raw_readl(&qmgr_regs->irqen[0]); in qmgr_irq1_a0()
151 i = __fls(en_bitmap); /* number of the last "low" queue */ in qmgr_irq1_a0()
153 src = __raw_readl(&qmgr_regs->irqsrc[i >> 3]); in qmgr_irq1_a0()
154 stat = __raw_readl(&qmgr_regs->stat1[i >> 3]); in qmgr_irq1_a0()
171 /* ACK - it may clear any bits so don't rely on it */ in qmgr_irq2_a0()
172 __raw_writel(0xFFFFFFFF, &qmgr_regs->irqstat[1]); in qmgr_irq2_a0()
174 req_bitmap = __raw_readl(&qmgr_regs->irqen[1]) & in qmgr_irq2_a0()
175 __raw_readl(&qmgr_regs->statne_h); in qmgr_irq2_a0()
177 i = __fls(req_bitmap); /* number of the last "high" queue */ in qmgr_irq2_a0()
189 u32 req_bitmap = __raw_readl(&qmgr_regs->irqstat[half]); in qmgr_irq()
193 __raw_writel(req_bitmap, &qmgr_regs->irqstat[half]); /* ACK */ in qmgr_irq()
196 i = __fls(req_bitmap); /* number of the last queue */ in qmgr_irq()
205 void qmgr_enable_irq(unsigned int queue) in qmgr_enable_irq() argument
208 int half = queue / 32; in qmgr_enable_irq()
209 u32 mask = 1 << (queue & (HALF_QUEUES - 1)); in qmgr_enable_irq()
212 __raw_writel(__raw_readl(&qmgr_regs->irqen[half]) | mask, in qmgr_enable_irq()
213 &qmgr_regs->irqen[half]); in qmgr_enable_irq()
217 void qmgr_disable_irq(unsigned int queue) in qmgr_disable_irq() argument
220 int half = queue / 32; in qmgr_disable_irq()
221 u32 mask = 1 << (queue & (HALF_QUEUES - 1)); in qmgr_disable_irq()
224 __raw_writel(__raw_readl(&qmgr_regs->irqen[half]) & ~mask, in qmgr_disable_irq()
225 &qmgr_regs->irqen[half]); in qmgr_disable_irq()
226 __raw_writel(mask, &qmgr_regs->irqstat[half]); /* clear */ in qmgr_disable_irq()
239 int qmgr_request_queue(unsigned int queue, unsigned int len /* dwords */, in qmgr_request_queue() argument
244 int __qmgr_request_queue(unsigned int queue, unsigned int len /* dwords */, in qmgr_request_queue()
249 u32 cfg, addr = 0, mask[4]; /* in 16-dwords */ in qmgr_request_queue()
252 BUG_ON(queue >= QUEUES); in qmgr_request_queue()
255 return -EINVAL; in qmgr_request_queue()
275 return -EINVAL; in qmgr_request_queue()
280 len /= 16; /* in 16-dwords: 1, 2, 4 or 8 */ in qmgr_request_queue()
284 return -ENODEV; in qmgr_request_queue()
287 if (__raw_readl(&qmgr_regs->sram[queue])) { in qmgr_request_queue()
288 err = -EBUSY; in qmgr_request_queue()
301 if (addr + len > ARRAY_SIZE(qmgr_regs->sram)) { in qmgr_request_queue()
303 " queue %i\n", queue); in qmgr_request_queue()
304 err = -ENOMEM; in qmgr_request_queue()
313 __raw_writel(cfg | (addr << 14), &qmgr_regs->sram[queue]); in qmgr_request_queue()
315 snprintf(qmgr_queue_descs[queue], sizeof(qmgr_queue_descs[0]), in qmgr_request_queue()
317 printk(KERN_DEBUG "qmgr: requested queue %s(%i) addr = 0x%02X\n", in qmgr_request_queue()
318 qmgr_queue_descs[queue], queue, addr); in qmgr_request_queue()
329 void qmgr_release_queue(unsigned int queue) in qmgr_release_queue() argument
333 BUG_ON(queue >= QUEUES); /* not in valid range */ in qmgr_release_queue()
336 cfg = __raw_readl(&qmgr_regs->sram[queue]); in qmgr_release_queue()
350 while (addr--) in qmgr_release_queue()
354 printk(KERN_DEBUG "qmgr: releasing queue %s(%i)\n", in qmgr_release_queue()
355 qmgr_queue_descs[queue], queue); in qmgr_release_queue()
356 qmgr_queue_descs[queue][0] = '\x0'; in qmgr_release_queue()
359 while ((addr = qmgr_get_entry(queue))) in qmgr_release_queue()
360 printk(KERN_ERR "qmgr: released queue %i not empty: 0x%08X\n", in qmgr_release_queue()
361 queue, addr); in qmgr_release_queue()
363 __raw_writel(0, &qmgr_regs->sram[queue]); in qmgr_release_queue()
369 irq_handlers[queue] = NULL; /* catch IRQ bugs */ in qmgr_release_queue()
379 struct device *dev = &pdev->dev; in ixp4xx_qmgr_probe()
385 return -ENODEV; in ixp4xx_qmgr_probe()
392 return irq1 ? irq1 : -EINVAL; in ixp4xx_qmgr_probe()
396 return irq2 ? irq2 : -EINVAL; in ixp4xx_qmgr_probe()
401 __raw_writel(0x33333333, &qmgr_regs->stat1[i]); in ixp4xx_qmgr_probe()
402 __raw_writel(0, &qmgr_regs->irqsrc[i]); in ixp4xx_qmgr_probe()
405 __raw_writel(0, &qmgr_regs->stat2[i]); in ixp4xx_qmgr_probe()
406 __raw_writel(0xFFFFFFFF, &qmgr_regs->irqstat[i]); /* clear */ in ixp4xx_qmgr_probe()
407 __raw_writel(0, &qmgr_regs->irqen[i]); in ixp4xx_qmgr_probe()
410 __raw_writel(0xFFFFFFFF, &qmgr_regs->statne_h); in ixp4xx_qmgr_probe()
411 __raw_writel(0, &qmgr_regs->statf_h); in ixp4xx_qmgr_probe()
414 __raw_writel(0, &qmgr_regs->sram[i]); in ixp4xx_qmgr_probe()
422 err = devm_request_irq(dev, irq1, handler1, 0, "IXP4xx Queue Manager", in ixp4xx_qmgr_probe()
430 err = devm_request_irq(dev, irq2, handler2, 0, "IXP4xx Queue Manager", in ixp4xx_qmgr_probe()
441 dev_info(dev, "IXP4xx Queue Manager initialized.\n"); in ixp4xx_qmgr_probe()
453 .compatible = "intel,ixp4xx-ahb-queue-manager",
460 .name = "ixp4xx-qmgr",
468 MODULE_DESCRIPTION("Intel IXP4xx Queue Manager driver");