Lines Matching +full:qe +full:- +full:muram +full:- +full:data
1 // SPDX-License-Identifier: GPL-2.0-or-later
9 * QE UCC Fast API Set - UCC Fast specific routines implementations.
20 #include <soc/fsl/qe/immap_qe.h>
21 #include <soc/fsl/qe/qe.h>
23 #include <soc/fsl/qe/ucc.h>
24 #include <soc/fsl/qe/ucc_fast.h>
28 printk(KERN_INFO "UCC%u Fast registers:\n", uccf->uf_info->ucc_num); in ucc_fast_dump_regs()
29 printk(KERN_INFO "Base address: 0x%p\n", uccf->uf_regs); in ucc_fast_dump_regs()
32 &uccf->uf_regs->gumr, ioread32be(&uccf->uf_regs->gumr)); in ucc_fast_dump_regs()
34 &uccf->uf_regs->upsmr, ioread32be(&uccf->uf_regs->upsmr)); in ucc_fast_dump_regs()
36 &uccf->uf_regs->utodr, ioread16be(&uccf->uf_regs->utodr)); in ucc_fast_dump_regs()
38 &uccf->uf_regs->udsr, ioread16be(&uccf->uf_regs->udsr)); in ucc_fast_dump_regs()
40 &uccf->uf_regs->ucce, ioread32be(&uccf->uf_regs->ucce)); in ucc_fast_dump_regs()
42 &uccf->uf_regs->uccm, ioread32be(&uccf->uf_regs->uccm)); in ucc_fast_dump_regs()
44 &uccf->uf_regs->uccs, ioread8(&uccf->uf_regs->uccs)); in ucc_fast_dump_regs()
46 &uccf->uf_regs->urfb, ioread32be(&uccf->uf_regs->urfb)); in ucc_fast_dump_regs()
48 &uccf->uf_regs->urfs, ioread16be(&uccf->uf_regs->urfs)); in ucc_fast_dump_regs()
50 &uccf->uf_regs->urfet, ioread16be(&uccf->uf_regs->urfet)); in ucc_fast_dump_regs()
52 &uccf->uf_regs->urfset, in ucc_fast_dump_regs()
53 ioread16be(&uccf->uf_regs->urfset)); in ucc_fast_dump_regs()
55 &uccf->uf_regs->utfb, ioread32be(&uccf->uf_regs->utfb)); in ucc_fast_dump_regs()
57 &uccf->uf_regs->utfs, ioread16be(&uccf->uf_regs->utfs)); in ucc_fast_dump_regs()
59 &uccf->uf_regs->utfet, ioread16be(&uccf->uf_regs->utfet)); in ucc_fast_dump_regs()
61 &uccf->uf_regs->utftt, ioread16be(&uccf->uf_regs->utftt)); in ucc_fast_dump_regs()
63 &uccf->uf_regs->utpt, ioread16be(&uccf->uf_regs->utpt)); in ucc_fast_dump_regs()
65 &uccf->uf_regs->urtry, ioread32be(&uccf->uf_regs->urtry)); in ucc_fast_dump_regs()
67 &uccf->uf_regs->guemr, ioread8(&uccf->uf_regs->guemr)); in ucc_fast_dump_regs()
89 iowrite16be(UCC_FAST_TOD, &uccf->uf_regs->utodr); in ucc_fast_transmit_on_demand()
98 uf_regs = uccf->uf_regs; in ucc_fast_enable()
101 gumr = ioread32be(&uf_regs->gumr); in ucc_fast_enable()
104 uccf->enabled_tx = 1; in ucc_fast_enable()
108 uccf->enabled_rx = 1; in ucc_fast_enable()
110 iowrite32be(gumr, &uf_regs->gumr); in ucc_fast_enable()
119 uf_regs = uccf->uf_regs; in ucc_fast_disable()
122 gumr = ioread32be(&uf_regs->gumr); in ucc_fast_disable()
125 uccf->enabled_tx = 0; in ucc_fast_disable()
129 uccf->enabled_rx = 0; in ucc_fast_disable()
131 iowrite32be(gumr, &uf_regs->gumr); in ucc_fast_disable()
143 return -EINVAL; in ucc_fast_init()
146 if ((uf_info->ucc_num < 0) || (uf_info->ucc_num > UCC_MAX_NUM - 1)) { in ucc_fast_init()
148 return -EINVAL; in ucc_fast_init()
152 if (uf_info->max_rx_buf_length & (UCC_FAST_MRBLR_ALIGNMENT - 1)) { in ucc_fast_init()
155 return -EINVAL; in ucc_fast_init()
159 if (uf_info->urfs < UCC_FAST_URFS_MIN_VAL) { in ucc_fast_init()
161 return -EINVAL; in ucc_fast_init()
164 if (uf_info->urfs & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) { in ucc_fast_init()
166 return -EINVAL; in ucc_fast_init()
169 if (uf_info->urfet & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) { in ucc_fast_init()
171 return -EINVAL; in ucc_fast_init()
174 if (uf_info->urfset & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) { in ucc_fast_init()
176 return -EINVAL; in ucc_fast_init()
179 if (uf_info->utfs & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) { in ucc_fast_init()
181 return -EINVAL; in ucc_fast_init()
184 if (uf_info->utfet & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) { in ucc_fast_init()
186 return -EINVAL; in ucc_fast_init()
189 if (uf_info->utftt & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) { in ucc_fast_init()
191 return -EINVAL; in ucc_fast_init()
196 printk(KERN_ERR "%s: Cannot allocate private data\n", in ucc_fast_init()
198 return -ENOMEM; in ucc_fast_init()
200 uccf->ucc_fast_tx_virtual_fifo_base_offset = -1; in ucc_fast_init()
201 uccf->ucc_fast_rx_virtual_fifo_base_offset = -1; in ucc_fast_init()
204 uccf->uf_info = uf_info; in ucc_fast_init()
206 uccf->uf_regs = ioremap(uf_info->regs, sizeof(struct ucc_fast)); in ucc_fast_init()
207 if (uccf->uf_regs == NULL) { in ucc_fast_init()
210 return -ENOMEM; in ucc_fast_init()
213 uccf->enabled_tx = 0; in ucc_fast_init()
214 uccf->enabled_rx = 0; in ucc_fast_init()
215 uccf->stopped_tx = 0; in ucc_fast_init()
216 uccf->stopped_rx = 0; in ucc_fast_init()
217 uf_regs = uccf->uf_regs; in ucc_fast_init()
218 uccf->p_ucce = &uf_regs->ucce; in ucc_fast_init()
219 uccf->p_uccm = &uf_regs->uccm; in ucc_fast_init()
221 uccf->p_utodr = &uf_regs->utodr; in ucc_fast_init()
224 uccf->tx_frames = 0; in ucc_fast_init()
225 uccf->rx_frames = 0; in ucc_fast_init()
226 uccf->rx_discarded = 0; in ucc_fast_init()
230 ret = ucc_set_type(uf_info->ucc_num, UCC_SPEED_TYPE_FAST); in ucc_fast_init()
237 uccf->mrblr = uf_info->max_rx_buf_length; in ucc_fast_init()
241 gumr = uf_info->ttx_trx; in ucc_fast_init()
242 if (uf_info->tci) in ucc_fast_init()
244 if (uf_info->cdp) in ucc_fast_init()
246 if (uf_info->ctsp) in ucc_fast_init()
248 if (uf_info->cds) in ucc_fast_init()
250 if (uf_info->ctss) in ucc_fast_init()
252 if (uf_info->txsy) in ucc_fast_init()
254 if (uf_info->rsyn) in ucc_fast_init()
256 gumr |= uf_info->synl; in ucc_fast_init()
257 if (uf_info->rtsm) in ucc_fast_init()
259 gumr |= uf_info->renc; in ucc_fast_init()
260 if (uf_info->revd) in ucc_fast_init()
262 gumr |= uf_info->tenc; in ucc_fast_init()
263 gumr |= uf_info->tcrc; in ucc_fast_init()
264 gumr |= uf_info->mode; in ucc_fast_init()
265 iowrite32be(gumr, &uf_regs->gumr); in ucc_fast_init()
268 uccf->ucc_fast_tx_virtual_fifo_base_offset = in ucc_fast_init()
269 qe_muram_alloc(uf_info->utfs, UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT); in ucc_fast_init()
270 if (uccf->ucc_fast_tx_virtual_fifo_base_offset < 0) { in ucc_fast_init()
271 printk(KERN_ERR "%s: cannot allocate MURAM for TX FIFO\n", in ucc_fast_init()
274 return -ENOMEM; in ucc_fast_init()
278 uccf->ucc_fast_rx_virtual_fifo_base_offset = in ucc_fast_init()
279 qe_muram_alloc(uf_info->urfs + in ucc_fast_init()
282 if (uccf->ucc_fast_rx_virtual_fifo_base_offset < 0) { in ucc_fast_init()
283 printk(KERN_ERR "%s: cannot allocate MURAM for RX FIFO\n", in ucc_fast_init()
286 return -ENOMEM; in ucc_fast_init()
290 iowrite16be(uf_info->urfs, &uf_regs->urfs); in ucc_fast_init()
291 iowrite16be(uf_info->urfet, &uf_regs->urfet); in ucc_fast_init()
292 iowrite16be(uf_info->urfset, &uf_regs->urfset); in ucc_fast_init()
293 iowrite16be(uf_info->utfs, &uf_regs->utfs); in ucc_fast_init()
294 iowrite16be(uf_info->utfet, &uf_regs->utfet); in ucc_fast_init()
295 iowrite16be(uf_info->utftt, &uf_regs->utftt); in ucc_fast_init()
296 /* utfb, urfb are offsets from MURAM base */ in ucc_fast_init()
297 iowrite32be(uccf->ucc_fast_tx_virtual_fifo_base_offset, in ucc_fast_init()
298 &uf_regs->utfb); in ucc_fast_init()
299 iowrite32be(uccf->ucc_fast_rx_virtual_fifo_base_offset, in ucc_fast_init()
300 &uf_regs->urfb); in ucc_fast_init()
304 ucc_set_qe_mux_grant(uf_info->ucc_num, uf_info->grant_support); in ucc_fast_init()
306 ucc_set_qe_mux_bkpt(uf_info->ucc_num, uf_info->brkpt_support); in ucc_fast_init()
308 ucc_set_qe_mux_tsa(uf_info->ucc_num, uf_info->tsa); in ucc_fast_init()
310 if (!uf_info->tsa) { in ucc_fast_init()
312 if ((uf_info->rx_clock != QE_CLK_NONE) && in ucc_fast_init()
313 ucc_set_qe_mux_rxtx(uf_info->ucc_num, uf_info->rx_clock, in ucc_fast_init()
318 return -EINVAL; in ucc_fast_init()
321 if ((uf_info->tx_clock != QE_CLK_NONE) && in ucc_fast_init()
322 ucc_set_qe_mux_rxtx(uf_info->ucc_num, uf_info->tx_clock, in ucc_fast_init()
327 return -EINVAL; in ucc_fast_init()
331 if ((uf_info->rx_clock != QE_CLK_NONE) && in ucc_fast_init()
332 ucc_set_tdm_rxtx_clk(uf_info->tdm_num, uf_info->rx_clock, in ucc_fast_init()
336 return -EINVAL; in ucc_fast_init()
340 if ((uf_info->tx_clock != QE_CLK_NONE) && in ucc_fast_init()
341 ucc_set_tdm_rxtx_clk(uf_info->tdm_num, uf_info->tx_clock, in ucc_fast_init()
345 return -EINVAL; in ucc_fast_init()
349 if ((uf_info->rx_sync != QE_CLK_NONE) && in ucc_fast_init()
350 ucc_set_tdm_rxtx_sync(uf_info->tdm_num, uf_info->rx_sync, in ucc_fast_init()
354 return -EINVAL; in ucc_fast_init()
358 if ((uf_info->tx_sync != QE_CLK_NONE) && in ucc_fast_init()
359 ucc_set_tdm_rxtx_sync(uf_info->tdm_num, uf_info->tx_sync, in ucc_fast_init()
363 return -EINVAL; in ucc_fast_init()
368 iowrite32be(uf_info->uccm_mask, &uf_regs->uccm); in ucc_fast_init()
375 iowrite32be(0xffffffff, &uf_regs->ucce); in ucc_fast_init()
387 qe_muram_free(uccf->ucc_fast_tx_virtual_fifo_base_offset); in ucc_fast_free()
388 qe_muram_free(uccf->ucc_fast_rx_virtual_fifo_base_offset); in ucc_fast_free()
390 if (uccf->uf_regs) in ucc_fast_free()
391 iounmap(uccf->uf_regs); in ucc_fast_free()