Lines Matching +full:xdma +full:- +full:host +full:- +full:3
1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (c) 2003-2013 QLogic Corporation
14 #include <linux/io-64-nonatomic-lo-hi.h>
40 if ((off < ha->first_page_group_end) && in qla4_8xxx_pci_base_offsetfset()
41 (off >= ha->first_page_group_start)) in qla4_8xxx_pci_base_offsetfset()
42 return (void __iomem *)(ha->nx_pcibase + off); in qla4_8xxx_pci_base_offsetfset()
59 qla4_8xxx_crb_addr_transform(XDMA); in qla4_82xx_crb_addr_transform_setup()
133 {{{0, 0, 0, 0} } }, /* 3: */
206 {{{0, 0x1000000, 0x1004000, 0x1a8000} } },/* 16: XDMA */
254 {{{0, 0x3100000, 0x3104000, 0x1a8000} } },/* 49: XDMA */
363 ha->crb_win = CRB_HI(*off); in qla4_82xx_pci_set_crbwindow_2M()
364 writel(ha->crb_win, in qla4_82xx_pci_set_crbwindow_2M()
365 (void __iomem *)(CRB_WINDOW_2M + ha->nx_pcibase)); in qla4_82xx_pci_set_crbwindow_2M()
369 win_read = readl((void __iomem *)(CRB_WINDOW_2M + ha->nx_pcibase)); in qla4_82xx_pci_set_crbwindow_2M()
370 if (win_read != ha->crb_win) { in qla4_82xx_pci_set_crbwindow_2M()
373 " off=0x%lx\n", __func__, ha->crb_win, win_read, *off)); in qla4_82xx_pci_set_crbwindow_2M()
375 *off = (*off & MASK(16)) + CRB_INDIRECT_2M + ha->nx_pcibase; in qla4_82xx_pci_set_crbwindow_2M()
393 return -1; in qla4_82xx_crb_win_lock()
398 qla4_82xx_wr_32(ha, QLA82XX_CRB_WIN_LOCK_ID, ha->func_num); in qla4_82xx_crb_win_lock()
415 BUG_ON(rv == -1); in qla4_82xx_wr_32()
418 write_lock_irqsave(&ha->hw_lock, flags); in qla4_82xx_wr_32()
427 write_unlock_irqrestore(&ha->hw_lock, flags); in qla4_82xx_wr_32()
439 BUG_ON(rv == -1); in qla4_82xx_rd_32()
442 write_lock_irqsave(&ha->hw_lock, flags); in qla4_82xx_rd_32()
450 write_unlock_irqrestore(&ha->hw_lock, flags); in qla4_82xx_rd_32()
462 writel(off_value, (void __iomem *)(CRB_WINDOW_2M + ha->nx_pcibase)); in qla4_82xx_md_rd_32()
468 win_read = readl((void __iomem *)(CRB_WINDOW_2M + ha->nx_pcibase)); in qla4_82xx_md_rd_32()
477 ha->nx_pcibase)); in qla4_82xx_md_rd_32()
488 writel(off_value, (void __iomem *)(CRB_WINDOW_2M + ha->nx_pcibase)); in qla4_82xx_md_wr_32()
493 win_read = readl((void __iomem *)(CRB_WINDOW_2M + ha->nx_pcibase)); in qla4_82xx_md_wr_32()
502 ha->nx_pcibase)); in qla4_82xx_md_wr_32()
510 * qla4_82xx_idc_lock - hw_lock
530 return -1; in qla4_82xx_idc_lock()
549 return -1; in qla4_82xx_pci_get_crb_addr_2M()
552 *off = (*off - QLA82XX_PCI_CAMQM) + in qla4_82xx_pci_get_crb_addr_2M()
553 QLA82XX_PCI_CAMQM_2M_BASE + ha->nx_pcibase; in qla4_82xx_pci_get_crb_addr_2M()
558 return -1; in qla4_82xx_pci_get_crb_addr_2M()
560 *off -= QLA82XX_PCI_CRBSPACE; in qla4_82xx_pci_get_crb_addr_2M()
567 if (m->valid && (m->start_128M <= *off) && (m->end_128M > *off)) { in qla4_82xx_pci_get_crb_addr_2M()
568 *off = *off + m->start_2M - m->start_128M + ha->nx_pcibase; in qla4_82xx_pci_get_crb_addr_2M()
588 !QLA8XXX_ADDR_IN_RANGE(addr + size - 1, in qla4_82xx_pci_mem_bound_check()
608 ha->ddr_mn_window = window; in qla4_82xx_pci_set_window()
609 qla4_82xx_wr_32(ha, ha->mn_win_crb | in qla4_82xx_pci_set_window()
611 win_read = qla4_82xx_rd_32(ha, ha->mn_win_crb | in qla4_82xx_pci_set_window()
625 addr = -1UL; in qla4_82xx_pci_set_window()
629 ha->ddr_mn_window = window; in qla4_82xx_pci_set_window()
630 qla4_82xx_wr_32(ha, ha->mn_win_crb | in qla4_82xx_pci_set_window()
632 win_read = qla4_82xx_rd_32(ha, ha->mn_win_crb | in qla4_82xx_pci_set_window()
646 ha->qdr_sn_window = window; in qla4_82xx_pci_set_window()
647 qla4_82xx_wr_32(ha, ha->ms_win_crb | in qla4_82xx_pci_set_window()
650 ha->ms_win_crb | QLA82XX_PCI_CRBSPACE); in qla4_82xx_pci_set_window()
667 addr = -1UL; in qla4_82xx_pci_set_window()
694 window = ((addr - QLA8XXX_ADDR_QDR_NET) >> 22) & 0x3f; in qla4_82xx_pci_is_same_window()
695 if (ha->qdr_sn_window == window) in qla4_82xx_pci_is_same_window()
713 write_lock_irqsave(&ha->hw_lock, flags); in qla4_82xx_pci_mem_read_direct()
720 if ((start == -1UL) || in qla4_82xx_pci_mem_read_direct()
721 (qla4_82xx_pci_is_same_window(ha, off + size - 1) == 0)) { in qla4_82xx_pci_mem_read_direct()
722 write_unlock_irqrestore(&ha->hw_lock, flags); in qla4_82xx_pci_mem_read_direct()
725 return -1; in qla4_82xx_pci_mem_read_direct()
730 write_unlock_irqrestore(&ha->hw_lock, flags); in qla4_82xx_pci_mem_read_direct()
731 mem_base = pci_resource_start(ha->pdev, 0); in qla4_82xx_pci_mem_read_direct()
736 if (mem_page != ((start + size - 1) & PAGE_MASK)) in qla4_82xx_pci_mem_read_direct()
743 return -1; in qla4_82xx_pci_mem_read_direct()
746 addr += start & (PAGE_SIZE - 1); in qla4_82xx_pci_mem_read_direct()
747 write_lock_irqsave(&ha->hw_lock, flags); in qla4_82xx_pci_mem_read_direct()
764 ret = -1; in qla4_82xx_pci_mem_read_direct()
767 write_unlock_irqrestore(&ha->hw_lock, flags); in qla4_82xx_pci_mem_read_direct()
786 write_lock_irqsave(&ha->hw_lock, flags); in qla4_82xx_pci_mem_write_direct()
793 if ((start == -1UL) || in qla4_82xx_pci_mem_write_direct()
794 (qla4_82xx_pci_is_same_window(ha, off + size - 1) == 0)) { in qla4_82xx_pci_mem_write_direct()
795 write_unlock_irqrestore(&ha->hw_lock, flags); in qla4_82xx_pci_mem_write_direct()
798 return -1; in qla4_82xx_pci_mem_write_direct()
803 write_unlock_irqrestore(&ha->hw_lock, flags); in qla4_82xx_pci_mem_write_direct()
804 mem_base = pci_resource_start(ha->pdev, 0); in qla4_82xx_pci_mem_write_direct()
809 if (mem_page != ((start + size - 1) & PAGE_MASK)) in qla4_82xx_pci_mem_write_direct()
814 return -1; in qla4_82xx_pci_mem_write_direct()
817 addr += start & (PAGE_SIZE - 1); in qla4_82xx_pci_mem_write_direct()
818 write_lock_irqsave(&ha->hw_lock, flags); in qla4_82xx_pci_mem_write_direct()
835 ret = -1; in qla4_82xx_pci_mem_write_direct()
838 write_unlock_irqrestore(&ha->hw_lock, flags); in qla4_82xx_pci_mem_write_direct()
890 return -1; in qla4_82xx_rom_lock()
918 return -1; in qla4_82xx_wait_rom_done()
929 qla4_82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_ABYTE_CNT, 3); in qla4_82xx_do_rom_fast_read()
933 return -1; in qla4_82xx_do_rom_fast_read()
956 return -1; in qla4_82xx_rom_fast_read()
1024 if (test_bit(DPC_RESET_HA, &ha->dpc_flags)) in qla4_82xx_pinit_from_rom()
1041 return -1; in qla4_82xx_pinit_from_rom()
1055 return -1; in qla4_82xx_pinit_from_rom()
1065 return -1; in qla4_82xx_pinit_from_rom()
1073 return -1; in qla4_82xx_pinit_from_rom()
1164 * qla4_8xxx_ms_mem_write_128b - Writes data to MS/off-chip memory
1181 /* Only 128-bit aligned access */ in qla4_8xxx_ms_mem_write_128b()
1187 write_lock_irqsave(&ha->hw_lock, flags); in qla4_8xxx_ms_mem_write_128b()
1190 ret_val = ha->isp_ops->wr_reg_indirect(ha, MD_MIU_TEST_AGT_ADDR_HI, 0); in qla4_8xxx_ms_mem_write_128b()
1206 ret_val = ha->isp_ops->wr_reg_indirect(ha, in qla4_8xxx_ms_mem_write_128b()
1210 ret_val |= ha->isp_ops->wr_reg_indirect(ha, in qla4_8xxx_ms_mem_write_128b()
1213 ret_val |= ha->isp_ops->wr_reg_indirect(ha, in qla4_8xxx_ms_mem_write_128b()
1216 ret_val |= ha->isp_ops->wr_reg_indirect(ha, in qla4_8xxx_ms_mem_write_128b()
1219 ret_val |= ha->isp_ops->wr_reg_indirect(ha, in qla4_8xxx_ms_mem_write_128b()
1229 ret_val = ha->isp_ops->wr_reg_indirect(ha, MD_MIU_TEST_AGT_CTRL, in qla4_8xxx_ms_mem_write_128b()
1231 ret_val |= ha->isp_ops->wr_reg_indirect(ha, in qla4_8xxx_ms_mem_write_128b()
1241 ret_val = ha->isp_ops->rd_reg_indirect(ha, in qla4_8xxx_ms_mem_write_128b()
1263 write_unlock_irqrestore(&ha->hw_lock, flags); in qla4_8xxx_ms_mem_write_128b()
1278 flashaddr = memaddr = ha->hw.flt_region_bootload; in qla4_82xx_load_from_flash()
1279 size = (image_start - flashaddr) / 8; in qla4_82xx_load_from_flash()
1282 ha->host_no, __func__, flashaddr, image_start)); in qla4_82xx_load_from_flash()
1288 rval = -1; in qla4_82xx_load_from_flash()
1306 read_lock(&ha->hw_lock); in qla4_82xx_load_from_flash()
1309 read_unlock(&ha->hw_lock); in qla4_82xx_load_from_flash()
1371 sz[0] = (size < (16 - off0[0])) ? size : (16 - off0[0]); in qla4_82xx_pci_mem_read_2M()
1374 loop = ((off0[0] + size - 1) >> shift_amount) + 1; in qla4_82xx_pci_mem_read_2M()
1376 sz[1] = size - sz[0]; in qla4_82xx_pci_mem_read_2M()
1402 end = (off0[i] + sz[i] - 1) >> 2; in qla4_82xx_pci_mem_read_2M()
1411 return -1; in qla4_82xx_pci_mem_read_2M()
1459 sz[0] = (size < (8 - off0)) ? size : (8 - off0); in qla4_82xx_pci_mem_write_2M()
1460 sz[1] = size - sz[0]; in qla4_82xx_pci_mem_write_2M()
1463 loop = (((off & 0xf) + size - 1) >> 4) + 1; in qla4_82xx_pci_mem_write_2M()
1471 return -1; in qla4_82xx_pci_mem_write_2M()
1535 ret = -1; in qla4_82xx_pci_mem_write_2M()
1557 } while (--retries); in qla4_82xx_cmdpeg_ready()
1564 return -1; in qla4_82xx_cmdpeg_ready()
1576 read_lock(&ha->hw_lock); in qla4_82xx_rcvpeg_ready()
1578 read_unlock(&ha->hw_lock); in qla4_82xx_rcvpeg_ready()
1583 read_lock(&ha->hw_lock); in qla4_82xx_rcvpeg_ready()
1585 read_unlock(&ha->hw_lock); in qla4_82xx_rcvpeg_ready()
1612 drv_active |= (1 << ha->func_num); in qla4_8xxx_set_drv_active()
1614 drv_active |= (1 << (ha->func_num * 4)); in qla4_8xxx_set_drv_active()
1617 __func__, ha->host_no, drv_active); in qla4_8xxx_set_drv_active()
1634 drv_active &= ~(1 << (ha->func_num)); in qla4_8xxx_clear_drv_active()
1636 drv_active &= ~(1 << (ha->func_num * 4)); in qla4_8xxx_clear_drv_active()
1639 __func__, ha->host_no, drv_active); in qla4_8xxx_clear_drv_active()
1657 rval = drv_state & (1 << ha->func_num); in qla4_8xxx_need_reset()
1659 rval = drv_state & (1 << (ha->func_num * 4)); in qla4_8xxx_need_reset()
1661 if ((test_bit(AF_EEH_BUSY, &ha->flags)) && drv_active) in qla4_8xxx_need_reset()
1679 drv_state |= (1 << ha->func_num); in qla4_8xxx_set_rst_ready()
1681 drv_state |= (1 << (ha->func_num * 4)); in qla4_8xxx_set_rst_ready()
1684 __func__, ha->host_no, drv_state); in qla4_8xxx_set_rst_ready()
1700 drv_state &= ~(1 << ha->func_num); in qla4_8xxx_clear_rst_ready()
1702 drv_state &= ~(1 << (ha->func_num * 4)); in qla4_8xxx_clear_rst_ready()
1705 __func__, ha->host_no, drv_state); in qla4_8xxx_clear_rst_ready()
1722 qsnt_state |= (1 << ha->func_num); in qla4_8xxx_set_qsnt_ready()
1724 qsnt_state |= (2 << (ha->func_num * 4)); in qla4_8xxx_set_qsnt_ready()
1756 pcie_capability_read_word(ha->pdev, PCI_EXP_LNKSTA, &lnk); in qla4_82xx_start_firmware()
1757 ha->link_width = (lnk >> 4) & 0x3f; in qla4_82xx_start_firmware()
1781 rval = qla4_82xx_start_firmware(ha, ha->hw.flt_region_fw); in qla4_82xx_try_start_fw()
1796 dev_info(&ha->pdev->dev, "Resetting rom_lock\n"); in qla4_82xx_rom_lock_recovery()
1816 ha->isp_ops->rd_reg_indirect(ha, addr1, &temp); in ql4_84xx_poll_wait_for_ready()
1842 ha->isp_ops->wr_reg_indirect(ha, addr1, temp); in ql4_84xx_ipmdio_rd_reg()
1848 ha->isp_ops->rd_reg_indirect(ha, addr3, &data); in ql4_84xx_ipmdio_rd_reg()
1891 ha->isp_ops->wr_reg_indirect(ha, addr3, value); in ql4_84xx_ipmdio_wr_reg()
1892 ha->isp_ops->wr_reg_indirect(ha, addr1, addr); in ql4_84xx_ipmdio_wr_reg()
1912 r_addr = crb_hdr->addr; in qla4_8xxx_minidump_process_rdcrb()
1913 r_stride = crb_hdr->crb_strd.addr_stride; in qla4_8xxx_minidump_process_rdcrb()
1914 loop_cnt = crb_hdr->op_count; in qla4_8xxx_minidump_process_rdcrb()
1917 ha->isp_ops->rd_reg_indirect(ha, r_addr, &r_value); in qla4_8xxx_minidump_process_rdcrb()
1933 ha->fw_dump_tmplt_hdr; in qla4_83xx_check_dma_engine_state()
1935 tmplt_hdr->saved_state_array[QLA83XX_PEX_DMA_ENGINE_INDEX]; in qla4_83xx_check_dma_engine_state()
1939 /* Read the pex-dma's command-status-and-control register. */ in qla4_83xx_check_dma_engine_state()
1940 rval = ha->isp_ops->rd_reg_indirect(ha, in qla4_83xx_check_dma_engine_state()
1947 /* Check if requested pex-dma engine is available. */ in qla4_83xx_check_dma_engine_state()
1963 ha->fw_dump_tmplt_hdr; in qla4_83xx_start_pex_dma()
1965 tmplt_hdr->saved_state_array[QLA83XX_PEX_DMA_ENGINE_INDEX]; in qla4_83xx_start_pex_dma()
1969 rval = ha->isp_ops->wr_reg_indirect(ha, in qla4_83xx_start_pex_dma()
1971 m_hdr->desc_card_addr); in qla4_83xx_start_pex_dma()
1975 rval = ha->isp_ops->wr_reg_indirect(ha, in qla4_83xx_start_pex_dma()
1980 rval = ha->isp_ops->wr_reg_indirect(ha, in qla4_83xx_start_pex_dma()
1982 m_hdr->start_dma_cmd); in qla4_83xx_start_pex_dma()
1988 rval = ha->isp_ops->rd_reg_indirect(ha, in qla4_83xx_start_pex_dma()
2027 "%s: DMA engine not available. Fallback to rdmem-read.\n", in qla4_8xxx_minidump_pex_dma_read()
2033 rdmem_buffer = dma_alloc_coherent(&ha->pdev->dev, in qla4_8xxx_minidump_pex_dma_read()
2043 /* Prepare pex-dma descriptor to be written to MS memory. */ in qla4_8xxx_minidump_pex_dma_read()
2044 /* dma-desc-cmd layout: in qla4_8xxx_minidump_pex_dma_read()
2045 * 0-3: dma-desc-cmd 0-3 in qla4_8xxx_minidump_pex_dma_read()
2046 * 4-7: pcid function number in qla4_8xxx_minidump_pex_dma_read()
2047 * 8-15: dma-desc-cmd 8-15 in qla4_8xxx_minidump_pex_dma_read()
2049 dma_desc.cmd.dma_desc_cmd = (m_hdr->dma_desc_cmd & 0xff0f); in qla4_8xxx_minidump_pex_dma_read()
2050 dma_desc.cmd.dma_desc_cmd |= ((PCI_FUNC(ha->pdev->devfn) & 0xf) << 0x4); in qla4_8xxx_minidump_pex_dma_read()
2056 * Perform rdmem operation using pex-dma. in qla4_8xxx_minidump_pex_dma_read()
2059 while (read_size < m_hdr->read_data_size) { in qla4_8xxx_minidump_pex_dma_read()
2060 if (m_hdr->read_data_size - read_size >= in qla4_8xxx_minidump_pex_dma_read()
2064 size = (m_hdr->read_data_size - read_size); in qla4_8xxx_minidump_pex_dma_read()
2067 dma_free_coherent(&ha->pdev->dev, in qla4_8xxx_minidump_pex_dma_read()
2071 rdmem_buffer = dma_alloc_coherent(&ha->pdev->dev, size, in qla4_8xxx_minidump_pex_dma_read()
2083 dma_desc.src_addr = m_hdr->read_addr + read_size; in qla4_8xxx_minidump_pex_dma_read()
2086 /* Prepare: Write pex-dma descriptor to MS memory. */ in qla4_8xxx_minidump_pex_dma_read()
2088 (uint64_t)m_hdr->desc_card_addr, in qla4_8xxx_minidump_pex_dma_read()
2093 "%s: Error writing rdmem-dma-init to MS !!!\n", in qla4_8xxx_minidump_pex_dma_read()
2099 "%s: Dma-desc: Instruct for rdmem dma (size 0x%x).\n", in qla4_8xxx_minidump_pex_dma_read()
2101 /* Execute: Start pex-dma operation. */ in qla4_8xxx_minidump_pex_dma_read()
2105 "scsi(%ld): start-pex-dma failed rval=0x%x\n", in qla4_8xxx_minidump_pex_dma_read()
2106 ha->host_no, rval)); in qla4_8xxx_minidump_pex_dma_read()
2121 dma_free_coherent(&ha->pdev->dev, size, rdmem_buffer, in qla4_8xxx_minidump_pex_dma_read()
2142 loop_count = cache_hdr->op_count; in qla4_8xxx_minidump_process_l2tag()
2143 r_addr = cache_hdr->read_addr; in qla4_8xxx_minidump_process_l2tag()
2144 c_addr = cache_hdr->control_addr; in qla4_8xxx_minidump_process_l2tag()
2145 c_value_w = cache_hdr->cache_ctrl.write_value; in qla4_8xxx_minidump_process_l2tag()
2147 t_r_addr = cache_hdr->tag_reg_addr; in qla4_8xxx_minidump_process_l2tag()
2148 t_value = cache_hdr->addr_ctrl.init_tag_value; in qla4_8xxx_minidump_process_l2tag()
2149 r_cnt = cache_hdr->read_ctrl.read_addr_cnt; in qla4_8xxx_minidump_process_l2tag()
2150 p_wait = cache_hdr->cache_ctrl.poll_wait; in qla4_8xxx_minidump_process_l2tag()
2151 p_mask = cache_hdr->cache_ctrl.poll_mask; in qla4_8xxx_minidump_process_l2tag()
2154 ha->isp_ops->wr_reg_indirect(ha, t_r_addr, t_value); in qla4_8xxx_minidump_process_l2tag()
2157 ha->isp_ops->wr_reg_indirect(ha, c_addr, c_value_w); in qla4_8xxx_minidump_process_l2tag()
2162 ha->isp_ops->rd_reg_indirect(ha, c_addr, in qla4_8xxx_minidump_process_l2tag()
2175 ha->isp_ops->rd_reg_indirect(ha, addr, &r_value); in qla4_8xxx_minidump_process_l2tag()
2177 addr += cache_hdr->read_ctrl.read_addr_stride; in qla4_8xxx_minidump_process_l2tag()
2180 t_value += cache_hdr->addr_ctrl.tag_value_stride; in qla4_8xxx_minidump_process_l2tag()
2198 ha->fw_dump_tmplt_hdr; in qla4_8xxx_minidump_process_control()
2201 crb_addr = crb_entry->addr; in qla4_8xxx_minidump_process_control()
2202 for (i = 0; i < crb_entry->op_count; i++) { in qla4_8xxx_minidump_process_control()
2203 opcode = crb_entry->crb_ctrl.opcode; in qla4_8xxx_minidump_process_control()
2205 ha->isp_ops->wr_reg_indirect(ha, crb_addr, in qla4_8xxx_minidump_process_control()
2206 crb_entry->value_1); in qla4_8xxx_minidump_process_control()
2210 ha->isp_ops->rd_reg_indirect(ha, crb_addr, &read_value); in qla4_8xxx_minidump_process_control()
2211 ha->isp_ops->wr_reg_indirect(ha, crb_addr, read_value); in qla4_8xxx_minidump_process_control()
2215 ha->isp_ops->rd_reg_indirect(ha, crb_addr, &read_value); in qla4_8xxx_minidump_process_control()
2216 read_value &= crb_entry->value_2; in qla4_8xxx_minidump_process_control()
2219 read_value |= crb_entry->value_3; in qla4_8xxx_minidump_process_control()
2222 ha->isp_ops->wr_reg_indirect(ha, crb_addr, read_value); in qla4_8xxx_minidump_process_control()
2225 ha->isp_ops->rd_reg_indirect(ha, crb_addr, &read_value); in qla4_8xxx_minidump_process_control()
2226 read_value |= crb_entry->value_3; in qla4_8xxx_minidump_process_control()
2227 ha->isp_ops->wr_reg_indirect(ha, crb_addr, read_value); in qla4_8xxx_minidump_process_control()
2231 poll_time = crb_entry->crb_strd.poll_timeout; in qla4_8xxx_minidump_process_control()
2233 ha->isp_ops->rd_reg_indirect(ha, crb_addr, &read_value); in qla4_8xxx_minidump_process_control()
2236 if ((read_value & crb_entry->value_2) == in qla4_8xxx_minidump_process_control()
2237 crb_entry->value_1) { in qla4_8xxx_minidump_process_control()
2244 ha->isp_ops->rd_reg_indirect(ha, in qla4_8xxx_minidump_process_control()
2252 if (crb_entry->crb_strd.state_index_a) { in qla4_8xxx_minidump_process_control()
2253 index = crb_entry->crb_strd.state_index_a; in qla4_8xxx_minidump_process_control()
2254 addr = tmplt_hdr->saved_state_array[index]; in qla4_8xxx_minidump_process_control()
2259 ha->isp_ops->rd_reg_indirect(ha, addr, &read_value); in qla4_8xxx_minidump_process_control()
2260 index = crb_entry->crb_ctrl.state_index_v; in qla4_8xxx_minidump_process_control()
2261 tmplt_hdr->saved_state_array[index] = read_value; in qla4_8xxx_minidump_process_control()
2266 if (crb_entry->crb_strd.state_index_a) { in qla4_8xxx_minidump_process_control()
2267 index = crb_entry->crb_strd.state_index_a; in qla4_8xxx_minidump_process_control()
2268 addr = tmplt_hdr->saved_state_array[index]; in qla4_8xxx_minidump_process_control()
2273 if (crb_entry->crb_ctrl.state_index_v) { in qla4_8xxx_minidump_process_control()
2274 index = crb_entry->crb_ctrl.state_index_v; in qla4_8xxx_minidump_process_control()
2276 tmplt_hdr->saved_state_array[index]; in qla4_8xxx_minidump_process_control()
2278 read_value = crb_entry->value_1; in qla4_8xxx_minidump_process_control()
2281 ha->isp_ops->wr_reg_indirect(ha, addr, read_value); in qla4_8xxx_minidump_process_control()
2286 index = crb_entry->crb_ctrl.state_index_v; in qla4_8xxx_minidump_process_control()
2287 read_value = tmplt_hdr->saved_state_array[index]; in qla4_8xxx_minidump_process_control()
2288 read_value <<= crb_entry->crb_ctrl.shl; in qla4_8xxx_minidump_process_control()
2289 read_value >>= crb_entry->crb_ctrl.shr; in qla4_8xxx_minidump_process_control()
2290 if (crb_entry->value_2) in qla4_8xxx_minidump_process_control()
2291 read_value &= crb_entry->value_2; in qla4_8xxx_minidump_process_control()
2292 read_value |= crb_entry->value_3; in qla4_8xxx_minidump_process_control()
2293 read_value += crb_entry->value_1; in qla4_8xxx_minidump_process_control()
2294 tmplt_hdr->saved_state_array[index] = read_value; in qla4_8xxx_minidump_process_control()
2297 crb_addr += crb_entry->crb_strd.addr_stride; in qla4_8xxx_minidump_process_control()
2313 r_addr = ocm_hdr->read_addr; in qla4_8xxx_minidump_process_rdocm()
2314 r_stride = ocm_hdr->read_addr_stride; in qla4_8xxx_minidump_process_rdocm()
2315 loop_cnt = ocm_hdr->op_count; in qla4_8xxx_minidump_process_rdocm()
2322 r_value = readl((void __iomem *)(r_addr + ha->nx_pcibase)); in qla4_8xxx_minidump_process_rdocm()
2341 r_addr = mux_hdr->read_addr; in qla4_8xxx_minidump_process_rdmux()
2342 s_addr = mux_hdr->select_addr; in qla4_8xxx_minidump_process_rdmux()
2343 s_stride = mux_hdr->select_value_stride; in qla4_8xxx_minidump_process_rdmux()
2344 s_value = mux_hdr->select_value; in qla4_8xxx_minidump_process_rdmux()
2345 loop_cnt = mux_hdr->op_count; in qla4_8xxx_minidump_process_rdmux()
2348 ha->isp_ops->wr_reg_indirect(ha, s_addr, s_value); in qla4_8xxx_minidump_process_rdmux()
2349 ha->isp_ops->rd_reg_indirect(ha, r_addr, &r_value); in qla4_8xxx_minidump_process_rdmux()
2368 loop_count = cache_hdr->op_count; in qla4_8xxx_minidump_process_l1cache()
2369 r_addr = cache_hdr->read_addr; in qla4_8xxx_minidump_process_l1cache()
2370 c_addr = cache_hdr->control_addr; in qla4_8xxx_minidump_process_l1cache()
2371 c_value_w = cache_hdr->cache_ctrl.write_value; in qla4_8xxx_minidump_process_l1cache()
2373 t_r_addr = cache_hdr->tag_reg_addr; in qla4_8xxx_minidump_process_l1cache()
2374 t_value = cache_hdr->addr_ctrl.init_tag_value; in qla4_8xxx_minidump_process_l1cache()
2375 r_cnt = cache_hdr->read_ctrl.read_addr_cnt; in qla4_8xxx_minidump_process_l1cache()
2378 ha->isp_ops->wr_reg_indirect(ha, t_r_addr, t_value); in qla4_8xxx_minidump_process_l1cache()
2379 ha->isp_ops->wr_reg_indirect(ha, c_addr, c_value_w); in qla4_8xxx_minidump_process_l1cache()
2382 ha->isp_ops->rd_reg_indirect(ha, addr, &r_value); in qla4_8xxx_minidump_process_l1cache()
2384 addr += cache_hdr->read_ctrl.read_addr_stride; in qla4_8xxx_minidump_process_l1cache()
2386 t_value += cache_hdr->addr_ctrl.tag_value_stride; in qla4_8xxx_minidump_process_l1cache()
2403 s_addr = q_hdr->select_addr; in qla4_8xxx_minidump_process_queue()
2404 r_cnt = q_hdr->rd_strd.read_addr_cnt; in qla4_8xxx_minidump_process_queue()
2405 r_stride = q_hdr->rd_strd.read_addr_stride; in qla4_8xxx_minidump_process_queue()
2406 loop_cnt = q_hdr->op_count; in qla4_8xxx_minidump_process_queue()
2409 ha->isp_ops->wr_reg_indirect(ha, s_addr, qid); in qla4_8xxx_minidump_process_queue()
2410 r_addr = q_hdr->read_addr; in qla4_8xxx_minidump_process_queue()
2412 ha->isp_ops->rd_reg_indirect(ha, r_addr, &r_value); in qla4_8xxx_minidump_process_queue()
2416 qid += q_hdr->q_strd.queue_id_stride; in qla4_8xxx_minidump_process_queue()
2435 r_addr = rom_hdr->read_addr; in qla4_82xx_minidump_process_rdrom()
2436 loop_cnt = rom_hdr->read_data_size/sizeof(uint32_t); in qla4_82xx_minidump_process_rdrom()
2443 ha->isp_ops->wr_reg_indirect(ha, MD_DIRECT_ROM_WINDOW, in qla4_82xx_minidump_process_rdrom()
2445 ha->isp_ops->rd_reg_indirect(ha, in qla4_82xx_minidump_process_rdrom()
2470 r_addr = m_hdr->read_addr; in __qla4_8xxx_minidump_process_rdmem()
2471 loop_cnt = m_hdr->read_data_size/16; in __qla4_8xxx_minidump_process_rdmem()
2475 __func__, r_addr, m_hdr->read_data_size)); in __qla4_8xxx_minidump_process_rdmem()
2484 if (m_hdr->read_data_size % 16) { in __qla4_8xxx_minidump_process_rdmem()
2487 __func__, m_hdr->read_data_size)); in __qla4_8xxx_minidump_process_rdmem()
2493 __func__, r_addr, m_hdr->read_data_size, loop_cnt)); in __qla4_8xxx_minidump_process_rdmem()
2495 write_lock_irqsave(&ha->hw_lock, flags); in __qla4_8xxx_minidump_process_rdmem()
2497 ha->isp_ops->wr_reg_indirect(ha, MD_MIU_TEST_AGT_ADDR_LO, in __qla4_8xxx_minidump_process_rdmem()
2500 ha->isp_ops->wr_reg_indirect(ha, MD_MIU_TEST_AGT_ADDR_HI, in __qla4_8xxx_minidump_process_rdmem()
2503 ha->isp_ops->wr_reg_indirect(ha, MD_MIU_TEST_AGT_CTRL, r_value); in __qla4_8xxx_minidump_process_rdmem()
2505 ha->isp_ops->wr_reg_indirect(ha, MD_MIU_TEST_AGT_CTRL, r_value); in __qla4_8xxx_minidump_process_rdmem()
2508 ha->isp_ops->rd_reg_indirect(ha, MD_MIU_TEST_AGT_CTRL, in __qla4_8xxx_minidump_process_rdmem()
2518 write_unlock_irqrestore(&ha->hw_lock, flags); in __qla4_8xxx_minidump_process_rdmem()
2523 ha->isp_ops->rd_reg_indirect(ha, in __qla4_8xxx_minidump_process_rdmem()
2531 write_unlock_irqrestore(&ha->hw_lock, flags); in __qla4_8xxx_minidump_process_rdmem()
2559 entry_hdr->d_ctrl.driver_flags |= QLA8XXX_DBG_SKIPPED_FLAG; in qla4_8xxx_mark_entry_skipped()
2561 "scsi(%ld): Skipping entry[%d]: ETYPE[0x%x]-ELEVEL[0x%x]\n", in qla4_8xxx_mark_entry_skipped()
2562 ha->host_no, index, entry_hdr->entry_type, in qla4_8xxx_mark_entry_skipped()
2563 entry_hdr->d_ctrl.entry_capture_mask)); in qla4_8xxx_mark_entry_skipped()
2568 ha->fw_dump_skip_size += entry_hdr->entry_capture_size; in qla4_8xxx_mark_entry_skipped()
2583 s_addr = le32_to_cpu(pollrd_hdr->select_addr); in qla83xx_minidump_process_pollrd()
2584 r_addr = le32_to_cpu(pollrd_hdr->read_addr); in qla83xx_minidump_process_pollrd()
2585 s_value = le32_to_cpu(pollrd_hdr->select_value); in qla83xx_minidump_process_pollrd()
2586 s_stride = le32_to_cpu(pollrd_hdr->select_value_stride); in qla83xx_minidump_process_pollrd()
2588 poll_wait = le32_to_cpu(pollrd_hdr->poll_wait); in qla83xx_minidump_process_pollrd()
2589 poll_mask = le32_to_cpu(pollrd_hdr->poll_mask); in qla83xx_minidump_process_pollrd()
2591 for (i = 0; i < le32_to_cpu(pollrd_hdr->op_count); i++) { in qla83xx_minidump_process_pollrd()
2592 ha->isp_ops->wr_reg_indirect(ha, s_addr, s_value); in qla83xx_minidump_process_pollrd()
2593 poll_wait = le32_to_cpu(pollrd_hdr->poll_wait); in qla83xx_minidump_process_pollrd()
2595 ha->isp_ops->rd_reg_indirect(ha, s_addr, &r_value); in qla83xx_minidump_process_pollrd()
2601 if (--poll_wait == 0) { in qla83xx_minidump_process_pollrd()
2609 ha->isp_ops->rd_reg_indirect(ha, r_addr, &r_value); in qla83xx_minidump_process_pollrd()
2636 addr1 = le32_to_cpu(rddfe->addr_1); in qla4_84xx_minidump_process_rddfe()
2637 value = le32_to_cpu(rddfe->value); in qla4_84xx_minidump_process_rddfe()
2638 stride = le32_to_cpu(rddfe->stride); in qla4_84xx_minidump_process_rddfe()
2639 stride2 = le32_to_cpu(rddfe->stride2); in qla4_84xx_minidump_process_rddfe()
2640 count = le32_to_cpu(rddfe->count); in qla4_84xx_minidump_process_rddfe()
2642 poll = le32_to_cpu(rddfe->poll); in qla4_84xx_minidump_process_rddfe()
2643 mask = le32_to_cpu(rddfe->mask); in qla4_84xx_minidump_process_rddfe()
2644 modify_mask = le32_to_cpu(rddfe->modify_mask); in qla4_84xx_minidump_process_rddfe()
2649 ha->isp_ops->wr_reg_indirect(ha, addr1, (0x40000000 | value)); in qla4_84xx_minidump_process_rddfe()
2653 ha->isp_ops->rd_reg_indirect(ha, addr1, &temp); in qla4_84xx_minidump_process_rddfe()
2664 ha->isp_ops->rd_reg_indirect(ha, addr2, &temp); in qla4_84xx_minidump_process_rddfe()
2669 ha->isp_ops->wr_reg_indirect(ha, addr2, wrval); in qla4_84xx_minidump_process_rddfe()
2670 ha->isp_ops->wr_reg_indirect(ha, addr1, value); in qla4_84xx_minidump_process_rddfe()
2674 ha->isp_ops->rd_reg_indirect(ha, addr1, &temp); in qla4_84xx_minidump_process_rddfe()
2686 ha->isp_ops->wr_reg_indirect(ha, addr1, in qla4_84xx_minidump_process_rddfe()
2691 ha->isp_ops->rd_reg_indirect(ha, addr1, &temp); in qla4_84xx_minidump_process_rddfe()
2704 ha->isp_ops->rd_reg_indirect(ha, addr2, &data); in qla4_84xx_minidump_process_rddfe()
2730 addr1 = le32_to_cpu(rdmdio->addr_1); in qla4_84xx_minidump_process_rdmdio()
2731 addr2 = le32_to_cpu(rdmdio->addr_2); in qla4_84xx_minidump_process_rdmdio()
2732 value1 = le32_to_cpu(rdmdio->value_1); in qla4_84xx_minidump_process_rdmdio()
2733 stride1 = le32_to_cpu(rdmdio->stride_1); in qla4_84xx_minidump_process_rdmdio()
2734 stride2 = le32_to_cpu(rdmdio->stride_2); in qla4_84xx_minidump_process_rdmdio()
2735 count = le32_to_cpu(rdmdio->count); in qla4_84xx_minidump_process_rdmdio()
2737 mask = le32_to_cpu(rdmdio->mask); in qla4_84xx_minidump_process_rdmdio()
2738 value2 = le32_to_cpu(rdmdio->value_2); in qla4_84xx_minidump_process_rdmdio()
2748 addr4 = addr2 - stride1; in qla4_84xx_minidump_process_rdmdio()
2754 addr5 = addr2 - (2 * stride1); in qla4_84xx_minidump_process_rdmdio()
2760 addr6 = addr2 - (3 * stride1); in qla4_84xx_minidump_process_rdmdio()
2771 addr7 = addr2 - (4 * stride1); in qla4_84xx_minidump_process_rdmdio()
2779 stride2 = le32_to_cpu(rdmdio->stride_2); in qla4_84xx_minidump_process_rdmdio()
2801 addr1 = le32_to_cpu(pollwr_hdr->addr_1); in qla4_84xx_minidump_process_pollwr()
2802 addr2 = le32_to_cpu(pollwr_hdr->addr_2); in qla4_84xx_minidump_process_pollwr()
2803 value1 = le32_to_cpu(pollwr_hdr->value_1); in qla4_84xx_minidump_process_pollwr()
2804 value2 = le32_to_cpu(pollwr_hdr->value_2); in qla4_84xx_minidump_process_pollwr()
2806 poll = le32_to_cpu(pollwr_hdr->poll); in qla4_84xx_minidump_process_pollwr()
2809 ha->isp_ops->rd_reg_indirect(ha, addr1, &r_value); in qla4_84xx_minidump_process_pollwr()
2823 ha->isp_ops->wr_reg_indirect(ha, addr2, value2); in qla4_84xx_minidump_process_pollwr()
2824 ha->isp_ops->wr_reg_indirect(ha, addr1, value1); in qla4_84xx_minidump_process_pollwr()
2828 ha->isp_ops->rd_reg_indirect(ha, addr1, &r_value); in qla4_84xx_minidump_process_pollwr()
2849 sel_val1 = le32_to_cpu(rdmux2_hdr->select_value_1); in qla83xx_minidump_process_rdmux2()
2850 sel_val2 = le32_to_cpu(rdmux2_hdr->select_value_2); in qla83xx_minidump_process_rdmux2()
2851 sel_addr1 = le32_to_cpu(rdmux2_hdr->select_addr_1); in qla83xx_minidump_process_rdmux2()
2852 sel_addr2 = le32_to_cpu(rdmux2_hdr->select_addr_2); in qla83xx_minidump_process_rdmux2()
2853 sel_val_mask = le32_to_cpu(rdmux2_hdr->select_value_mask); in qla83xx_minidump_process_rdmux2()
2854 read_addr = le32_to_cpu(rdmux2_hdr->read_addr); in qla83xx_minidump_process_rdmux2()
2856 for (i = 0; i < rdmux2_hdr->op_count; i++) { in qla83xx_minidump_process_rdmux2()
2857 ha->isp_ops->wr_reg_indirect(ha, sel_addr1, sel_val1); in qla83xx_minidump_process_rdmux2()
2861 ha->isp_ops->wr_reg_indirect(ha, sel_addr2, t_sel_val); in qla83xx_minidump_process_rdmux2()
2862 ha->isp_ops->rd_reg_indirect(ha, read_addr, &data); in qla83xx_minidump_process_rdmux2()
2866 ha->isp_ops->wr_reg_indirect(ha, sel_addr1, sel_val2); in qla83xx_minidump_process_rdmux2()
2870 ha->isp_ops->wr_reg_indirect(ha, sel_addr2, t_sel_val); in qla83xx_minidump_process_rdmux2()
2871 ha->isp_ops->rd_reg_indirect(ha, read_addr, &data); in qla83xx_minidump_process_rdmux2()
2875 sel_val1 += rdmux2_hdr->select_value_stride; in qla83xx_minidump_process_rdmux2()
2876 sel_val2 += rdmux2_hdr->select_value_stride; in qla83xx_minidump_process_rdmux2()
2893 addr_1 = le32_to_cpu(poll_hdr->addr_1); in qla83xx_minidump_process_pollrdmwr()
2894 addr_2 = le32_to_cpu(poll_hdr->addr_2); in qla83xx_minidump_process_pollrdmwr()
2895 value_1 = le32_to_cpu(poll_hdr->value_1); in qla83xx_minidump_process_pollrdmwr()
2896 value_2 = le32_to_cpu(poll_hdr->value_2); in qla83xx_minidump_process_pollrdmwr()
2897 poll_mask = le32_to_cpu(poll_hdr->poll_mask); in qla83xx_minidump_process_pollrdmwr()
2899 ha->isp_ops->wr_reg_indirect(ha, addr_1, value_1); in qla83xx_minidump_process_pollrdmwr()
2901 poll_wait = le32_to_cpu(poll_hdr->poll_wait); in qla83xx_minidump_process_pollrdmwr()
2903 ha->isp_ops->rd_reg_indirect(ha, addr_1, &r_value); in qla83xx_minidump_process_pollrdmwr()
2909 if (--poll_wait == 0) { in qla83xx_minidump_process_pollrdmwr()
2918 ha->isp_ops->rd_reg_indirect(ha, addr_2, &data); in qla83xx_minidump_process_pollrdmwr()
2919 data &= le32_to_cpu(poll_hdr->modify_mask); in qla83xx_minidump_process_pollrdmwr()
2920 ha->isp_ops->wr_reg_indirect(ha, addr_2, data); in qla83xx_minidump_process_pollrdmwr()
2921 ha->isp_ops->wr_reg_indirect(ha, addr_1, value_2); in qla83xx_minidump_process_pollrdmwr()
2923 poll_wait = le32_to_cpu(poll_hdr->poll_wait); in qla83xx_minidump_process_pollrdmwr()
2925 ha->isp_ops->rd_reg_indirect(ha, addr_1, &r_value); in qla83xx_minidump_process_pollrdmwr()
2931 if (--poll_wait == 0) { in qla83xx_minidump_process_pollrdmwr()
2957 fl_addr = le32_to_cpu(rom_hdr->read_addr); in qla4_83xx_minidump_process_rdrom()
2958 u32_count = le32_to_cpu(rom_hdr->read_data_size)/sizeof(uint32_t); in qla4_83xx_minidump_process_rdrom()
2980 * qla4_8xxx_collect_md_data - Retrieve firmware minidump data.
2994 ha->fw_dump_skip_size = 0; in qla4_8xxx_collect_md_data()
2995 if (!ha->fw_dump) { in qla4_8xxx_collect_md_data()
2997 __func__, ha->host_no); in qla4_8xxx_collect_md_data()
3002 ha->fw_dump_tmplt_hdr; in qla4_8xxx_collect_md_data()
3003 data_ptr = (uint32_t *)((uint8_t *)ha->fw_dump + in qla4_8xxx_collect_md_data()
3004 ha->fw_dump_tmplt_size); in qla4_8xxx_collect_md_data()
3005 data_collected += ha->fw_dump_tmplt_size; in qla4_8xxx_collect_md_data()
3007 num_entry_hdr = tmplt_hdr->num_of_entries; in qla4_8xxx_collect_md_data()
3014 __func__, ha->fw_dump_capture_mask); in qla4_8xxx_collect_md_data()
3016 __func__, ha->fw_dump_size, ha->fw_dump_size); in qla4_8xxx_collect_md_data()
3021 tmplt_hdr->driver_timestamp = timestamp; in qla4_8xxx_collect_md_data()
3024 (((uint8_t *)ha->fw_dump_tmplt_hdr) + in qla4_8xxx_collect_md_data()
3025 tmplt_hdr->first_entry_offset); in qla4_8xxx_collect_md_data()
3028 tmplt_hdr->saved_state_array[QLA83XX_SS_OCM_WNDREG_INDEX] = in qla4_8xxx_collect_md_data()
3029 tmplt_hdr->ocm_window_reg[ha->func_num]; in qla4_8xxx_collect_md_data()
3031 /* Walk through the entry headers - validate/perform required action */ in qla4_8xxx_collect_md_data()
3033 if (data_collected > ha->fw_dump_size) { in qla4_8xxx_collect_md_data()
3036 data_collected, ha->fw_dump_size); in qla4_8xxx_collect_md_data()
3040 if (!(entry_hdr->d_ctrl.entry_capture_mask & in qla4_8xxx_collect_md_data()
3041 ha->fw_dump_capture_mask)) { in qla4_8xxx_collect_md_data()
3042 entry_hdr->d_ctrl.driver_flags |= in qla4_8xxx_collect_md_data()
3050 (ha->fw_dump_size - data_collected))); in qla4_8xxx_collect_md_data()
3055 switch (entry_hdr->entry_type) { in qla4_8xxx_collect_md_data()
3176 data_collected = (uint8_t *)data_ptr - (uint8_t *)ha->fw_dump; in qla4_8xxx_collect_md_data()
3181 entry_hdr->entry_size); in qla4_8xxx_collect_md_data()
3184 if ((data_collected + ha->fw_dump_skip_size) != ha->fw_dump_size) { in qla4_8xxx_collect_md_data()
3187 data_collected, ha->fw_dump_size); in qla4_8xxx_collect_md_data()
3199 * qla4_8xxx_uevent_emit - Send uevent when the firmware dump is ready.
3211 ha->host_no); in qla4_8xxx_uevent_emit()
3218 kobject_uevent_env(&(&ha->pdev->dev)->kobj, KOBJ_CHANGE, envp); in qla4_8xxx_uevent_emit()
3223 if (ql4xenablemd && test_bit(AF_FW_RECOVERY, &ha->flags) && in qla4_8xxx_get_minidump()
3224 !test_bit(AF_82XX_FW_DUMPED, &ha->flags)) { in qla4_8xxx_get_minidump()
3227 set_bit(AF_82XX_FW_DUMPED, &ha->flags); in qla4_8xxx_get_minidump()
3236 * qla4_8xxx_device_bootstrap - Initialize device, set DEV_READY, start fw
3248 need_reset = ha->isp_ops->need_reset(ha); in qla4_8xxx_device_bootstrap()
3252 if (test_bit(AF_FW_RECOVERY, &ha->flags)) in qla4_8xxx_device_bootstrap()
3253 ha->isp_ops->rom_lock_recovery(ha); in qla4_8xxx_device_bootstrap()
3265 ha->isp_ops->rom_lock_recovery(ha); in qla4_8xxx_device_bootstrap()
3273 ha->isp_ops->idc_unlock(ha); in qla4_8xxx_device_bootstrap()
3278 rval = ha->isp_ops->restart_firmware(ha); in qla4_8xxx_device_bootstrap()
3279 ha->isp_ops->idc_lock(ha); in qla4_8xxx_device_bootstrap()
3297 * qla4_82xx_need_reset_handler - Code to start reset sequence
3312 if (test_and_clear_bit(AF_ONLINE, &ha->flags)) { in qla4_82xx_need_reset_handler()
3314 ha->isp_ops->disable_intrs(ha); in qla4_82xx_need_reset_handler()
3318 if (!test_bit(AF_8XXX_RST_OWNER, &ha->flags)) { in qla4_82xx_need_reset_handler()
3321 __func__, ha->host_no)); in qla4_82xx_need_reset_handler()
3324 active_mask = (~(1 << (ha->func_num * 4))); in qla4_82xx_need_reset_handler()
3328 reset_timeout = jiffies + (ha->nx_reset_timeout * HZ); in qla4_82xx_need_reset_handler()
3335 __func__, ha->host_no, drv_state, drv_active); in qla4_82xx_need_reset_handler()
3349 if (test_bit(AF_8XXX_RST_OWNER, &ha->flags)) { in qla4_82xx_need_reset_handler()
3352 __func__, ha->host_no, drv_state, in qla4_82xx_need_reset_handler()
3364 clear_bit(AF_8XXX_RST_OWNER, &ha->flags); in qla4_82xx_need_reset_handler()
3372 ql4_printk(KERN_INFO, ha, "HW State: COLD/RE-INIT\n"); in qla4_82xx_need_reset_handler()
3379 * qla4_8xxx_need_qsnt_handler - Code to start qsnt
3385 ha->isp_ops->idc_lock(ha); in qla4_8xxx_need_qsnt_handler()
3387 ha->isp_ops->idc_unlock(ha); in qla4_8xxx_need_qsnt_handler()
3396 if (drv_active == (1 << (ha->func_num * 4))) { in qla4_82xx_set_idc_ver()
3419 if (drv_active == (1 << ha->func_num)) { in qla4_83xx_set_idc_ver()
3442 idc_ver &= ~(0x03 << (ha->func_num * 2)); in qla4_83xx_set_idc_ver()
3443 idc_ver |= (QLA83XX_IDC_VER_MIN_VALUE << (ha->func_num * 2)); in qla4_83xx_set_idc_ver()
3455 if (test_bit(AF_INIT_DONE, &ha->flags)) in qla4_8xxx_update_idc_reg()
3458 ha->isp_ops->idc_lock(ha); in qla4_8xxx_update_idc_reg()
3467 if ((drv_active == (1 << ha->func_num)) && !ql4xdontresethba) in qla4_8xxx_update_idc_reg()
3479 ha->isp_ops->idc_unlock(ha); in qla4_8xxx_update_idc_reg()
3486 * qla4_8xxx_device_state_handler - Adapter state machine
3487 * @ha: pointer to host adapter structure.
3507 dev_init_timeout = jiffies + (ha->nx_dev_init_timeout * HZ); in qla4_8xxx_device_state_handler()
3509 ha->isp_ops->idc_lock(ha); in qla4_8xxx_device_state_handler()
3535 ha->isp_ops->idc_unlock(ha); in qla4_8xxx_device_state_handler()
3537 ha->isp_ops->idc_lock(ha); in qla4_8xxx_device_state_handler()
3553 (ha->nx_dev_init_timeout * HZ); in qla4_8xxx_device_state_handler()
3555 ha->isp_ops->idc_unlock(ha); in qla4_8xxx_device_state_handler()
3557 ha->isp_ops->idc_lock(ha); in qla4_8xxx_device_state_handler()
3566 ha->isp_ops->idc_unlock(ha); in qla4_8xxx_device_state_handler()
3568 ha->isp_ops->idc_lock(ha); in qla4_8xxx_device_state_handler()
3571 ha->isp_ops->idc_unlock(ha); in qla4_8xxx_device_state_handler()
3574 ha->isp_ops->idc_lock(ha); in qla4_8xxx_device_state_handler()
3577 ha->isp_ops->idc_unlock(ha); in qla4_8xxx_device_state_handler()
3580 ha->isp_ops->idc_lock(ha); in qla4_8xxx_device_state_handler()
3585 ha->isp_ops->idc_unlock(ha); in qla4_8xxx_device_state_handler()
3596 writel(0, &ha->qla4_83xx_reg->risc_intr); in qla4_8xxx_load_risc()
3597 readl(&ha->qla4_83xx_reg->risc_intr); in qla4_8xxx_load_risc()
3599 writel(0, &ha->qla4_82xx_reg->host_int); in qla4_8xxx_load_risc()
3600 readl(&ha->qla4_82xx_reg->host_int); in qla4_8xxx_load_risc()
3609 if (retval == QLA_SUCCESS && !test_bit(AF_IRQ_ATTACHED, &ha->flags)) in qla4_8xxx_load_risc()
3629 return hw->flash_conf_off | faddr; in flash_conf_addr()
3681 * FLT-location structure resides after the last PCI region. in qla4_8xxx_find_flt_start()
3701 struct ql82xx_hw_data *hw = &ha->hw; in qla4_8xxx_get_flt_info()
3703 hw->flt_region_flt = flt_addr; in qla4_8xxx_get_flt_info()
3704 wptr = (uint16_t *)ha->request_ring; in qla4_8xxx_get_flt_info()
3705 flt = (struct qla_flt_header *)ha->request_ring; in qla4_8xxx_get_flt_info()
3709 qla4_82xx_read_optrom_data(ha, (uint8_t *)ha->request_ring, in qla4_8xxx_get_flt_info()
3713 (uint8_t *)ha->request_ring, in qla4_8xxx_get_flt_info()
3721 if (flt->version != cpu_to_le16(1)) { in qla4_8xxx_get_flt_info()
3724 le16_to_cpu(flt->version), le16_to_cpu(flt->length), in qla4_8xxx_get_flt_info()
3725 le16_to_cpu(flt->checksum))); in qla4_8xxx_get_flt_info()
3729 cnt = (sizeof(struct qla_flt_header) + le16_to_cpu(flt->length)) >> 1; in qla4_8xxx_get_flt_info()
3730 for (chksum = 0; cnt; cnt--) in qla4_8xxx_get_flt_info()
3735 le16_to_cpu(flt->version), le16_to_cpu(flt->length), in qla4_8xxx_get_flt_info()
3741 cnt = le16_to_cpu(flt->length) / sizeof(struct qla_flt_region); in qla4_8xxx_get_flt_info()
3742 for ( ; cnt; cnt--, region++) { in qla4_8xxx_get_flt_info()
3744 start = le32_to_cpu(region->start) >> 2; in qla4_8xxx_get_flt_info()
3747 "end=0x%x size=0x%x.\n", le32_to_cpu(region->code), start, in qla4_8xxx_get_flt_info()
3748 le32_to_cpu(region->end) >> 2, le32_to_cpu(region->size))); in qla4_8xxx_get_flt_info()
3750 switch (le32_to_cpu(region->code) & 0xff) { in qla4_8xxx_get_flt_info()
3752 hw->flt_region_fdt = start; in qla4_8xxx_get_flt_info()
3755 hw->flt_region_boot = start; in qla4_8xxx_get_flt_info()
3759 hw->flt_region_fw = start; in qla4_8xxx_get_flt_info()
3762 hw->flt_region_bootload = start; in qla4_8xxx_get_flt_info()
3765 hw->flt_iscsi_param = start; in qla4_8xxx_get_flt_info()
3768 hw->flt_region_chap = start; in qla4_8xxx_get_flt_info()
3769 hw->flt_chap_size = le32_to_cpu(region->size); in qla4_8xxx_get_flt_info()
3772 hw->flt_region_ddb = start; in qla4_8xxx_get_flt_info()
3773 hw->flt_ddb_size = le32_to_cpu(region->size); in qla4_8xxx_get_flt_info()
3783 hw->flt_region_fdt = FA_FLASH_DESCR_ADDR_82; in qla4_8xxx_get_flt_info()
3784 hw->flt_region_boot = FA_BOOT_CODE_ADDR_82; in qla4_8xxx_get_flt_info()
3785 hw->flt_region_bootload = FA_BOOT_LOAD_ADDR_82; in qla4_8xxx_get_flt_info()
3786 hw->flt_region_fw = FA_RISC_CODE_ADDR_82; in qla4_8xxx_get_flt_info()
3787 hw->flt_region_chap = FA_FLASH_ISCSI_CHAP >> 2; in qla4_8xxx_get_flt_info()
3788 hw->flt_chap_size = FA_FLASH_CHAP_SIZE; in qla4_8xxx_get_flt_info()
3789 hw->flt_region_ddb = FA_FLASH_ISCSI_DDB >> 2; in qla4_8xxx_get_flt_info()
3790 hw->flt_ddb_size = FA_FLASH_DDB_SIZE; in qla4_8xxx_get_flt_info()
3795 loc, hw->flt_region_flt, hw->flt_region_fdt, in qla4_8xxx_get_flt_info()
3796 hw->flt_region_boot, hw->flt_region_bootload, in qla4_8xxx_get_flt_info()
3797 hw->flt_region_fw, hw->flt_region_chap, in qla4_8xxx_get_flt_info()
3798 hw->flt_chap_size, hw->flt_region_ddb, in qla4_8xxx_get_flt_info()
3799 hw->flt_ddb_size)); in qla4_8xxx_get_flt_info()
3814 struct ql82xx_hw_data *hw = &ha->hw; in qla4_82xx_get_fdt_info()
3816 hw->flash_conf_off = FARX_ACCESS_FLASH_CONF; in qla4_82xx_get_fdt_info()
3817 hw->flash_data_off = FARX_ACCESS_FLASH_DATA; in qla4_82xx_get_fdt_info()
3819 wptr = (uint16_t *)ha->request_ring; in qla4_82xx_get_fdt_info()
3820 fdt = (struct qla_fdt_layout *)ha->request_ring; in qla4_82xx_get_fdt_info()
3821 qla4_82xx_read_optrom_data(ha, (uint8_t *)ha->request_ring, in qla4_82xx_get_fdt_info()
3822 hw->flt_region_fdt << 2, OPTROM_BURST_SIZE); in qla4_82xx_get_fdt_info()
3827 if (fdt->sig[0] != 'Q' || fdt->sig[1] != 'L' || fdt->sig[2] != 'I' || in qla4_82xx_get_fdt_info()
3828 fdt->sig[3] != 'D') in qla4_82xx_get_fdt_info()
3837 "checksum=0x%x id=%c version=0x%x.\n", chksum, fdt->sig[0], in qla4_82xx_get_fdt_info()
3838 le16_to_cpu(fdt->version))); in qla4_82xx_get_fdt_info()
3843 mid = le16_to_cpu(fdt->man_id); in qla4_82xx_get_fdt_info()
3844 fid = le16_to_cpu(fdt->id); in qla4_82xx_get_fdt_info()
3845 hw->fdt_wrt_disable = fdt->wrt_disable_bits; in qla4_82xx_get_fdt_info()
3846 hw->fdt_erase_cmd = flash_conf_addr(hw, 0x0300 | fdt->erase_cmd); in qla4_82xx_get_fdt_info()
3847 hw->fdt_block_size = le32_to_cpu(fdt->block_size); in qla4_82xx_get_fdt_info()
3849 if (fdt->unprotect_sec_cmd) { in qla4_82xx_get_fdt_info()
3850 hw->fdt_unprotect_sec_cmd = flash_conf_addr(hw, 0x0300 | in qla4_82xx_get_fdt_info()
3851 fdt->unprotect_sec_cmd); in qla4_82xx_get_fdt_info()
3852 hw->fdt_protect_sec_cmd = fdt->protect_sec_cmd ? in qla4_82xx_get_fdt_info()
3853 flash_conf_addr(hw, 0x0300 | fdt->protect_sec_cmd) : in qla4_82xx_get_fdt_info()
3860 hw->fdt_block_size = FLASH_BLK_SIZE_64K; in qla4_82xx_get_fdt_info()
3864 hw->fdt_erase_cmd, hw->fdt_protect_sec_cmd, in qla4_82xx_get_fdt_info()
3865 hw->fdt_unprotect_sec_cmd, hw->fdt_wrt_disable, in qla4_82xx_get_fdt_info()
3866 hw->fdt_block_size)); in qla4_82xx_get_fdt_info()
3877 wptr = (uint32_t *)ha->request_ring; in qla4_82xx_get_idc_param()
3878 qla4_82xx_read_optrom_data(ha, (uint8_t *)ha->request_ring, in qla4_82xx_get_idc_param()
3882 ha->nx_dev_init_timeout = ROM_DEV_INIT_TIMEOUT; in qla4_82xx_get_idc_param()
3883 ha->nx_reset_timeout = ROM_DRV_RESET_ACK_TIMEOUT; in qla4_82xx_get_idc_param()
3885 ha->nx_dev_init_timeout = le32_to_cpu(*wptr++); in qla4_82xx_get_idc_param()
3886 ha->nx_reset_timeout = le32_to_cpu(*wptr); in qla4_82xx_get_idc_param()
3890 "ha->nx_dev_init_timeout = %d\n", ha->nx_dev_init_timeout)); in qla4_82xx_get_idc_param()
3892 "ha->nx_reset_timeout = %d\n", ha->nx_reset_timeout)); in qla4_82xx_get_idc_param()
3903 writel(mbx_cmd[i], &ha->qla4_82xx_reg->mailbox_in[i]); in qla4_82xx_queue_mbox_cmd()
3906 writel(mbx_cmd[0], &ha->qla4_82xx_reg->mailbox_in[0]); in qla4_82xx_queue_mbox_cmd()
3907 readl(&ha->qla4_82xx_reg->mailbox_in[0]); in qla4_82xx_queue_mbox_cmd()
3908 writel(HINT_MBX_INT_PENDING, &ha->qla4_82xx_reg->hint); in qla4_82xx_queue_mbox_cmd()
3909 readl(&ha->qla4_82xx_reg->hint); in qla4_82xx_queue_mbox_cmd()
3916 intr_status = readl(&ha->qla4_82xx_reg->host_int); in qla4_82xx_process_mbox_intr()
3918 ha->mbox_status_count = out_count; in qla4_82xx_process_mbox_intr()
3919 intr_status = readl(&ha->qla4_82xx_reg->host_status); in qla4_82xx_process_mbox_intr()
3920 ha->isp_ops->interrupt_service_routine(ha, intr_status); in qla4_82xx_process_mbox_intr()
3922 if (test_bit(AF_INTERRUPTS_ON, &ha->flags) && in qla4_82xx_process_mbox_intr()
3923 (!ha->pdev->msi_enabled && !ha->pdev->msix_enabled)) in qla4_82xx_process_mbox_intr()
3924 qla4_82xx_wr_32(ha, ha->nx_legacy_intr.tgt_mask_reg, in qla4_82xx_process_mbox_intr()
3951 * qla4_8xxx_stop_firmware - stops firmware on specified adapter instance
3952 * @ha: pointer to host adapter structure.
3973 DEBUG2(printk("scsi%ld: %s: status = %d\n", ha->host_no, in qla4_8xxx_stop_firmware()
3979 * qla4_82xx_isp_reset - Resets ISP and aborts all outstanding commands.
3980 * @ha: pointer to host adapter structure.
3995 set_bit(AF_8XXX_RST_OWNER, &ha->flags); in qla4_82xx_isp_reset()
4009 clear_bit(AF_FW_RECOVERY, &ha->flags); in qla4_82xx_isp_reset()
4016 * qla4_8xxx_get_sys_info - get adapter MAC address(es) and serial number
4017 * @ha: pointer to host adapter structure.
4028 sys_info = dma_alloc_coherent(&ha->pdev->dev, sizeof(*sys_info), in qla4_8xxx_get_sys_info()
4032 ha->host_no, __func__)); in qla4_8xxx_get_sys_info()
4047 ha->host_no, __func__)); in qla4_8xxx_get_sys_info()
4052 if (((is_qla8032(ha) || is_qla8042(ha)) ? mbox_sts[3] : mbox_sts[4]) < in qla4_8xxx_get_sys_info()
4055 " error (%x)\n", ha->host_no, __func__, mbox_sts[4])); in qla4_8xxx_get_sys_info()
4060 ha->port_num = sys_info->port_num; in qla4_8xxx_get_sys_info()
4061 memcpy(ha->my_mac, &sys_info->mac_addr[0], in qla4_8xxx_get_sys_info()
4062 min(sizeof(ha->my_mac), sizeof(sys_info->mac_addr))); in qla4_8xxx_get_sys_info()
4063 memcpy(ha->serial_number, &sys_info->serial_number, in qla4_8xxx_get_sys_info()
4064 min(sizeof(ha->serial_number), sizeof(sys_info->serial_number))); in qla4_8xxx_get_sys_info()
4065 memcpy(ha->model_name, &sys_info->board_id_str, in qla4_8xxx_get_sys_info()
4066 min(sizeof(ha->model_name), sizeof(sys_info->board_id_str))); in qla4_8xxx_get_sys_info()
4067 ha->phy_port_cnt = sys_info->phys_port_cnt; in qla4_8xxx_get_sys_info()
4068 ha->phy_port_num = sys_info->port_num; in qla4_8xxx_get_sys_info()
4069 ha->iscsi_pci_func_cnt = sys_info->iscsi_pci_func_cnt; in qla4_8xxx_get_sys_info()
4072 ha->host_no, __func__, ha->my_mac, ha->serial_number)); in qla4_8xxx_get_sys_info()
4077 dma_free_coherent(&ha->pdev->dev, sizeof(*sys_info), sys_info, in qla4_8xxx_get_sys_info()
4132 spin_lock_irq(&ha->hardware_lock); in qla4_82xx_enable_intrs()
4133 /* BIT 10 - reset */ in qla4_82xx_enable_intrs()
4134 qla4_82xx_wr_32(ha, ha->nx_legacy_intr.tgt_mask_reg, 0xfbff); in qla4_82xx_enable_intrs()
4135 spin_unlock_irq(&ha->hardware_lock); in qla4_82xx_enable_intrs()
4136 set_bit(AF_INTERRUPTS_ON, &ha->flags); in qla4_82xx_enable_intrs()
4142 if (test_and_clear_bit(AF_INTERRUPTS_ON, &ha->flags)) in qla4_82xx_disable_intrs()
4145 spin_lock_irq(&ha->hardware_lock); in qla4_82xx_disable_intrs()
4146 /* BIT 10 - set */ in qla4_82xx_disable_intrs()
4147 qla4_82xx_wr_32(ha, ha->nx_legacy_intr.tgt_mask_reg, 0x0400); in qla4_82xx_disable_intrs()
4148 spin_unlock_irq(&ha->hardware_lock); in qla4_82xx_disable_intrs()
4156 ret = pci_alloc_irq_vectors(ha->pdev, QLA_MSIX_ENTRIES, in qla4_8xxx_enable_msix()
4160 "MSI-X: Failed to enable support -- %d/%d\n", in qla4_8xxx_enable_msix()
4165 ret = request_irq(pci_irq_vector(ha->pdev, 0), in qla4_8xxx_enable_msix()
4171 ret = request_irq(pci_irq_vector(ha->pdev, 1), in qla4_8xxx_enable_msix()
4179 free_irq(pci_irq_vector(ha->pdev, 0), ha); in qla4_8xxx_enable_msix()
4181 pci_free_irq_vectors(ha->pdev); in qla4_8xxx_enable_msix()
4190 if (!test_bit(AF_IRQ_ATTACHED, &ha->flags)) { in qla4_8xxx_check_init_adapter_retry()