Lines Matching +full:00 +full:- +full:40 +full:bit
1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright (c) 2003-2013 QLogic Corporation
27 __le32 rsrvd1[32]; /* 0x60-0xdf */
30 __le32 rsrvd2[5]; /* 0xe8-0xfb */
35 __le32 rsrvd0[12]; /* 0x50-0x79 */
37 __le32 rsrvd1[31]; /* 0x84-0xFF */
44 __le32 req_q_out; /* 0x0000 (R): Request Queue out-Pointer. */
45 __le32 reserve1[63]; /* Request Queue out-Pointer. (64 * 4) */
46 __le32 rsp_q_in; /* 0x0100 (R/W): Response Queue In-Pointer. */
47 __le32 reserve2[63]; /* Response Queue In-Pointer. */
48 __le32 rsp_q_out; /* 0x0200 (R/W): Response Queue Out-Pointer. */
49 __le32 reserve3[63]; /* Response Queue Out-Pointer. */
90 __le32 host_intr; /* 0x3038 - Host Interrupt Register */
91 __le32 risc_intr; /* 0x303C - RISC Interrupt Register */
93 __le32 leg_int_ptr; /* 0x38C0 - Legacy Interrupt Pointer Register */
94 __le32 leg_int_trig; /* 0x38C4 - Legacy Interrupt Trigger Control */
95 __le32 leg_int_mask; /* 0x38C8 - Legacy Interrupt Mask Register */
198 /* Register Mask - sets corresponding mask bits in the upper word */
262 * referred to by 16 bit quantities. Platform and
415 #define MBOX_CMD_GET_NVRAM 0x0078 /* For 40xx */
416 #define MBOX_CMD_SET_NVRAM 0x0079 /* For 40xx */
556 uint8_t version; /* 00 */
562 uint16_t fw_options; /* 02-03 */
569 uint16_t exec_throttle; /* 04-05 */
572 uint16_t eth_mtu_size; /* 08-09 */
573 uint16_t add_fw_options; /* 0A-0B */
579 uint16_t res1; /* 0E-0F */
580 uint16_t rqq_consumer_idx; /* 10-11 */
581 uint16_t compq_producer_idx; /* 12-13 */
582 uint16_t rqq_len; /* 14-15 */
583 uint16_t compq_len; /* 16-17 */
584 uint32_t rqq_addr_lo; /* 18-1B */
585 uint32_t rqq_addr_hi; /* 1C-1F */
586 uint32_t compq_addr_lo; /* 20-23 */
587 uint32_t compq_addr_hi; /* 24-27 */
588 uint32_t shdwreg_addr_lo; /* 28-2B */
589 uint32_t shdwreg_addr_hi; /* 2C-2F */
591 uint16_t iscsi_opts; /* 30-31 */
605 uint16_t ipv4_tcp_opts; /* 32-33 */
614 uint16_t ipv4_ip_opts; /* 34-35 */
627 uint16_t iscsi_max_pdu_size; /* 36-37 */
636 uint16_t def_timeout; /* 3C-3D */
637 uint16_t iscsi_fburst_len; /* 3E-3F */
638 uint16_t iscsi_def_time2wait; /* 40-41 */
639 uint16_t iscsi_def_time2retain; /* 42-43 */
640 uint16_t iscsi_max_outstnd_r2t; /* 44-45 */
641 uint16_t conn_ka_timeout; /* 46-47 */
642 uint16_t ipv4_port; /* 48-49 */
643 uint16_t iscsi_max_burst_len; /* 4A-4B */
644 uint32_t res5; /* 4C-4F */
645 uint8_t ipv4_addr[4]; /* 50-53 */
646 uint16_t ipv4_vlan_tag; /* 54-55 */
649 uint8_t res6[8]; /* 58-5F */
650 uint8_t ipv4_subnet[4]; /* 60-63 */
651 uint8_t res7[12]; /* 64-6F */
652 uint8_t ipv4_gw_addr[4]; /* 70-73 */
653 uint8_t res8[0xc]; /* 74-7F */
654 uint8_t pri_dns_srvr_ip[4];/* 80-83 */
655 uint8_t sec_dns_srvr_ip[4];/* 84-87 */
656 uint16_t min_eph_port; /* 88-89 */
657 uint16_t max_eph_port; /* 8A-8B */
658 uint8_t res9[4]; /* 8C-8F */
659 uint8_t iscsi_alias[32];/* 90-AF */
660 uint8_t res9_1[0x16]; /* B0-C5 */
661 uint16_t tgt_portal_grp;/* C6-C7 */
664 uint8_t res10[6]; /* CA-CF */
665 uint8_t ipv4_sec_ip_addr[4]; /* D0-D3 */
667 uint8_t ipv4_dhcp_vid[11]; /* D5-DF */
668 uint8_t res11[20]; /* E0-F3 */
670 uint8_t ipv4_dhcp_alt_cid[11]; /* F5-FF */
671 uint8_t iscsi_name[224]; /* 100-1DF */
672 uint8_t res12[32]; /* 1E0-1FF */
673 uint32_t cookie; /* 200-203 */
674 uint16_t ipv6_port; /* 204-205 */
675 uint16_t ipv6_opts; /* 206-207 */
681 uint16_t ipv6_addtl_opts; /* 208-209 */
688 uint16_t ipv6_tcp_opts; /* 20A-20B */
695 uint16_t ipv6_flow_lbl; /* 20D-20F */
696 uint8_t ipv6_dflt_rtr_addr[16]; /* 210-21F */
697 uint16_t ipv6_vlan_tag; /* 220-221 */
709 uint8_t ipv6_if_id[8]; /* 228-22F */
710 uint8_t ipv6_addr0[16]; /* 230-23F */
711 uint8_t ipv6_addr1[16]; /* 240-24F */
712 uint32_t ipv6_nd_reach_time; /* 250-253 */
713 uint32_t ipv6_nd_rexmit_timer; /* 254-257 */
714 uint32_t ipv6_nd_stale_timeout; /* 258-25B */
717 uint8_t res13[18]; /* 25E-26F */
718 uint32_t ipv6_gw_advrt_mtu; /* 270-273 */
719 uint8_t res14[140]; /* 274-2FF */
738 uint8_t reserved1[1]; /* 00 */
740 uint8_t reserved2[11]; /* 02-0C */
742 uint8_t reserved3[34]; /* 0E-2F */
743 uint16_t iscsi_opts; /* 30-31 */
744 uint16_t ipv4_tcp_opts; /* 32-33 */
745 uint16_t ipv4_ip_opts; /* 34-35 */
746 uint16_t iscsi_max_pdu_size; /* 36-37 */
749 uint8_t reserved4[2]; /* 3A-3B */
750 uint16_t def_timeout; /* 3C-3D */
751 uint16_t iscsi_fburst_len; /* 3E-3F */
752 uint8_t reserved5[4]; /* 40-43 */
753 uint16_t iscsi_max_outstnd_r2t; /* 44-45 */
754 uint8_t reserved6[2]; /* 46-47 */
755 uint16_t ipv4_port; /* 48-49 */
756 uint16_t iscsi_max_burst_len; /* 4A-4B */
757 uint8_t reserved7[4]; /* 4C-4F */
758 uint8_t ipv4_addr[4]; /* 50-53 */
759 uint16_t ipv4_vlan_tag; /* 54-55 */
762 uint8_t reserved8[8]; /* 58-5F */
763 uint8_t ipv4_subnet[4]; /* 60-63 */
764 uint8_t reserved9[12]; /* 64-6F */
765 uint8_t ipv4_gw_addr[4]; /* 70-73 */
766 uint8_t reserved10[84]; /* 74-C7 */
769 uint8_t reserved11[10]; /* CA-D3 */
771 uint8_t ipv4_dhcp_vid[11]; /* D5-DF */
772 uint8_t reserved12[20]; /* E0-F3 */
774 uint8_t ipv4_dhcp_alt_cid[11]; /* F5-FF */
775 uint8_t iscsi_name[224]; /* 100-1DF */
776 uint8_t reserved13[32]; /* 1E0-1FF */
777 uint32_t cookie; /* 200-203 */
778 uint16_t ipv6_port; /* 204-205 */
779 uint16_t ipv6_opts; /* 206-207 */
780 uint16_t ipv6_addtl_opts; /* 208-209 */
781 uint16_t ipv6_tcp_opts; /* 20A-20B */
783 uint16_t ipv6_flow_lbl; /* 20D-20F */
784 uint8_t ipv6_dflt_rtr_addr[16]; /* 210-21F */
785 uint16_t ipv6_vlan_tag; /* 220-221 */
792 uint8_t ipv6_if_id[8]; /* 228-22F */
793 uint8_t ipv6_addr0[16]; /* 230-23F */
794 uint8_t ipv6_addr1[16]; /* 240-24F */
795 uint32_t ipv6_nd_reach_time; /* 250-253 */
796 uint32_t ipv6_nd_rexmit_timer; /* 254-257 */
797 uint32_t ipv6_nd_stale_timeout; /* 258-25B */
800 uint8_t reserved14[18]; /* 25E-26F */
801 uint32_t ipv6_gw_advrt_mtu; /* 270-273 */
802 uint8_t reserved15[140]; /* 274-2FF */
828 uint16_t options; /* 00-01 */
841 uint16_t exec_throttle; /* 02-03 */
842 uint16_t exec_count; /* 04-05 */
843 uint16_t res0; /* 06-07 */
844 uint16_t iscsi_options; /* 08-09 */
859 uint16_t tcp_options; /* 0A-0B */
868 uint16_t ip_options; /* 0C-0D */
871 uint16_t iscsi_max_rcv_data_seg_len; /* 0E-0F */
873 uint32_t res1; /* 10-13 */
874 uint16_t iscsi_max_snd_data_seg_len; /* 14-15 */
875 uint16_t iscsi_first_burst_len; /* 16-17 */
876 uint16_t iscsi_def_time2wait; /* 18-19 */
877 uint16_t iscsi_def_time2retain; /* 1A-1B */
878 uint16_t iscsi_max_outsnd_r2t; /* 1C-1D */
879 uint16_t ka_timeout; /* 1E-1F */
880 uint8_t isid[6]; /* 20-25 big-endian, must be converted
881 * to little-endian */
882 uint16_t tsid; /* 26-27 */
883 uint16_t port; /* 28-29 */
884 uint16_t iscsi_max_burst_len; /* 2A-2B */
885 uint16_t def_timeout; /* 2C-2D */
886 uint16_t res2; /* 2E-2F */
887 uint8_t ip_addr[0x10]; /* 30-3F */
888 uint8_t iscsi_alias[0x20]; /* 40-5F */
889 uint8_t tgt_addr[0x20]; /* 60-7F */
890 uint16_t mss; /* 80-81 */
891 uint16_t res3; /* 82-83 */
892 uint16_t lcl_port; /* 84-85 */
894 uint16_t ipv6_flow_lbl; /* 87-89 */
895 uint8_t res4[0x36]; /* 8A-BF */
896 uint8_t iscsi_name[0xE0]; /* C0-19F : xxzzy Make this a
900 uint8_t link_local_ipv6_addr[0x10]; /* 1A0-1AF */
901 uint8_t res5[0x10]; /* 1B0-1BF */
904 uint16_t ddb_link; /* 1C0-1C1 */
905 uint16_t chap_tbl_idx; /* 1C2-1C3 */
906 uint16_t tgt_portal_grp; /* 1C4-1C5 */
909 uint32_t stat_sn; /* 1C8-1CB */
910 uint32_t exp_stat_sn; /* 1CC-1CF */
911 uint8_t res6[0x2b]; /* 1D0-1FB */
913 uint16_t cookie; /* 1FC-1FD */
914 uint16_t len; /* 1FE-1FF */
923 #define FLASH_EOF_OFFSET (FLASH_DEFAULTBLOCKSIZE-8) /* 4 bytes
936 uint8_t address[6]; /* 00-05 */
937 uint8_t filler[2]; /* 06-07 */
941 uint32_t cookie; /* 00-03 */
942 uint32_t physAddrCount; /* 04-07 */
943 struct sys_info_phys_addr physAddr[4]; /* 08-27 */
944 uint8_t vendorId[128]; /* 28-A7 */
945 uint8_t productId[128]; /* A8-127 */
946 uint32_t serialNumber; /* 128-12B */
949 uint32_t pciDeviceVendor; /* 12C-12F */
950 uint32_t pciDeviceId; /* 130-133 */
951 uint32_t pciSubsysVendor; /* 134-137 */
952 uint32_t pciSubsysId; /* 138-13B */
955 uint32_t crumbs; /* 13C-13F */
957 uint32_t enterpriseNumber; /* 140-143 */
959 uint32_t mtu; /* 144-147 */
960 uint32_t reserved0; /* 148-14b */
961 uint32_t crumbs2; /* 14c-14f */
962 uint8_t acSerialNumber[16]; /* 150-15f */
963 uint32_t crumbs3; /* 160-16f */
968 uint32_t reserved1[39]; /* 170-1ff */
972 uint8_t board_id_str[16]; /* 0-f Keep board ID string first */
974 uint16_t board_id; /* 10-11 board ID code */
975 uint16_t phys_port_cnt; /* 12-13 number of physical network ports */
976 uint16_t port_num; /* 14-15 network port for this PCI function */
978 uint8_t mac_addr[6]; /* 16-1b MAC address for this PCI function */
979 uint32_t iscsi_pci_func_cnt; /* 1c-1f number of iSCSI PCI functions */
980 uint32_t pci_func; /* 20-23 this PCI function */
981 unsigned char serial_number[16]; /* 24-33 serial number string */
982 uint8_t reserved[12]; /* 34-3f */
986 uint16_t fw_major; /* 00 - 01 */
987 uint16_t fw_minor; /* 02 - 03 */
988 uint16_t fw_patch; /* 04 - 05 */
989 uint16_t fw_build; /* 06 - 07 */
990 uint8_t fw_build_date[16]; /* 08 - 17 ASCII String */
991 uint8_t fw_build_time[16]; /* 18 - 27 ASCII String */
992 uint8_t fw_build_user[16]; /* 28 - 37 ASCII String */
993 uint16_t fw_load_source; /* 38 - 39 */
998 uint8_t reserved1[6]; /* 3A - 3F */
999 uint16_t iscsi_major; /* 40 - 41 */
1000 uint16_t iscsi_minor; /* 42 - 43 */
1001 uint16_t bootload_major; /* 44 - 45 */
1002 uint16_t bootload_minor; /* 46 - 47 */
1003 uint16_t bootload_patch; /* 48 - 49 */
1004 uint16_t bootload_build; /* 4A - 4B */
1005 uint8_t extended_timestamp[180];/* 4C - FF */
1009 uint16_t fw_major_version; /* 00 - 01 */
1010 uint16_t fw_minor_version; /* 02 - 03 */
1011 uint16_t fw_patch_version; /* 04 - 05 */
1012 uint16_t fw_build_version; /* 06 - 07 */
1014 uint8_t build_date[16]; /* 08 - 17 */
1015 uint8_t build_time[16]; /* 18 - 27 */
1016 uint8_t build_user[16]; /* 28 - 37 */
1017 uint8_t card_serial_num[16]; /* 38 - 47 */
1019 uint32_t time_of_crash_in_secs; /* 48 - 4B */
1020 uint32_t time_of_crash_in_ms; /* 4C - 4F */
1022 uint16_t out_RISC_sd_num_frames; /* 50 - 51 */
1023 uint16_t OAP_sd_num_words; /* 52 - 53 */
1024 uint16_t IAP_sd_num_frames; /* 54 - 55 */
1025 uint16_t in_RISC_sd_num_words; /* 56 - 57 */
1027 uint8_t reserved1[28]; /* 58 - 7F */
1029 uint8_t out_RISC_reg_dump[256]; /* 80 -17F */
1030 uint8_t in_RISC_reg_dump[256]; /*180 -27F */
1031 uint8_t in_out_RISC_stack_dump[]; /*280 - ??? */
1036 uint32_t timestamp_sec; /* 00 - 03 seconds since boot */
1037 uint32_t timestamp_ms; /* 04 - 07 milliseconds since boot */
1038 uint16_t device_index; /* 08 - 09 */
1039 uint16_t fw_conn_state; /* 0A - 0B */
1040 uint8_t event_type; /* 0C - 0C */
1041 uint8_t error_code; /* 0D - 0D */
1042 uint16_t error_code_detail; /* 0E - 0F */
1043 uint8_t num_consecutive_events; /* 10 - 10 */
1044 uint8_t rsvd[3]; /* 11 - 13 */
1084 /* 64 bit addressing segment counts*/
1089 /* 64 bit addressing segment definition*/
1105 struct qla4_header hdr; /* 00-03 */
1107 uint32_t handle; /* 04-07 */
1108 uint16_t target; /* 08-09 */
1109 uint16_t connection_id; /* 0A-0B */
1113 /* data direction (bits 5-6) */
1118 /* task attributes (bits 2-0) */
1131 uint8_t cdb[IOCB_MAX_CDB_LEN]; /* 10-1F */
1133 uint32_t cmdSeqNum; /* 28-2B */
1134 uint16_t timeout; /* 2C-2D */
1135 uint16_t dataSegCnt; /* 2E-2F */
1136 uint32_t ttlByteCnt; /* 30-33 */
1137 struct data_seg_a64 dataseg[COMMAND_SEG_A64]; /* 34-3F */
1159 struct qla4_header hdr; /* 00-03 */
1161 uint32_t system_defined; /* 04-07 */
1162 uint16_t target; /* 08-09 */
1163 uint16_t modifier; /* 0A-0B */
1167 uint16_t flags; /* 0C-0D */
1168 uint16_t reserved1; /* 0E-0F */
1170 uint64_t reserved2; /* 18-1F */
1171 uint64_t reserved3; /* 20-27 */
1172 uint64_t reserved4; /* 28-2F */
1173 uint64_t reserved5; /* 30-37 */
1174 uint64_t reserved6; /* 38-3F */
1179 struct qla4_header hdr; /* 00-03 */
1181 uint32_t handle; /* 04-07 */
1209 uint16_t senseDataByteCnt; /* 0E-0F */
1210 uint32_t residualByteCnt; /* 10-13 */
1211 uint32_t bidiResidualByteCnt; /* 14-17 */
1212 uint32_t expSeqNum; /* 18-1B */
1213 uint32_t maxCmdSeqNum; /* 1C-1F */
1214 uint8_t senseData[IOCB_MAX_SENSEDATA_LEN]; /* 20-3F */
1220 struct qla4_header hdr; /* 00-03 */
1221 uint8_t ext_sense_data[IOCB_MAX_EXT_SENSEDATA_LEN]; /* 04-63 */
1225 struct qla4_header hdr; /* 00-03 */
1226 uint32_t handle; /* 04-07 */
1227 uint16_t target; /* 08-09 */
1228 uint16_t connection_id; /* 0A-0B */
1231 uint16_t control_flags; /* 0C-0D */
1238 uint16_t timeout; /* 0E-0F */
1241 struct data_seg_a64 out_dsd; /* 10-1B */
1242 uint32_t res1; /* 1C-1F */
1243 struct data_seg_a64 in_dsd; /* 20-2B */
1244 uint8_t res2[20]; /* 2C-3F */
1248 struct qla4_header hdr; /* 00-03 */
1249 uint32_t handle; /* 04-07 */
1250 uint16_t target; /* 08-09 */
1251 uint16_t connectionID; /* 0A-0B */
1258 uint16_t timeout; /* 0E-0F */
1259 uint16_t portNumber; /* 10-11 */
1260 uint8_t res1[10]; /* 12-1B */
1261 uint32_t outResidual; /* 1C-1F */
1262 uint8_t res2[12]; /* 20-2B */
1263 uint32_t inResidual; /* 2C-2F */
1264 uint8_t res4[16]; /* 30-3F */
1268 struct qla4_header hdr; /* 00-03 */
1269 uint32_t handle; /* 04-07 */
1270 uint32_t in_mbox[8]; /* 08-25 */
1271 uint32_t res1[6]; /* 26-3F */
1275 struct qla4_header hdr; /* 00-03 */
1276 uint32_t handle; /* 04-07 */
1277 uint32_t out_mbox[8]; /* 08-25 */
1278 uint32_t res1[6]; /* 26-3F */
1282 * ISP queue - response queue entry definition.
1311 uint64_t mac_rx_dribble; /* 00A0–00A7 */
1312 uint64_t mac_rx_frame_length_error; /* 00A8–00AF */
1313 uint64_t mac_rx_jabber; /* 00B0–00B7 */
1314 uint64_t mac_rx_carrier_sense_error; /* 00B8–00BF */
1315 uint64_t mac_rx_frame_discarded; /* 00C0–00C7 */
1316 uint64_t mac_rx_frames_dropped; /* 00C8–00CF */
1317 uint64_t mac_crc_error; /* 00D0–00D7 */
1318 uint64_t mac_encoding_error; /* 00D8–00DF */
1319 uint64_t mac_rx_length_error_large; /* 00E0–00E7 */
1320 uint64_t mac_rx_length_error_small; /* 00E8–00EF */
1321 uint64_t mac_rx_multicast_frames; /* 00F0–00F7 */
1322 uint64_t mac_rx_broadcast_frames; /* 00F8–00FF */
1363 uint64_t iscsi_pdu_tx; /* 0240-0247 */
1364 uint64_t iscsi_data_bytes_tx; /* 0248-024F */
1365 uint64_t iscsi_pdu_rx; /* 0250-0257 */
1366 uint64_t iscsi_data_bytes_rx; /* 0258-025F */
1367 uint64_t iscsi_io_completed; /* 0260-0267 */
1368 uint64_t iscsi_unexpected_io_rx; /* 0268-026F */
1369 uint64_t iscsi_format_error; /* 0270-0277 */
1370 uint64_t iscsi_hdr_digest_error; /* 0278-027F */
1371 uint64_t iscsi_data_digest_error; /* 0280-0287 */
1372 uint64_t iscsi_sequence_error; /* 0288-028F */
1373 uint32_t tx_cmd_pdu; /* 0290-0293 */
1374 uint32_t tx_resp_pdu; /* 0294-0297 */
1375 uint32_t rx_cmd_pdu; /* 0298-029B */
1376 uint32_t rx_resp_pdu; /* 029C-029F */
1378 uint64_t tx_data_octets; /* 02A0-02A7 */
1379 uint64_t rx_data_octets; /* 02A8-02AF */
1407 uint8_t reserved2[264]; /* 0x0308 - 0x040F */