65 		    (uint8_t) offsetof(struct isp_reg, u1.isp4022.intr_mask),  in qla4xxx_dump_registers()
66 		    readw(&ha->reg->u1.isp4022.intr_mask));  in qla4xxx_dump_registers()
68 		    (uint8_t) offsetof(struct isp_reg, u1.isp4022.nvram),  in qla4xxx_dump_registers()
69 		    readw(&ha->reg->u1.isp4022.nvram));  in qla4xxx_dump_registers()
71 		    (uint8_t) offsetof(struct isp_reg, u1.isp4022.semaphore),  in qla4xxx_dump_registers()
72 		    readw(&ha->reg->u1.isp4022.semaphore));  in qla4xxx_dump_registers()
106 		    offsetof(struct isp_reg, u2.isp4022.p0.ext_hw_conf),  in qla4xxx_dump_registers()
107 		    readw(&ha->reg->u2.isp4022.p0.ext_hw_conf));  in qla4xxx_dump_registers()
109 		    offsetof(struct isp_reg, u2.isp4022.p0.port_ctrl),  in qla4xxx_dump_registers()
110 		    readw(&ha->reg->u2.isp4022.p0.port_ctrl));  in qla4xxx_dump_registers()
112 		    offsetof(struct isp_reg, u2.isp4022.p0.port_status),  in qla4xxx_dump_registers()
113 		    readw(&ha->reg->u2.isp4022.p0.port_status));  in qla4xxx_dump_registers()
115 		    (uint8_t) offsetof(struct isp_reg, u2.isp4022.p0.gp_out),  in qla4xxx_dump_registers()
116 		    readw(&ha->reg->u2.isp4022.p0.gp_out));  in qla4xxx_dump_registers()
118 		    (uint8_t) offsetof(struct isp_reg, u2.isp4022.p0.gp_in),  in qla4xxx_dump_registers()
119 		    readw(&ha->reg->u2.isp4022.p0.gp_in));  in qla4xxx_dump_registers()
121 		    offsetof(struct isp_reg, u2.isp4022.p0.port_err_status),  in qla4xxx_dump_registers()
122 		    readw(&ha->reg->u2.isp4022.p0.port_err_status));  in qla4xxx_dump_registers()
127 		    (uint8_t) offsetof(struct isp_reg, u2.isp4022.p1.req_q_out),  in qla4xxx_dump_registers()
128 		    readw(&ha->reg->u2.isp4022.p1.req_q_out));  in qla4xxx_dump_registers()