Lines Matching +full:pci +full:- +full:host +full:- +full:cam +full:- +full:generic
1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (c) 2003-2014 QLogic Corporation
8 #include <linux/io-64-nonatomic-lo-hi.h>
9 #include <linux/pci.h>
14 #define MASK(n) ((1ULL<<(n))-1)
97 qla82xx_crb_addr_transform(CAM); in qla82xx_crb_addr_transform_setup()
340 [QLA8XXX_DEV_COLD] = "Cold/Re-init",
355 * In: 'off_in' is offset from CRB space in 128M pci map
356 * Out: 'off_out' is 2M pci map addr
364 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_pci_set_crbwindow_2M()
366 ha->crb_win = CRB_HI(off_in); in qla82xx_pci_set_crbwindow_2M()
367 writel(ha->crb_win, CRB_WINDOW_2M + ha->nx_pcibase); in qla82xx_pci_set_crbwindow_2M()
372 win_read = rd_reg_dword(CRB_WINDOW_2M + ha->nx_pcibase); in qla82xx_pci_set_crbwindow_2M()
373 if (win_read != ha->crb_win) { in qla82xx_pci_set_crbwindow_2M()
377 __func__, ha->crb_win, win_read, off_in); in qla82xx_pci_set_crbwindow_2M()
379 *off_out = (off_in & MASK(16)) + CRB_INDIRECT_2M + ha->nx_pcibase; in qla82xx_pci_set_crbwindow_2M()
389 return -1; in qla82xx_pci_get_crb_addr_2M()
392 *off_out = (off_in - QLA82XX_PCI_CAMQM) + in qla82xx_pci_get_crb_addr_2M()
393 QLA82XX_PCI_CAMQM_2M_BASE + ha->nx_pcibase; in qla82xx_pci_get_crb_addr_2M()
398 return -1; in qla82xx_pci_get_crb_addr_2M()
400 off_in -= QLA82XX_PCI_CRBSPACE; in qla82xx_pci_get_crb_addr_2M()
405 if (m->valid && (m->start_128M <= off_in) && (m->end_128M > off_in)) { in qla82xx_pci_get_crb_addr_2M()
406 *off_out = off_in + m->start_2M - m->start_128M + ha->nx_pcibase; in qla82xx_pci_get_crb_addr_2M()
420 /* acquire semaphore3 from PCI HW block */ in qla82xx_crb_win_lock()
425 return -1; in qla82xx_crb_win_lock()
428 qla82xx_wr_32(ha, QLA82XX_CRB_WIN_LOCK_ID, ha->portnum); in qla82xx_crb_win_lock()
441 BUG_ON(rv == -1); in qla82xx_wr_32()
445 write_lock_irqsave(&ha->hw_lock, flags); in qla82xx_wr_32()
456 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_wr_32()
472 BUG_ON(rv == -1); in qla82xx_rd_32()
476 write_lock_irqsave(&ha->hw_lock, flags); in qla82xx_rd_32()
486 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_rd_32()
503 /* acquire semaphore5 from PCI HW block */ in qla82xx_idc_lock()
508 return -1; in qla82xx_idc_lock()
532 !addr_in_range(addr + size - 1, QLA82XX_ADDR_DDR_NET, in qla82xx_pci_mem_bound_check()
547 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_pci_set_window()
553 ha->ddr_mn_window = window; in qla82xx_pci_set_window()
555 ha->mn_win_crb | QLA82XX_PCI_CRBSPACE, window); in qla82xx_pci_set_window()
557 ha->mn_win_crb | QLA82XX_PCI_CRBSPACE); in qla82xx_pci_set_window()
571 addr = -1UL; in qla82xx_pci_set_window()
574 ha->ddr_mn_window = window; in qla82xx_pci_set_window()
576 ha->mn_win_crb | QLA82XX_PCI_CRBSPACE, window); in qla82xx_pci_set_window()
578 ha->mn_win_crb | QLA82XX_PCI_CRBSPACE); in qla82xx_pci_set_window()
592 ha->qdr_sn_window = window; in qla82xx_pci_set_window()
594 ha->ms_win_crb | QLA82XX_PCI_CRBSPACE, window); in qla82xx_pci_set_window()
596 ha->ms_win_crb | QLA82XX_PCI_CRBSPACE); in qla82xx_pci_set_window()
614 addr = -1UL; in qla82xx_pci_set_window()
640 window = ((addr - QLA82XX_ADDR_QDR_NET) >> 22) & 0x3f; in qla82xx_pci_is_same_window()
641 if (ha->qdr_sn_window == window) in qla82xx_pci_is_same_window()
657 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_pci_mem_read_direct()
659 write_lock_irqsave(&ha->hw_lock, flags); in qla82xx_pci_mem_read_direct()
666 if ((start == -1UL) || in qla82xx_pci_mem_read_direct()
667 (qla82xx_pci_is_same_window(ha, off + size - 1) == 0)) { in qla82xx_pci_mem_read_direct()
668 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_pci_mem_read_direct()
670 "%s out of bound pci memory " in qla82xx_pci_mem_read_direct()
673 return -1; in qla82xx_pci_mem_read_direct()
676 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_pci_mem_read_direct()
677 mem_base = pci_resource_start(ha->pdev, 0); in qla82xx_pci_mem_read_direct()
682 if (mem_page != ((start + size - 1) & PAGE_MASK)) in qla82xx_pci_mem_read_direct()
688 return -1; in qla82xx_pci_mem_read_direct()
691 addr += start & (PAGE_SIZE - 1); in qla82xx_pci_mem_read_direct()
692 write_lock_irqsave(&ha->hw_lock, flags); in qla82xx_pci_mem_read_direct()
708 ret = -1; in qla82xx_pci_mem_read_direct()
711 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_pci_mem_read_direct()
729 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_pci_mem_write_direct()
731 write_lock_irqsave(&ha->hw_lock, flags); in qla82xx_pci_mem_write_direct()
738 if ((start == -1UL) || in qla82xx_pci_mem_write_direct()
739 (qla82xx_pci_is_same_window(ha, off + size - 1) == 0)) { in qla82xx_pci_mem_write_direct()
740 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_pci_mem_write_direct()
745 return -1; in qla82xx_pci_mem_write_direct()
748 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_pci_mem_write_direct()
749 mem_base = pci_resource_start(ha->pdev, 0); in qla82xx_pci_mem_write_direct()
754 if (mem_page != ((start + size - 1) & PAGE_MASK)) in qla82xx_pci_mem_write_direct()
759 return -1; in qla82xx_pci_mem_write_direct()
762 addr += start & (PAGE_SIZE - 1); in qla82xx_pci_mem_write_direct()
763 write_lock_irqsave(&ha->hw_lock, flags); in qla82xx_pci_mem_write_direct()
779 ret = -1; in qla82xx_pci_mem_write_direct()
782 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_pci_mem_write_direct()
821 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_rom_lock()
824 /* acquire semaphore2 from PCI HW block */ in qla82xx_rom_lock()
832 __func__, ha->portnum, lock_owner); in qla82xx_rom_lock()
833 return -1; in qla82xx_rom_lock()
837 qla82xx_wr_32(ha, QLA82XX_ROM_LOCK_ID, ha->portnum); in qla82xx_rom_lock()
853 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_wait_rom_busy()
863 return -1; in qla82xx_wait_rom_busy()
874 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_wait_rom_done()
884 return -1; in qla82xx_wait_rom_done()
895 wrt_reg_dword(CRB_WINDOW_2M + ha->nx_pcibase, off & 0xFFFF0000); in qla82xx_md_rw_32()
898 rd_reg_dword(CRB_WINDOW_2M + ha->nx_pcibase); in qla82xx_md_rw_32()
902 wrt_reg_dword(off_value + CRB_INDIRECT_2M + ha->nx_pcibase, in qla82xx_md_rw_32()
906 ha->nx_pcibase); in qla82xx_md_rw_32()
927 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_rom_fast_read()
939 return -1; in qla82xx_rom_fast_read()
949 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_read_status_reg()
956 return -1; in qla82xx_read_status_reg()
967 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_flash_wait_write_finish()
979 return -1; in qla82xx_flash_wait_write_finish()
992 return -1; in qla82xx_flash_set_write_enable()
994 return -1; in qla82xx_flash_set_write_enable()
996 return -1; in qla82xx_flash_set_write_enable()
1003 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_write_status_reg()
1006 return -1; in qla82xx_write_status_reg()
1012 return -1; in qla82xx_write_status_reg()
1020 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_write_disable_flash()
1026 return -1; in qla82xx_write_disable_flash()
1036 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in ql82xx_rom_lock_d()
1047 return -1; in ql82xx_rom_lock_d()
1057 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_write_flash_dword()
1078 ret = -1; in qla82xx_write_flash_dword()
1100 struct qla_hw_data *ha = vha->hw; in qla82xx_pinit_from_rom()
1155 if (test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) in qla82xx_pinit_from_rom()
1156 /* don't reset CAM block on reset */ in qla82xx_pinit_from_rom()
1172 return -1; in qla82xx_pinit_from_rom()
1185 return -1; in qla82xx_pinit_from_rom()
1195 return -ENOMEM; in qla82xx_pinit_from_rom()
1202 return -1; in qla82xx_pinit_from_rom()
1211 * address to PCI bus address in qla82xx_pinit_from_rom()
1223 /* do not reset PCI */ in qla82xx_pinit_from_rom()
1305 sz[0] = (size < (8 - off0)) ? size : (8 - off0); in qla82xx_pci_mem_write_2M()
1306 sz[1] = size - sz[0]; in qla82xx_pci_mem_write_2M()
1309 loop = (((off & 0xf) + size - 1) >> 4) + 1; in qla82xx_pci_mem_write_2M()
1317 return -1; in qla82xx_pci_mem_write_2M()
1377 dev_err(&ha->pdev->dev, in qla82xx_pci_mem_write_2M()
1379 ret = -1; in qla82xx_pci_mem_write_2M()
1392 long flashaddr = ha->flt_region_bootload << 2; in qla82xx_fw_load_from_flash()
1397 size = (IMAGE_START - BOOTLD_START) / 8; in qla82xx_fw_load_from_flash()
1402 return -1; in qla82xx_fw_load_from_flash()
1413 read_lock(&ha->hw_lock); in qla82xx_fw_load_from_flash()
1416 read_unlock(&ha->hw_lock); in qla82xx_fw_load_from_flash()
1444 sz[0] = (size < (16 - off0[0])) ? size : (16 - off0[0]); in qla82xx_pci_mem_read_2M()
1446 loop = ((off0[0] + size - 1) >> shift_amount) + 1; in qla82xx_pci_mem_read_2M()
1448 sz[1] = size - sz[0]; in qla82xx_pci_mem_read_2M()
1468 dev_err(&ha->pdev->dev, in qla82xx_pci_mem_read_2M()
1474 end = (off0[i] + sz[i] - 1) >> 2; in qla82xx_pci_mem_read_2M()
1483 return -1; in qla82xx_pci_mem_read_2M()
1518 uint32_t entries = le32_to_cpu(directory->num_entries); in qla82xx_get_table_desc()
1521 offset = le32_to_cpu(directory->findex) + in qla82xx_get_table_desc()
1522 (i * le32_to_cpu(directory->entry_size)); in qla82xx_get_table_desc()
1536 const u8 *unirom = ha->hablob->fw->data; in qla82xx_get_data_desc()
1537 int idx = get_unaligned_le32((u32 *)&unirom[ha->file_prd_off] + in qla82xx_get_data_desc()
1546 offset = le32_to_cpu(tab_desc->findex) + in qla82xx_get_data_desc()
1547 (le32_to_cpu(tab_desc->entry_size) * idx); in qla82xx_get_data_desc()
1558 if (ha->fw_type == QLA82XX_UNIFIED_ROMIMAGE) { in qla82xx_get_bootld_offset()
1562 offset = le32_to_cpu(uri_desc->findex); in qla82xx_get_bootld_offset()
1565 return (u8 *)&ha->hablob->fw->data[offset]; in qla82xx_get_bootld_offset()
1572 if (ha->fw_type == QLA82XX_UNIFIED_ROMIMAGE) { in qla82xx_get_fw_size()
1576 return le32_to_cpu(uri_desc->size); in qla82xx_get_fw_size()
1579 return get_unaligned_le32(&ha->hablob->fw->data[FW_SIZE_OFFSET]); in qla82xx_get_fw_size()
1588 if (ha->fw_type == QLA82XX_UNIFIED_ROMIMAGE) { in qla82xx_get_fw_offs()
1592 offset = le32_to_cpu(uri_desc->findex); in qla82xx_get_fw_offs()
1595 return (u8 *)&ha->hablob->fw->data[offset]; in qla82xx_get_fw_offs()
1598 /* PCI related functions */
1622 if (pci_request_regions(ha->pdev, QLA2XXX_DRIVER_NAME)) { in qla82xx_iospace_config()
1623 ql_log_pci(ql_log_fatal, ha->pdev, 0x000c, in qla82xx_iospace_config()
1629 if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) { in qla82xx_iospace_config()
1630 ql_log_pci(ql_log_fatal, ha->pdev, 0x000d, in qla82xx_iospace_config()
1635 len = pci_resource_len(ha->pdev, 0); in qla82xx_iospace_config()
1636 ha->nx_pcibase = ioremap(pci_resource_start(ha->pdev, 0), len); in qla82xx_iospace_config()
1637 if (!ha->nx_pcibase) { in qla82xx_iospace_config()
1638 ql_log_pci(ql_log_fatal, ha->pdev, 0x000e, in qla82xx_iospace_config()
1645 ha->iobase = ha->nx_pcibase; in qla82xx_iospace_config()
1647 ha->iobase = ha->nx_pcibase + 0xbc000 + (ha->pdev->devfn << 11); in qla82xx_iospace_config()
1651 ha->nxdb_wr_ptr = ioremap((pci_resource_start(ha->pdev, 4) + in qla82xx_iospace_config()
1652 (ha->pdev->devfn << 12)), 4); in qla82xx_iospace_config()
1653 if (!ha->nxdb_wr_ptr) { in qla82xx_iospace_config()
1654 ql_log_pci(ql_log_fatal, ha->pdev, 0x000f, in qla82xx_iospace_config()
1662 ha->nxdb_rd_ptr = ha->nx_pcibase + (512 * 1024) + in qla82xx_iospace_config()
1663 (ha->pdev->devfn * 8); in qla82xx_iospace_config()
1665 ha->nxdb_wr_ptr = (void __iomem *)(ha->pdev->devfn == 6 ? in qla82xx_iospace_config()
1670 ha->max_req_queues = ha->max_rsp_queues = 1; in qla82xx_iospace_config()
1671 ha->msix_count = ha->max_rsp_queues + 1; in qla82xx_iospace_config()
1672 ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc006, in qla82xx_iospace_config()
1675 ha->nx_pcibase, ha->iobase, in qla82xx_iospace_config()
1676 ha->max_req_queues, ha->msix_count); in qla82xx_iospace_config()
1677 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0010, in qla82xx_iospace_config()
1680 ha->nx_pcibase, ha->iobase, in qla82xx_iospace_config()
1681 ha->max_req_queues, ha->msix_count); in qla82xx_iospace_config()
1685 return -ENOMEM; in qla82xx_iospace_config()
1693 * qla82xx_pci_config() - Setup ISP82xx PCI configuration registers.
1701 struct qla_hw_data *ha = vha->hw; in qla82xx_pci_config()
1704 pci_set_master(ha->pdev); in qla82xx_pci_config()
1705 ret = pci_set_mwi(ha->pdev); in qla82xx_pci_config()
1706 ha->chip_revision = ha->pdev->revision; in qla82xx_pci_config()
1709 ha->chip_revision, ret); in qla82xx_pci_config()
1714 * qla82xx_reset_chip() - Setup ISP82xx PCI configuration registers.
1722 struct qla_hw_data *ha = vha->hw; in qla82xx_reset_chip()
1724 ha->isp_ops->disable_intrs(ha); in qla82xx_reset_chip()
1731 struct qla_hw_data *ha = vha->hw; in qla82xx_config_rings()
1732 struct device_reg_82xx __iomem *reg = &ha->iobase->isp82; in qla82xx_config_rings()
1734 struct req_que *req = ha->req_q_map[0]; in qla82xx_config_rings()
1735 struct rsp_que *rsp = ha->rsp_q_map[0]; in qla82xx_config_rings()
1738 icb = (struct init_cb_81xx *)ha->init_cb; in qla82xx_config_rings()
1739 icb->request_q_outpointer = cpu_to_le16(0); in qla82xx_config_rings()
1740 icb->response_q_inpointer = cpu_to_le16(0); in qla82xx_config_rings()
1741 icb->request_q_length = cpu_to_le16(req->length); in qla82xx_config_rings()
1742 icb->response_q_length = cpu_to_le16(rsp->length); in qla82xx_config_rings()
1743 put_unaligned_le64(req->dma, &icb->request_q_address); in qla82xx_config_rings()
1744 put_unaligned_le64(rsp->dma, &icb->response_q_address); in qla82xx_config_rings()
1746 wrt_reg_dword(®->req_q_out[0], 0); in qla82xx_config_rings()
1747 wrt_reg_dword(®->rsp_q_in[0], 0); in qla82xx_config_rings()
1748 wrt_reg_dword(®->rsp_q_out[0], 0); in qla82xx_config_rings()
1758 size = (IMAGE_START - BOOTLD_START) / 8; in qla82xx_fw_load_from_blob()
1766 return -EIO; in qla82xx_fw_load_from_blob()
1778 return -EIO; in qla82xx_fw_load_from_blob()
1790 read_lock(&ha->hw_lock); in qla82xx_fw_load_from_blob()
1793 read_unlock(&ha->hw_lock); in qla82xx_fw_load_from_blob()
1801 const uint8_t *unirom = ha->hablob->fw->data; in qla82xx_set_product_offset()
1805 uint8_t chiprev = ha->chip_revision; in qla82xx_set_product_offset()
1813 return -1; in qla82xx_set_product_offset()
1815 entries = le32_to_cpu(ptab_desc->num_entries); in qla82xx_set_product_offset()
1818 offset = le32_to_cpu(ptab_desc->findex) + in qla82xx_set_product_offset()
1819 (i * le32_to_cpu(ptab_desc->entry_size)); in qla82xx_set_product_offset()
1828 ha->file_prd_off = offset; in qla82xx_set_product_offset()
1832 return -1; in qla82xx_set_product_offset()
1840 struct qla_hw_data *ha = vha->hw; in qla82xx_validate_firmware_blob()
1841 const struct firmware *fw = ha->hablob->fw; in qla82xx_validate_firmware_blob()
1843 ha->fw_type = fw_type; in qla82xx_validate_firmware_blob()
1847 return -EINVAL; in qla82xx_validate_firmware_blob()
1851 val = get_unaligned_le32(&fw->data[QLA82XX_FW_MAGIC_OFFSET]); in qla82xx_validate_firmware_blob()
1853 return -EINVAL; in qla82xx_validate_firmware_blob()
1858 if (fw->size < min_size) in qla82xx_validate_firmware_blob()
1859 return -EINVAL; in qla82xx_validate_firmware_blob()
1868 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_check_cmdpeg_state()
1871 read_lock(&ha->hw_lock); in qla82xx_check_cmdpeg_state()
1873 read_unlock(&ha->hw_lock); in qla82xx_check_cmdpeg_state()
1890 } while (--retries); in qla82xx_check_cmdpeg_state()
1896 read_lock(&ha->hw_lock); in qla82xx_check_cmdpeg_state()
1898 read_unlock(&ha->hw_lock); in qla82xx_check_cmdpeg_state()
1907 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_check_rcvpeg_state()
1910 read_lock(&ha->hw_lock); in qla82xx_check_rcvpeg_state()
1912 read_unlock(&ha->hw_lock); in qla82xx_check_rcvpeg_state()
1929 } while (--retries); in qla82xx_check_rcvpeg_state()
1933 read_lock(&ha->hw_lock); in qla82xx_check_rcvpeg_state()
1935 read_unlock(&ha->hw_lock); in qla82xx_check_rcvpeg_state()
1944 * qla82xx_mbx_completion() - Process mailbox command completions.
1953 struct qla_hw_data *ha = vha->hw; in qla82xx_mbx_completion()
1954 struct device_reg_82xx __iomem *reg = &ha->iobase->isp82; in qla82xx_mbx_completion()
1956 wptr = ®->mailbox_out[1]; in qla82xx_mbx_completion()
1959 ha->flags.mbox_int = 1; in qla82xx_mbx_completion()
1960 ha->mailbox_out[0] = mb0; in qla82xx_mbx_completion()
1962 for (cnt = 1; cnt < ha->mbx_count; cnt++) { in qla82xx_mbx_completion()
1963 ha->mailbox_out[cnt] = rd_reg_word(wptr); in qla82xx_mbx_completion()
1967 if (!ha->mcp) in qla82xx_mbx_completion()
1973 * qla82xx_intr_handler() - Process interrupts for the ISP23xx and ISP63xx.
1977 * Called by system whenever the host adapter generates an interrupt.
2000 ha = rsp->hw; in qla82xx_intr_handler()
2002 if (!ha->flags.msi_enabled) { in qla82xx_intr_handler()
2004 if (!(status & ha->nx_legacy_intr.int_vec_bit)) in qla82xx_intr_handler()
2013 qla82xx_wr_32(ha, ha->nx_legacy_intr.tgt_status_reg, 0xffffffff); in qla82xx_intr_handler()
2019 reg = &ha->iobase->isp82; in qla82xx_intr_handler()
2021 spin_lock_irqsave(&ha->hardware_lock, flags); in qla82xx_intr_handler()
2022 vha = pci_get_drvdata(ha->pdev); in qla82xx_intr_handler()
2023 for (iter = 1; iter--; ) { in qla82xx_intr_handler()
2025 if (rd_reg_dword(®->host_int)) { in qla82xx_intr_handler()
2026 stat = rd_reg_dword(®->host_status); in qla82xx_intr_handler()
2038 mb[1] = rd_reg_word(®->mailbox_out[1]); in qla82xx_intr_handler()
2039 mb[2] = rd_reg_word(®->mailbox_out[2]); in qla82xx_intr_handler()
2040 mb[3] = rd_reg_word(®->mailbox_out[3]); in qla82xx_intr_handler()
2053 wrt_reg_dword(®->host_int, 0); in qla82xx_intr_handler()
2057 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla82xx_intr_handler()
2059 if (!ha->flags.msi_enabled) in qla82xx_intr_handler()
2060 qla82xx_wr_32(ha, ha->nx_legacy_intr.tgt_mask_reg, 0xfbff); in qla82xx_intr_handler()
2084 ha = rsp->hw; in qla82xx_msix_default()
2086 reg = &ha->iobase->isp82; in qla82xx_msix_default()
2088 spin_lock_irqsave(&ha->hardware_lock, flags); in qla82xx_msix_default()
2089 vha = pci_get_drvdata(ha->pdev); in qla82xx_msix_default()
2091 host_int = rd_reg_dword(®->host_int); in qla82xx_msix_default()
2095 stat = rd_reg_dword(®->host_status); in qla82xx_msix_default()
2107 mb[1] = rd_reg_word(®->mailbox_out[1]); in qla82xx_msix_default()
2108 mb[2] = rd_reg_word(®->mailbox_out[2]); in qla82xx_msix_default()
2109 mb[3] = rd_reg_word(®->mailbox_out[3]); in qla82xx_msix_default()
2122 wrt_reg_dword(®->host_int, 0); in qla82xx_msix_default()
2126 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla82xx_msix_default()
2148 ha = rsp->hw; in qla82xx_msix_rsp_q()
2149 reg = &ha->iobase->isp82; in qla82xx_msix_rsp_q()
2150 spin_lock_irqsave(&ha->hardware_lock, flags); in qla82xx_msix_rsp_q()
2151 vha = pci_get_drvdata(ha->pdev); in qla82xx_msix_rsp_q()
2152 host_int = rd_reg_dword(®->host_int); in qla82xx_msix_rsp_q()
2156 wrt_reg_dword(®->host_int, 0); in qla82xx_msix_rsp_q()
2158 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla82xx_msix_rsp_q()
2180 ha = rsp->hw; in qla82xx_poll()
2182 reg = &ha->iobase->isp82; in qla82xx_poll()
2183 spin_lock_irqsave(&ha->hardware_lock, flags); in qla82xx_poll()
2184 vha = pci_get_drvdata(ha->pdev); in qla82xx_poll()
2186 host_int = rd_reg_dword(®->host_int); in qla82xx_poll()
2190 stat = rd_reg_dword(®->host_status); in qla82xx_poll()
2200 mb[1] = rd_reg_word(®->mailbox_out[1]); in qla82xx_poll()
2201 mb[2] = rd_reg_word(®->mailbox_out[2]); in qla82xx_poll()
2202 mb[3] = rd_reg_word(®->mailbox_out[3]); in qla82xx_poll()
2214 wrt_reg_dword(®->host_int, 0); in qla82xx_poll()
2217 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla82xx_poll()
2223 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_enable_intrs()
2226 spin_lock_irq(&ha->hardware_lock); in qla82xx_enable_intrs()
2230 qla82xx_wr_32(ha, ha->nx_legacy_intr.tgt_mask_reg, 0xfbff); in qla82xx_enable_intrs()
2231 spin_unlock_irq(&ha->hardware_lock); in qla82xx_enable_intrs()
2232 ha->interrupts_on = 1; in qla82xx_enable_intrs()
2238 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_disable_intrs()
2240 if (ha->interrupts_on) in qla82xx_disable_intrs()
2243 spin_lock_irq(&ha->hardware_lock); in qla82xx_disable_intrs()
2247 qla82xx_wr_32(ha, ha->nx_legacy_intr.tgt_mask_reg, 0x0400); in qla82xx_disable_intrs()
2248 spin_unlock_irq(&ha->hardware_lock); in qla82xx_disable_intrs()
2249 ha->interrupts_on = 0; in qla82xx_disable_intrs()
2257 rwlock_init(&ha->hw_lock); in qla82xx_init_flags()
2258 ha->qdr_sn_window = -1; in qla82xx_init_flags()
2259 ha->ddr_mn_window = -1; in qla82xx_init_flags()
2260 ha->curr_window = 255; in qla82xx_init_flags()
2261 ha->portnum = PCI_FUNC(ha->pdev->devfn); in qla82xx_init_flags()
2262 nx_legacy_intr = &legacy_intr[ha->portnum]; in qla82xx_init_flags()
2263 ha->nx_legacy_intr.int_vec_bit = nx_legacy_intr->int_vec_bit; in qla82xx_init_flags()
2264 ha->nx_legacy_intr.tgt_status_reg = nx_legacy_intr->tgt_status_reg; in qla82xx_init_flags()
2265 ha->nx_legacy_intr.tgt_mask_reg = nx_legacy_intr->tgt_mask_reg; in qla82xx_init_flags()
2266 ha->nx_legacy_intr.pci_int_reg = nx_legacy_intr->pci_int_reg; in qla82xx_init_flags()
2274 struct qla_hw_data *ha = vha->hw; in qla82xx_set_idc_version()
2277 if (drv_active == (QLA82XX_DRV_ACTIVE << (ha->portnum * 4))) { in qla82xx_set_idc_version()
2296 struct qla_hw_data *ha = vha->hw; in qla82xx_set_drv_active()
2306 drv_active |= (QLA82XX_DRV_ACTIVE << (ha->portnum * 4)); in qla82xx_set_drv_active()
2316 drv_active &= ~(QLA82XX_DRV_ACTIVE << (ha->portnum * 4)); in qla82xx_clear_drv_active()
2326 if (ha->flags.nic_core_reset_owner) in qla82xx_need_reset()
2330 rval = drv_state & (QLA82XX_DRVST_RST_RDY << (ha->portnum * 4)); in qla82xx_need_reset()
2339 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_set_rst_ready()
2348 drv_state |= (QLA82XX_DRVST_RST_RDY << (ha->portnum * 4)); in qla82xx_set_rst_ready()
2360 drv_state &= ~(QLA82XX_DRVST_RST_RDY << (ha->portnum * 4)); in qla82xx_clear_rst_ready()
2370 qsnt_state |= (QLA82XX_DRVST_QSNT_RDY << (ha->portnum * 4)); in qla82xx_set_qsnt_ready()
2377 struct qla_hw_data *ha = vha->hw; in qla82xx_clear_qsnt_ready()
2381 qsnt_state &= ~(QLA82XX_DRVST_QSNT_RDY << (ha->portnum * 4)); in qla82xx_clear_qsnt_ready()
2390 struct qla_hw_data *ha = vha->hw; in qla82xx_load_fw()
2407 * 2) Firmware via request-firmware interface (.bin file). in qla82xx_load_fw()
2429 blob = ha->hablob = qla2x00_request_firmware(vha); in qla82xx_load_fw()
2456 blob->fw = NULL; in qla82xx_load_fw()
2467 struct qla_hw_data *ha = vha->hw; in qla82xx_start_firmware()
2496 pcie_capability_read_word(ha->pdev, PCI_EXP_LNKSTA, &lnk); in qla82xx_start_firmware()
2497 ha->link_width = (lnk >> 4) & 0x3f; in qla82xx_start_firmware()
2509 struct qla_hw_data *ha = vha->hw; in qla82xx_read_flash_data()
2529 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_unprotect_flash()
2563 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_protect_flash()
2595 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_erase_sector()
2612 ret = -1; in qla82xx_erase_sector()
2628 scsi_block_requests(vha->host); in qla82xx_read_optrom_data()
2630 scsi_unblock_requests(vha->host); in qla82xx_read_optrom_data()
2644 struct qla_hw_data *ha = vha->hw; in qla82xx_write_flash_data()
2646 ret = -1; in qla82xx_write_flash_data()
2648 /* Prepare burst-capable write on supported ISPs. */ in qla82xx_write_flash_data()
2651 optrom = dma_alloc_coherent(&ha->pdev->dev, OPTROM_BURST_SIZE, in qla82xx_write_flash_data()
2661 rest_addr = ha->fdt_block_size - 1; in qla82xx_write_flash_data()
2683 /* Go with burst-write. */ in qla82xx_write_flash_data()
2689 (ha->flash_data_off | faddr), in qla82xx_write_flash_data()
2693 "Unable to burst-write optrom segment " in qla82xx_write_flash_data()
2695 (ha->flash_data_off | faddr), in qla82xx_write_flash_data()
2698 "Reverting to slow-write.\n"); in qla82xx_write_flash_data()
2700 dma_free_coherent(&ha->pdev->dev, in qla82xx_write_flash_data()
2704 liter += OPTROM_BURST_DWORDS - 1; in qla82xx_write_flash_data()
2705 faddr += OPTROM_BURST_DWORDS - 1; in qla82xx_write_flash_data()
2706 dwptr += OPTROM_BURST_DWORDS - 1; in qla82xx_write_flash_data()
2727 dma_free_coherent(&ha->pdev->dev, in qla82xx_write_flash_data()
2739 scsi_block_requests(vha->host); in qla82xx_write_optrom_data()
2741 scsi_unblock_requests(vha->host); in qla82xx_write_optrom_data()
2743 /* Convert return ISP82xx to generic */ in qla82xx_write_optrom_data()
2754 struct qla_hw_data *ha = vha->hw; in qla82xx_start_iocbs()
2755 struct req_que *req = ha->req_q_map[0]; in qla82xx_start_iocbs()
2759 req->ring_index++; in qla82xx_start_iocbs()
2760 if (req->ring_index == req->length) { in qla82xx_start_iocbs()
2761 req->ring_index = 0; in qla82xx_start_iocbs()
2762 req->ring_ptr = req->ring; in qla82xx_start_iocbs()
2764 req->ring_ptr++; in qla82xx_start_iocbs()
2766 dbval = 0x04 | (ha->portnum << 5); in qla82xx_start_iocbs()
2768 dbval = dbval | (req->id << 8) | (req->ring_index << 16); in qla82xx_start_iocbs()
2770 qla82xx_wr_32(ha, (unsigned long)ha->nxdb_wr_ptr, dbval); in qla82xx_start_iocbs()
2772 wrt_reg_dword(ha->nxdb_wr_ptr, dbval); in qla82xx_start_iocbs()
2774 while (rd_reg_dword(ha->nxdb_rd_ptr) != dbval) { in qla82xx_start_iocbs()
2775 wrt_reg_dword(ha->nxdb_wr_ptr, dbval); in qla82xx_start_iocbs()
2784 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla82xx_rom_lock_recovery()
2818 struct qla_hw_data *ha = vha->hw; in qla82xx_device_bootstrap()
2825 if (ha->flags.isp82xx_fw_hung) in qla82xx_device_bootstrap()
2878 struct qla_hw_data *ha = vha->hw; in qla82xx_need_qsnt_handler()
2882 if (vha->flags.online) { in qla82xx_need_qsnt_handler()
2950 struct qla_hw_data *ha = vha->hw; in qla82xx_wait_for_state_change()
2966 struct qla_hw_data *ha = vha->hw; in qla8xxx_dev_failed_handler()
2981 vha->device_flags |= DFLG_DEV_FAILED; in qla8xxx_dev_failed_handler()
2984 vha->flags.online = 0; in qla8xxx_dev_failed_handler()
2985 vha->flags.init_done = 0; in qla8xxx_dev_failed_handler()
3005 struct qla_hw_data *ha = vha->hw; in qla82xx_need_reset_handler()
3006 struct req_que *req = ha->req_q_map[0]; in qla82xx_need_reset_handler()
3008 if (vha->flags.online) { in qla82xx_need_reset_handler()
3011 ha->isp_ops->get_flash_version(vha, req->ring); in qla82xx_need_reset_handler()
3012 ha->isp_ops->nvram_config(vha); in qla82xx_need_reset_handler()
3017 if (!ha->flags.nic_core_reset_owner) { in qla82xx_need_reset_handler()
3019 "reset_acknowledged by 0x%x\n", ha->portnum); in qla82xx_need_reset_handler()
3022 active_mask = ~(QLA82XX_DRV_ACTIVE << (ha->portnum * 4)); in qla82xx_need_reset_handler()
3029 reset_timeout = jiffies + (ha->fcoe_reset_timeout * HZ); in qla82xx_need_reset_handler()
3052 if (ha->flags.nic_core_reset_owner) in qla82xx_need_reset_handler()
3070 "HW State: COLD/RE-INIT.\n"); in qla82xx_need_reset_handler()
3086 struct qla_hw_data *ha = vha->hw; in qla82xx_check_md_needed()
3090 fw_major_version = ha->fw_major_version; in qla82xx_check_md_needed()
3091 fw_minor_version = ha->fw_minor_version; in qla82xx_check_md_needed()
3092 fw_subminor_version = ha->fw_subminor_version; in qla82xx_check_md_needed()
3099 if (!ha->fw_dumped) { in qla82xx_check_md_needed()
3100 if ((fw_major_version != ha->fw_major_version || in qla82xx_check_md_needed()
3101 fw_minor_version != ha->fw_minor_version || in qla82xx_check_md_needed()
3102 fw_subminor_version != ha->fw_subminor_version) || in qla82xx_check_md_needed()
3103 (ha->prev_minidump_failed)) { in qla82xx_check_md_needed()
3105 …"Firmware version differs Previous version: %d:%d:%d - New version: %d:%d:%d, prev_minidump_failed… in qla82xx_check_md_needed()
3108 ha->fw_major_version, in qla82xx_check_md_needed()
3109 ha->fw_minor_version, in qla82xx_check_md_needed()
3110 ha->fw_subminor_version, in qla82xx_check_md_needed()
3111 ha->prev_minidump_failed); in qla82xx_check_md_needed()
3131 fw_heartbeat_counter = qla82xx_rd_32(vha->hw, in qla82xx_check_fw_alive()
3140 if (vha->fw_heartbeat_counter == fw_heartbeat_counter) { in qla82xx_check_fw_alive()
3141 vha->seconds_since_last_heartbeat++; in qla82xx_check_fw_alive()
3143 if (vha->seconds_since_last_heartbeat == 2) { in qla82xx_check_fw_alive()
3144 vha->seconds_since_last_heartbeat = 0; in qla82xx_check_fw_alive()
3148 vha->seconds_since_last_heartbeat = 0; in qla82xx_check_fw_alive()
3149 vha->fw_heartbeat_counter = fw_heartbeat_counter; in qla82xx_check_fw_alive()
3174 struct qla_hw_data *ha = vha->hw; in qla82xx_device_state_handler()
3178 if (!vha->flags.init_done) { in qla82xx_device_state_handler()
3190 dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ); in qla82xx_device_state_handler()
3213 ha->flags.nic_core_reset_owner = 0; in qla82xx_device_state_handler()
3232 (ha->fcoe_dev_init_timeout * HZ); in qla82xx_device_state_handler()
3237 dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout in qla82xx_device_state_handler()
3244 if (ha->flags.quiesce_owner) in qla82xx_device_state_handler()
3252 dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout in qla82xx_device_state_handler()
3275 struct qla_hw_data *ha = vha->hw; in qla82xx_check_temp()
3300 temp = qla82xx_rd_32(vha->hw, CRB_TEMP_STATE); in qla82xx_read_temperature()
3306 struct qla_hw_data *ha = vha->hw; in qla82xx_clear_pending_mbx()
3308 if (ha->flags.mbox_busy) { in qla82xx_clear_pending_mbx()
3309 ha->flags.mbox_int = 1; in qla82xx_clear_pending_mbx()
3310 ha->flags.mbox_busy = 0; in qla82xx_clear_pending_mbx()
3313 if (test_and_clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags)) in qla82xx_clear_pending_mbx()
3314 complete(&ha->mbx_intr_comp); in qla82xx_clear_pending_mbx()
3321 struct qla_hw_data *ha = vha->hw; in qla82xx_watchdog()
3324 if (!ha->flags.nic_core_reset_hdlr_active) { in qla82xx_watchdog()
3327 set_bit(ISP_UNRECOVERABLE, &vha->dpc_flags); in qla82xx_watchdog()
3328 ha->flags.isp82xx_fw_hung = 1; in qla82xx_watchdog()
3331 !test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) { in qla82xx_watchdog()
3334 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); in qla82xx_watchdog()
3336 !test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags)) { in qla82xx_watchdog()
3339 set_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags); in qla82xx_watchdog()
3341 !test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) && in qla82xx_watchdog()
3342 vha->flags.online == 1) { in qla82xx_watchdog()
3345 set_bit(ISP_UNRECOVERABLE, &vha->dpc_flags); in qla82xx_watchdog()
3346 ha->flags.isp82xx_fw_hung = 1; in qla82xx_watchdog()
3380 &vha->dpc_flags); in qla82xx_watchdog()
3385 &vha->dpc_flags); in qla82xx_watchdog()
3387 ha->flags.isp82xx_fw_hung = 1; in qla82xx_watchdog()
3397 int rval = -1; in qla82xx_load_risc()
3398 struct qla_hw_data *ha = vha->hw; in qla82xx_load_risc()
3415 struct qla_hw_data *ha = vha->hw; in qla82xx_set_reset_owner()
3429 ha->flags.nic_core_reset_owner = 1; in qla82xx_set_reset_owner()
3431 "reset_owner is 0x%x\n", ha->portnum); in qla82xx_set_reset_owner()
3454 int rval = -1; in qla82xx_abort_isp()
3455 struct qla_hw_data *ha = vha->hw; in qla82xx_abort_isp()
3457 if (vha->device_flags & DFLG_DEV_FAILED) { in qla82xx_abort_isp()
3462 ha->flags.nic_core_reset_hdlr_active = 1; in qla82xx_abort_isp()
3483 ha->flags.isp82xx_fw_hung = 0; in qla82xx_abort_isp()
3484 ha->flags.nic_core_reset_hdlr_active = 0; in qla82xx_abort_isp()
3489 vha->flags.online = 1; in qla82xx_abort_isp()
3490 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { in qla82xx_abort_isp()
3491 if (ha->isp_abort_cnt == 0) { in qla82xx_abort_isp()
3493 "ISP error recover failed - board " in qla82xx_abort_isp()
3499 ha->isp_ops->reset_adapter(vha); in qla82xx_abort_isp()
3500 vha->flags.online = 0; in qla82xx_abort_isp()
3502 &vha->dpc_flags); in qla82xx_abort_isp()
3505 ha->isp_abort_cnt--; in qla82xx_abort_isp()
3507 "ISP abort - retry remaining %d.\n", in qla82xx_abort_isp()
3508 ha->isp_abort_cnt); in qla82xx_abort_isp()
3512 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT; in qla82xx_abort_isp()
3514 "ISP error recovery - retrying (%d) more times.\n", in qla82xx_abort_isp()
3515 ha->isp_abort_cnt); in qla82xx_abort_isp()
3516 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags); in qla82xx_abort_isp()
3540 if (vha->flags.online) { in qla82xx_fcoe_ctx_reset()
3574 while ((test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) || in qla2x00_wait_for_fcoe_ctx_reset()
3575 test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) in qla2x00_wait_for_fcoe_ctx_reset()
3581 if (!test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) && in qla2x00_wait_for_fcoe_ctx_reset()
3582 !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) { in qla2x00_wait_for_fcoe_ctx_reset()
3598 struct qla_hw_data *ha = vha->hw; in qla82xx_chip_reset_cleanup()
3604 if (!ha->flags.isp82xx_fw_hung) { in qla82xx_chip_reset_cleanup()
3612 ha->flags.isp82xx_fw_hung = 1; in qla82xx_chip_reset_cleanup()
3620 __func__, ha->flags.isp82xx_fw_hung); in qla82xx_chip_reset_cleanup()
3623 if (!ha->flags.isp82xx_fw_hung) { in qla82xx_chip_reset_cleanup()
3628 spin_lock_irqsave(&ha->hardware_lock, flags); in qla82xx_chip_reset_cleanup()
3629 for (que = 0; que < ha->max_req_queues; que++) { in qla82xx_chip_reset_cleanup()
3630 req = ha->req_q_map[que]; in qla82xx_chip_reset_cleanup()
3633 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) { in qla82xx_chip_reset_cleanup()
3634 sp = req->outstanding_cmds[cnt]; in qla82xx_chip_reset_cleanup()
3636 if ((!sp->u.scmd.crc_ctx || in qla82xx_chip_reset_cleanup()
3637 (sp->flags & in qla82xx_chip_reset_cleanup()
3639 !ha->flags.isp82xx_fw_hung) { in qla82xx_chip_reset_cleanup()
3641 &ha->hardware_lock, flags); in qla82xx_chip_reset_cleanup()
3642 if (ha->isp_ops->abort_command(sp)) { in qla82xx_chip_reset_cleanup()
3651 spin_lock_irqsave(&ha->hardware_lock, flags); in qla82xx_chip_reset_cleanup()
3656 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla82xx_chip_reset_cleanup()
3675 struct qla_hw_data *ha = vha->hw; in qla82xx_minidump_process_control()
3684 tmplt_hdr = (struct qla82xx_md_template_hdr *)ha->md_tmplt_hdr; in qla82xx_minidump_process_control()
3686 crb_addr = crb_entry->addr; in qla82xx_minidump_process_control()
3688 for (i = 0; i < crb_entry->op_count; i++) { in qla82xx_minidump_process_control()
3689 opcode = crb_entry->crb_ctrl.opcode; in qla82xx_minidump_process_control()
3692 crb_entry->value_1, 1); in qla82xx_minidump_process_control()
3704 read_value &= crb_entry->value_2; in qla82xx_minidump_process_control()
3707 read_value |= crb_entry->value_3; in qla82xx_minidump_process_control()
3715 read_value |= crb_entry->value_3; in qla82xx_minidump_process_control()
3721 poll_time = crb_entry->crb_strd.poll_timeout; in qla82xx_minidump_process_control()
3726 if ((read_value & crb_entry->value_2) in qla82xx_minidump_process_control()
3727 == crb_entry->value_1) in qla82xx_minidump_process_control()
3741 if (crb_entry->crb_strd.state_index_a) { in qla82xx_minidump_process_control()
3742 index = crb_entry->crb_strd.state_index_a; in qla82xx_minidump_process_control()
3743 addr = tmplt_hdr->saved_state_array[index]; in qla82xx_minidump_process_control()
3748 index = crb_entry->crb_ctrl.state_index_v; in qla82xx_minidump_process_control()
3749 tmplt_hdr->saved_state_array[index] = read_value; in qla82xx_minidump_process_control()
3754 if (crb_entry->crb_strd.state_index_a) { in qla82xx_minidump_process_control()
3755 index = crb_entry->crb_strd.state_index_a; in qla82xx_minidump_process_control()
3756 addr = tmplt_hdr->saved_state_array[index]; in qla82xx_minidump_process_control()
3760 if (crb_entry->crb_ctrl.state_index_v) { in qla82xx_minidump_process_control()
3761 index = crb_entry->crb_ctrl.state_index_v; in qla82xx_minidump_process_control()
3763 tmplt_hdr->saved_state_array[index]; in qla82xx_minidump_process_control()
3765 read_value = crb_entry->value_1; in qla82xx_minidump_process_control()
3772 index = crb_entry->crb_ctrl.state_index_v; in qla82xx_minidump_process_control()
3773 read_value = tmplt_hdr->saved_state_array[index]; in qla82xx_minidump_process_control()
3774 read_value <<= crb_entry->crb_ctrl.shl; in qla82xx_minidump_process_control()
3775 read_value >>= crb_entry->crb_ctrl.shr; in qla82xx_minidump_process_control()
3776 if (crb_entry->value_2) in qla82xx_minidump_process_control()
3777 read_value &= crb_entry->value_2; in qla82xx_minidump_process_control()
3778 read_value |= crb_entry->value_3; in qla82xx_minidump_process_control()
3779 read_value += crb_entry->value_1; in qla82xx_minidump_process_control()
3780 tmplt_hdr->saved_state_array[index] = read_value; in qla82xx_minidump_process_control()
3783 crb_addr += crb_entry->crb_strd.addr_stride; in qla82xx_minidump_process_control()
3792 struct qla_hw_data *ha = vha->hw; in qla82xx_minidump_process_rdocm()
3798 r_addr = ocm_hdr->read_addr; in qla82xx_minidump_process_rdocm()
3799 r_stride = ocm_hdr->read_addr_stride; in qla82xx_minidump_process_rdocm()
3800 loop_cnt = ocm_hdr->op_count; in qla82xx_minidump_process_rdocm()
3803 r_value = rd_reg_dword(r_addr + ha->nx_pcibase); in qla82xx_minidump_process_rdocm()
3814 struct qla_hw_data *ha = vha->hw; in qla82xx_minidump_process_rdmux()
3820 r_addr = mux_hdr->read_addr; in qla82xx_minidump_process_rdmux()
3821 s_addr = mux_hdr->select_addr; in qla82xx_minidump_process_rdmux()
3822 s_stride = mux_hdr->select_value_stride; in qla82xx_minidump_process_rdmux()
3823 s_value = mux_hdr->select_value; in qla82xx_minidump_process_rdmux()
3824 loop_cnt = mux_hdr->op_count; in qla82xx_minidump_process_rdmux()
3840 struct qla_hw_data *ha = vha->hw; in qla82xx_minidump_process_rdcrb()
3846 r_addr = crb_hdr->addr; in qla82xx_minidump_process_rdcrb()
3847 r_stride = crb_hdr->crb_strd.addr_stride; in qla82xx_minidump_process_rdcrb()
3848 loop_cnt = crb_hdr->op_count; in qla82xx_minidump_process_rdcrb()
3863 struct qla_hw_data *ha = vha->hw; in qla82xx_minidump_process_l2tag()
3873 loop_count = cache_hdr->op_count; in qla82xx_minidump_process_l2tag()
3874 r_addr = cache_hdr->read_addr; in qla82xx_minidump_process_l2tag()
3875 c_addr = cache_hdr->control_addr; in qla82xx_minidump_process_l2tag()
3876 c_value_w = cache_hdr->cache_ctrl.write_value; in qla82xx_minidump_process_l2tag()
3878 t_r_addr = cache_hdr->tag_reg_addr; in qla82xx_minidump_process_l2tag()
3879 t_value = cache_hdr->addr_ctrl.init_tag_value; in qla82xx_minidump_process_l2tag()
3880 r_cnt = cache_hdr->read_ctrl.read_addr_cnt; in qla82xx_minidump_process_l2tag()
3881 p_wait = cache_hdr->cache_ctrl.poll_wait; in qla82xx_minidump_process_l2tag()
3882 p_mask = cache_hdr->cache_ctrl.poll_mask; in qla82xx_minidump_process_l2tag()
3910 addr += cache_hdr->read_ctrl.read_addr_stride; in qla82xx_minidump_process_l2tag()
3912 t_value += cache_hdr->addr_ctrl.tag_value_stride; in qla82xx_minidump_process_l2tag()
3922 struct qla_hw_data *ha = vha->hw; in qla82xx_minidump_process_l1cache()
3930 loop_count = cache_hdr->op_count; in qla82xx_minidump_process_l1cache()
3931 r_addr = cache_hdr->read_addr; in qla82xx_minidump_process_l1cache()
3932 c_addr = cache_hdr->control_addr; in qla82xx_minidump_process_l1cache()
3933 c_value_w = cache_hdr->cache_ctrl.write_value; in qla82xx_minidump_process_l1cache()
3935 t_r_addr = cache_hdr->tag_reg_addr; in qla82xx_minidump_process_l1cache()
3936 t_value = cache_hdr->addr_ctrl.init_tag_value; in qla82xx_minidump_process_l1cache()
3937 r_cnt = cache_hdr->read_ctrl.read_addr_cnt; in qla82xx_minidump_process_l1cache()
3946 addr += cache_hdr->read_ctrl.read_addr_stride; in qla82xx_minidump_process_l1cache()
3948 t_value += cache_hdr->addr_ctrl.tag_value_stride; in qla82xx_minidump_process_l1cache()
3957 struct qla_hw_data *ha = vha->hw; in qla82xx_minidump_process_queue()
3965 s_addr = q_hdr->select_addr; in qla82xx_minidump_process_queue()
3966 r_cnt = q_hdr->rd_strd.read_addr_cnt; in qla82xx_minidump_process_queue()
3967 r_stride = q_hdr->rd_strd.read_addr_stride; in qla82xx_minidump_process_queue()
3968 loop_cnt = q_hdr->op_count; in qla82xx_minidump_process_queue()
3972 r_addr = q_hdr->read_addr; in qla82xx_minidump_process_queue()
3978 qid += q_hdr->q_strd.queue_id_stride; in qla82xx_minidump_process_queue()
3987 struct qla_hw_data *ha = vha->hw; in qla82xx_minidump_process_rdrom()
3994 r_addr = rom_hdr->read_addr; in qla82xx_minidump_process_rdrom()
3995 loop_cnt = rom_hdr->read_data_size/sizeof(uint32_t); in qla82xx_minidump_process_rdrom()
4013 struct qla_hw_data *ha = vha->hw; in qla82xx_minidump_process_rdmem()
4022 r_addr = m_hdr->read_addr; in qla82xx_minidump_process_rdmem()
4023 loop_cnt = m_hdr->read_data_size/16; in qla82xx_minidump_process_rdmem()
4031 if (m_hdr->read_data_size % 16) { in qla82xx_minidump_process_rdmem()
4034 m_hdr->read_data_size); in qla82xx_minidump_process_rdmem()
4040 __func__, r_addr, m_hdr->read_data_size, loop_cnt); in qla82xx_minidump_process_rdmem()
4042 write_lock_irqsave(&ha->hw_lock, flags); in qla82xx_minidump_process_rdmem()
4062 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_minidump_process_rdmem()
4073 write_unlock_irqrestore(&ha->hw_lock, flags); in qla82xx_minidump_process_rdmem()
4081 struct qla_hw_data *ha = vha->hw; in qla82xx_validate_template_chksum()
4083 uint32_t *d_ptr = (uint32_t *)ha->md_tmplt_hdr; in qla82xx_validate_template_chksum()
4084 int count = ha->md_template_size/sizeof(uint32_t); in qla82xx_validate_template_chksum()
4086 while (count-- > 0) in qla82xx_validate_template_chksum()
4097 entry_hdr->d_ctrl.driver_flags |= QLA82XX_DBG_SKIPPED_FLAG; in qla82xx_mark_entry_skipped()
4100 "ETYPE[0x%x]-ELEVEL[0x%x]\n", in qla82xx_mark_entry_skipped()
4101 index, entry_hdr->entry_type, in qla82xx_mark_entry_skipped()
4102 entry_hdr->d_ctrl.entry_capture_mask); in qla82xx_mark_entry_skipped()
4108 struct qla_hw_data *ha = vha->hw; in qla82xx_md_collect()
4116 tmplt_hdr = (struct qla82xx_md_template_hdr *)ha->md_tmplt_hdr; in qla82xx_md_collect()
4117 data_ptr = ha->md_dump; in qla82xx_md_collect()
4119 if (ha->fw_dumped) { in qla82xx_md_collect()
4122 "-- ignoring request.\n", ha->fw_dump); in qla82xx_md_collect()
4126 ha->fw_dumped = false; in qla82xx_md_collect()
4128 if (!ha->md_tmplt_hdr || !ha->md_dump) { in qla82xx_md_collect()
4134 if (ha->flags.isp82xx_no_md_cap) { in qla82xx_md_collect()
4138 ha->flags.isp82xx_no_md_cap = 0; in qla82xx_md_collect()
4148 no_entry_hdr = tmplt_hdr->num_of_entries; in qla82xx_md_collect()
4153 "Capture Mask obtained: 0x%x\n", tmplt_hdr->capture_debug_level); in qla82xx_md_collect()
4155 f_capture_mask = tmplt_hdr->capture_debug_level & 0xFF; in qla82xx_md_collect()
4164 tmplt_hdr->driver_capture_mask = ql2xmdcapmask; in qla82xx_md_collect()
4166 tmplt_hdr->driver_info[0] = vha->host_no; in qla82xx_md_collect()
4167 tmplt_hdr->driver_info[1] = (QLA_DRIVER_MAJOR_VER << 24) | in qla82xx_md_collect()
4171 total_data_size = ha->md_dump_size; in qla82xx_md_collect()
4177 if (tmplt_hdr->entry_type != QLA82XX_TLHDR) { in qla82xx_md_collect()
4180 tmplt_hdr->entry_type); in qla82xx_md_collect()
4185 (((uint8_t *)ha->md_tmplt_hdr) + tmplt_hdr->first_entry_offset); in qla82xx_md_collect()
4197 if (!(entry_hdr->d_ctrl.entry_capture_mask & in qla82xx_md_collect()
4199 entry_hdr->d_ctrl.driver_flags |= in qla82xx_md_collect()
4203 "ETYPE[0x%x]-ELEVEL[0x%x]\n", in qla82xx_md_collect()
4204 i, entry_hdr->entry_type, in qla82xx_md_collect()
4205 entry_hdr->d_ctrl.entry_capture_mask); in qla82xx_md_collect()
4213 entry_hdr->entry_type, in qla82xx_md_collect()
4214 entry_hdr->d_ctrl.entry_capture_mask); in qla82xx_md_collect()
4218 data_collected, (ha->md_dump_size - data_collected)); in qla82xx_md_collect()
4222 switch (entry_hdr->entry_type) { in qla82xx_md_collect()
4288 data_collected = (uint8_t *)data_ptr - in qla82xx_md_collect()
4289 (uint8_t *)ha->md_dump; in qla82xx_md_collect()
4292 (((uint8_t *)entry_hdr) + entry_hdr->entry_size); in qla82xx_md_collect()
4305 vha->host_no, ha->md_tmplt_hdr, vha->host_no, ha->md_dump); in qla82xx_md_collect()
4306 ha->fw_dumped = true; in qla82xx_md_collect()
4316 struct qla_hw_data *ha = vha->hw; in qla82xx_md_alloc()
4320 tmplt_hdr = (struct qla82xx_md_template_hdr *)ha->md_tmplt_hdr; in qla82xx_md_alloc()
4323 ql2xmdcapmask = tmplt_hdr->capture_debug_level & 0xFF; in qla82xx_md_alloc()
4331 ha->md_dump_size += tmplt_hdr->capture_size_array[k]; in qla82xx_md_alloc()
4334 if (ha->md_dump) { in qla82xx_md_alloc()
4340 ha->md_dump = vmalloc(ha->md_dump_size); in qla82xx_md_alloc()
4341 if (ha->md_dump == NULL) { in qla82xx_md_alloc()
4344 "(0x%x).\n", ha->md_dump_size); in qla82xx_md_alloc()
4353 struct qla_hw_data *ha = vha->hw; in qla82xx_md_free()
4356 if (ha->md_tmplt_hdr) { in qla82xx_md_free()
4359 ha->md_tmplt_hdr, ha->md_template_size / 1024); in qla82xx_md_free()
4360 dma_free_coherent(&ha->pdev->dev, ha->md_template_size, in qla82xx_md_free()
4361 ha->md_tmplt_hdr, ha->md_tmplt_hdr_dma); in qla82xx_md_free()
4362 ha->md_tmplt_hdr = NULL; in qla82xx_md_free()
4366 if (ha->md_dump) { in qla82xx_md_free()
4369 ha->md_dump, ha->md_dump_size / 1024); in qla82xx_md_free()
4370 vfree(ha->md_dump); in qla82xx_md_free()
4371 ha->md_dump_size = 0; in qla82xx_md_free()
4372 ha->md_dump = NULL; in qla82xx_md_free()
4379 struct qla_hw_data *ha = vha->hw; in qla82xx_md_prep()
4387 ha->md_template_size / 1024); in qla82xx_md_prep()
4404 ha->md_dump_size / 1024); in qla82xx_md_prep()
4408 ha->md_tmplt_hdr, in qla82xx_md_prep()
4409 ha->md_template_size / 1024); in qla82xx_md_prep()
4410 dma_free_coherent(&ha->pdev->dev, in qla82xx_md_prep()
4411 ha->md_template_size, in qla82xx_md_prep()
4412 ha->md_tmplt_hdr, ha->md_tmplt_hdr_dma); in qla82xx_md_prep()
4413 ha->md_tmplt_hdr = NULL; in qla82xx_md_prep()
4425 struct qla_hw_data *ha = vha->hw; in qla82xx_beacon_on()
4435 ha->beacon_blink_led = 1; in qla82xx_beacon_on()
4446 struct qla_hw_data *ha = vha->hw; in qla82xx_beacon_off()
4456 ha->beacon_blink_led = 0; in qla82xx_beacon_off()
4465 struct qla_hw_data *ha = vha->hw; in qla82xx_fw_dump()
4467 if (!ha->allow_cna_fw_dump) in qla82xx_fw_dump()
4470 scsi_block_requests(vha->host); in qla82xx_fw_dump()
4471 ha->flags.isp82xx_no_md_cap = 1; in qla82xx_fw_dump()
4476 scsi_unblock_requests(vha->host); in qla82xx_fw_dump()