3336 	wrt_reg_dword(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);  in qla24xx_reset_risc()
3353 	wrt_reg_dword(&reg->ctrl_status,  in qla24xx_reset_risc()
3413 	wrt_reg_dword(&reg->hccr, HCCRX_SET_RISC_RESET);  in qla24xx_reset_risc()
3416 	wrt_reg_dword(&reg->hccr, HCCRX_REL_RISC_PAUSE);  in qla24xx_reset_risc()
3419 	wrt_reg_dword(&reg->hccr, HCCRX_CLR_RISC_RESET);  in qla24xx_reset_risc()
3465 	wrt_reg_dword(&reg->iobase_addr, RISC_REGISTER_BASE_OFFSET);  in qla25xx_read_risc_sema_reg()
3474 	wrt_reg_dword(&reg->iobase_addr, RISC_REGISTER_BASE_OFFSET);  in qla25xx_write_risc_sema_reg()
3475 	wrt_reg_dword(&reg->iobase_window + RISC_REGISTER_WINDOW_OFFSET, data);  in qla25xx_write_risc_sema_reg()
3491 	wrt_reg_dword(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE);  in qla25xx_manipulate_risc_semaphore()
4727 		wrt_reg_dword(&reg->isp25mq.req_q_in, 0);  in qla24xx_config_rings()
4728 		wrt_reg_dword(&reg->isp25mq.req_q_out, 0);  in qla24xx_config_rings()
4729 		wrt_reg_dword(&reg->isp25mq.rsp_q_in, 0);  in qla24xx_config_rings()
4730 		wrt_reg_dword(&reg->isp25mq.rsp_q_out, 0);  in qla24xx_config_rings()
4732 		wrt_reg_dword(&reg->isp24.req_q_in, 0);  in qla24xx_config_rings()
4733 		wrt_reg_dword(&reg->isp24.req_q_out, 0);  in qla24xx_config_rings()
4734 		wrt_reg_dword(&reg->isp24.rsp_q_in, 0);  in qla24xx_config_rings()
4735 		wrt_reg_dword(&reg->isp24.rsp_q_out, 0);  in qla24xx_config_rings()
7828 	wrt_reg_dword(&reg->hccr, HCCRX_SET_RISC_RESET);  in qla24xx_reset_adapter()
7830 	wrt_reg_dword(&reg->hccr, HCCRX_REL_RISC_PAUSE);  in qla24xx_reset_adapter()