Lines Matching +full:gpio +full:- +full:7 +full:- +full:segment
1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright (c) 2003-2014 QLogic Corporation
10 #include <linux/nvme-fc.h>
78 /* Bits 15-0 of word 0 */
80 /* Bits 15-0 of word 3 */
87 uint16_t prli_nvme_svc_param_word_0; /* Bits 15-0 of word 0 */
88 uint16_t prli_nvme_svc_param_word_3; /* Bits 15-0 of word 3 */
111 u8 prli_svc_param_word_0[2]; /* Bits 15-0 of word 0 */
112 u8 prli_svc_param_word_3[2]; /* Bits 15-0 of word 3 */
164 * BIT 1-15 =
166 * BIT 0-7 = Reserved
167 * BIT 8-10 = Output Swing 1G
168 * BIT 11-13 = Output Emphasis 1G
169 * BIT 14-15 = Reserved
171 * BIT 0-7 = Reserved
172 * BIT 8-10 = Output Swing 2G
173 * BIT 11-13 = Output Emphasis 2G
174 * BIT 14-15 = Reserved
176 * BIT 0-7 = Reserved
177 * BIT 8-10 = Output Swing 4G
178 * BIT 11-13 = Output Emphasis 4G
179 * BIT 14-15 = Reserved
208 * BIT 7 =
219 * BIT 16-31 =
244 * BIT 1 = Alt-Boot Enable
250 * BIT 7-31 =
365 * BIT 2 = Enable Full-Duplex
369 * BIT 6 = Acquire FA-WWN
370 * BIT 7 = Enable D-port Diagnostics
379 * BIT 15-31 = Reserved
391 * BIT 7 = Enable Non part on LIHA failure
396 * BIT 11 = Enable FC-SP Security
400 * BIT 15-31 = Reserved
411 * BIT 6 = Enable Receive Out-of-Order data frame handling
412 * BIT 7 = Disable Automatic PLOGI on Local Loop
415 * BIT 9 = Enable Out-of-Order FCP_XFER_RDY relative offset handling
423 * BIT 17-28 = Reserved
435 * ISP queue - command entry structure definition.
450 __le16 wr_dseg_count; /* Write Data segment count. */
451 __le16 rd_dseg_count; /* Read Data segment count. */
460 __le16 fcp_cmnd_dseg_len; /* Data segment length. */
461 __le64 fcp_cmnd_dseg_address __packed;/* Data segment address. */
486 __le16 dseg_count; /* Data segment count. */
501 __le16 fcp_cmnd_dseg_len; /* Data segment length. */
502 /* Data segment address. */
504 /* Data segment address. */
515 #define COMMAND_TYPE_7 0x18 /* Command Type 7 entry */
528 __le16 dseg_count; /* Data segment count. */
562 * (T10-DIF) */
574 __le16 dseg_count; /* Data segment count. */
582 __le16 fcp_cmnd_dseg_len; /* Data segment length. */
584 /* Data segment address. */
592 __le64 crc_context_address __packed; /* Data segment address. */
593 __le16 crc_context_len; /* Data segment length. */
599 * ISP queue - status entry structure definition.
648 * format; but all of the "data" field gets swab32-d in the beginning
651 * &data[10] : uint8_t report_runt_bg[2]; - computed guard
652 * &data[12] : uint8_t actual_dif[8]; - DIF Data received
653 * &data[20] : uint8_t expected_dif[8]; - DIF Data computed
668 * ISP queue - marker entry structure definition.
681 uint8_t modifier; /* Modifier (7-0). */
697 * ISP queue - CT Pass-Through entry structure definition.
699 #define CT_IOCB_TYPE 0x29 /* CT Pass-Through IOCB entry */
733 * ISP queue - PUREX IOCB entry structure definition
775 * ISP queue - ELS Pass-Through entry structure definition.
777 #define ELS_IOCB_TYPE 0x53 /* ELS Pass-Through IOCB entry */
870 * ISP queue - Mailbox Command entry structure definition.
905 #define LCF_COMMON_FEAT BIT_7 /* PLOGI - Set Common Features Field */
910 #define LCF_COND_PLOGI BIT_4 /* PLOGI only if not logged-in. */
1102 #define BA_RJT_RSN_PROTOCOL_ERROR 7
1177 /* PCI-X Bus Mode. */
1185 #define PBM_PCIX_M2_133MHZ (7 << 8)
1194 #define CSRX_64BIT_SLOT BIT_2 /* PCI 64-Bit Bus Slot. */
1207 __le32 req_q_in; /* In-Pointer. */
1208 __le32 req_q_out; /* Out-Pointer. */
1210 __le32 rsp_q_in; /* In-Pointer. */
1211 __le32 rsp_q_out; /* Out-Pointer. */
1213 __le32 preq_q_in; /* In-Pointer. */
1214 __le32 preq_q_out; /* Out-Pointer. */
1219 __le32 atio_q_in; /* In-Pointer. */
1220 __le32 atio_q_out; /* Out-Pointer. */
1248 __le32 gpiod; /* GPIO Data register. */
1267 __le32 gpioe; /* GPIO Enable register. */
1322 /* RISC-RISC semaphore register PCI offet */
1326 /* RISC-RISC semaphore/flag register (risc address 0x7016) */
1360 #define MIN_MULTI_ID_FABRIC 64 /* Must be power-of-2. */
1373 * BIT 6-7 = Reserved
1593 __le64 tx_address __packed; /* Data segment 0 address. */
1594 uint32_t tx_len; /* Data segment 0 length. */
1595 __le64 rx_address __packed; /* Data segment 1 address. */
1596 uint32_t rx_len; /* Data segment 1 length. */
1950 __le16 reserved_6_2[7];
1967 * BIT 7 = Interrupt enable
1988 * BIT 26-31 =
2013 * BIT 1 = Alt-Boot Enable
2019 * BIT 7-31 =
2054 * BIT 2-5 = Distance Support if BIT 0 is on
2056 * BIT 7 = SCM Disabled if BIT is set (1)
2057 * BIT 8-15 = Unused
2126 * BIT 0-3 = Reserved
2130 * BIT 7 = Reserved
2132 * BIT 8-13 = Reserved
2134 * BIT 15-31 = Reserved
2143 * BIT 4-7 = Reserved
2148 * BIT 11 = Enable FC-SP Security
2152 * BIT 15-31 = Reserved
2157 * BIT 0-3 = Reserved
2160 * BIT 6 = Enable Receive Out-of-Order data frame handling
2161 * BIT 7 = Reserved
2164 * BIT 9 = Enable Out-of-Order FCP_XFER_RDY relative offset handling
2165 * BIT 10-16 = Reserved
2167 * BIT 18-20 = MAC addressing mode
2168 * BIT 21-25 = Ethernet data rate
2173 * BIT 30-31 = Reserved
2199 uint16_t reserved_2[7];
2230 /* unused; -1 (wild card) */
2232 /* unused; -1 (wild card) */
2234 /* -1 (wild card) */
2236 /* -1 (wild card) */
2237 uint8_t src_wwpn[8]; /* Source WWPN: -1 (wild card) */
2238 uint8_t dst_wwpn[8]; /* Destination WWPN: -1 (wild card) */
2264 /* 81XX Flash locations -- occupies second 2MB region. */
2281 /* 83XX Flash locations -- occupies second 8MB region. */