Lines Matching defs:opc

1199 	u32 opc = OPC_INB_SET_CONTROLLER_CONFIG;
1224 	rc = pm8001_mpi_build_cmd(pm8001_ha, 0, opc, &payload,
1244 	u32 opc = OPC_INB_SET_CONTROLLER_CONFIG;
1294 	rc = pm8001_mpi_build_cmd(pm8001_ha, 0, opc, &payload,
1402 	u32 opc = OPC_INB_KEK_MANAGEMENT;
1421 	rc = pm8001_mpi_build_cmd(pm8001_ha, 0, opc, &payload,
3132 	u32 opc = OPC_INB_SAS_HW_EVENT_ACK;
3141 	pm8001_mpi_build_cmd(pm8001_ha, Qnum, opc, &payload,
3855 	u32 opc = (u32)((le32_to_cpu(pHeader)) & 0xFFF);
3857 	switch (opc) {
3978 			   "OPC_OUB_PHY_START_RESP opcode:%x\n", opc);
3983 			   "OPC_OUB_PHY_STOP_RESP opcode:%x\n", opc);
3988 			   "OPC_OUB_SET_CONTROLLER_CONFIG opcode:%x\n", opc);
3993 			   "OPC_OUB_GET_CONTROLLER_CONFIG opcode:%x\n", opc);
3998 			   "OPC_OUB_GET_PHY_PROFILE opcode:%x\n", opc);
4003 			   "OPC_OUB_FLASH_OP_EXT opcode:%x\n", opc);
4008 			   "OPC_OUB_SET_PHY_PROFILE opcode:%x\n", opc);
4013 			   "OPC_OUB_KEK_MANAGEMENT_RESP opcode:%x\n", opc);
4018 			   "OPC_OUB_DEK_MANAGEMENT_RESP opcode:%x\n", opc);
4023 			   "OPC_OUB_SSP_COALESCED_COMP_RESP opcode:%x\n", opc);
4028 			   "Unknown outbound Queue IOMB OPC = 0x%x\n", opc);
4179 	u32 opc;
4207 	opc = OPC_INB_SMP_REQUEST;
4275 	rc = pm8001_mpi_build_cmd(pm8001_ha, 0, opc, &smp_cmd,
4349 	u32 opc = OPC_INB_SSPINIIOSTART;
4374 		opc = OPC_INB_SSP_INI_DIF_ENC_IO;
4484 	return pm8001_mpi_build_cmd(pm8001_ha, q_index, opc, &ssp_cmd,
4502 	u32 opc = OPC_INB_SATA_HOST_OPSTART;
4544 		opc = OPC_INB_SATA_DIF_ENC_IO;
4680 				ccb->ccb_tag, opc,
4683 	return pm8001_mpi_build_cmd(pm8001_ha, q_index, opc, &sata_cmd,
4774 	u32	opc;
4807 	opc = OPC_INB_REG_DEV;
4828 	rc = pm8001_mpi_build_cmd(pm8001_ha, 0, opc, &payload,
4848 	u32 opc = OPC_INB_LOCAL_PHY_CONTROL;
4859 	rc = pm8001_mpi_build_cmd(pm8001_ha, 0, opc, &payload,
4904 	u32 opc = OPC_INB_SET_PHY_PROFILE;
4923 	rc = pm8001_mpi_build_cmd(pm8001_ha, 0, opc, &payload,
4945 	u32 tag, opc;
4957 	opc = OPC_INB_SET_PHY_PROFILE;
4967 	rc = pm8001_mpi_build_cmd(pm8001_ha, 0, opc, &payload,