Lines Matching refs:INIT
406 pm8001_dbg(pm8001_ha, INIT, in pm8001_bar4_shift()
629 pm8001_dbg(pm8001_ha, INIT, "Scratchpad 0 Offset: %x\n", offset); in init_pci_device_addresses()
632 pm8001_dbg(pm8001_ha, INIT, "Scratchpad 0 PCI BAR: %d\n", pcibar); in init_pci_device_addresses()
689 pm8001_dbg(pm8001_ha, INIT, "MPI initialize successful!\n"); in pm8001_chip_init()
775 pm8001_dbg(pm8001_ha, INIT, "Firmware is ready for reset.\n"); in soft_reset_ready_check()
844 pm8001_dbg(pm8001_ha, INIT, "MBIC - NMI Enable VPE0 (IOP)= 0x%x\n", in pm8001_chip_soft_rst()
855 pm8001_dbg(pm8001_ha, INIT, "MBIC - NMI Enable VPE0 (AAP1)= 0x%x\n", in pm8001_chip_soft_rst()
860 pm8001_dbg(pm8001_ha, INIT, "PCIE -Event Interrupt Enable = 0x%x\n", in pm8001_chip_soft_rst()
865 pm8001_dbg(pm8001_ha, INIT, "PCIE - Event Interrupt = 0x%x\n", in pm8001_chip_soft_rst()
870 pm8001_dbg(pm8001_ha, INIT, "PCIE -Error Interrupt Enable = 0x%x\n", in pm8001_chip_soft_rst()
875 pm8001_dbg(pm8001_ha, INIT, "PCIE - Error Interrupt = 0x%x\n", regVal); in pm8001_chip_soft_rst()
895 pm8001_dbg(pm8001_ha, INIT, in pm8001_chip_soft_rst()
912 pm8001_dbg(pm8001_ha, INIT, in pm8001_chip_soft_rst()
919 pm8001_dbg(pm8001_ha, INIT, in pm8001_chip_soft_rst()
923 pm8001_dbg(pm8001_ha, INIT, in pm8001_chip_soft_rst()
929 pm8001_dbg(pm8001_ha, INIT, in pm8001_chip_soft_rst()
933 pm8001_dbg(pm8001_ha, INIT, in pm8001_chip_soft_rst()
939 pm8001_dbg(pm8001_ha, INIT, "GSM 0x300048 - Write Data Parity Check Enable = 0x%x\n", in pm8001_chip_soft_rst()
942 pm8001_dbg(pm8001_ha, INIT, in pm8001_chip_soft_rst()
951 pm8001_dbg(pm8001_ha, INIT, "Shift Bar4 to 0x%x failed\n", in pm8001_chip_soft_rst()
956 pm8001_dbg(pm8001_ha, INIT, "GPIO Output Control Register: = 0x%x\n", in pm8001_chip_soft_rst()
971 pm8001_dbg(pm8001_ha, INIT, "Top Register before resetting IOP/AAP1:= 0x%x\n", in pm8001_chip_soft_rst()
978 pm8001_dbg(pm8001_ha, INIT, "Top Register before resetting BDMA/OSSP: = 0x%x\n", in pm8001_chip_soft_rst()
988 pm8001_dbg(pm8001_ha, INIT, in pm8001_chip_soft_rst()
1005 pm8001_dbg(pm8001_ha, INIT, in pm8001_chip_soft_rst()
1019 …pm8001_dbg(pm8001_ha, INIT, "GSM (0x00004088 ==> 0x00007b88) - GSM Configuration and Reset is set … in pm8001_chip_soft_rst()
1025 pm8001_dbg(pm8001_ha, INIT, in pm8001_chip_soft_rst()
1029 pm8001_dbg(pm8001_ha, INIT, "GSM 0x700038 - Read Address Parity Check Enable is set to = 0x%x\n", in pm8001_chip_soft_rst()
1034 pm8001_dbg(pm8001_ha, INIT, in pm8001_chip_soft_rst()
1040 pm8001_dbg(pm8001_ha, INIT, in pm8001_chip_soft_rst()
1100 pm8001_dbg(pm8001_ha, INIT, in pm8001_chip_soft_rst()
1105 pm8001_dbg(pm8001_ha, INIT, in pm8001_chip_soft_rst()
1108 pm8001_dbg(pm8001_ha, INIT, in pm8001_chip_soft_rst()
1112 pm8001_dbg(pm8001_ha, INIT, in pm8001_chip_soft_rst()
1123 pm8001_dbg(pm8001_ha, INIT, "SPC soft reset Complete\n"); in pm8001_chip_soft_rst()
1131 pm8001_dbg(pm8001_ha, INIT, "chip reset start\n"); in pm8001_hw_chip_rst()
1155 pm8001_dbg(pm8001_ha, INIT, "chip reset finished\n"); in pm8001_hw_chip_rst()
3309 pm8001_dbg(pm8001_ha, INIT, in pm8001_mpi_reg_resp()
4227 pm8001_dbg(pm8001_ha, INIT, "unregister device device_id %d\n", in pm8001_chip_dereg_dev_req()