2563 	unsigned char odb = readb(base + DAC960_LA_ODB_OFFSET);  in DAC960_LA_hw_mbox_status_available()  local
2565 	return odb & DAC960_LA_ODB_HWMBOX_STS_AVAIL;  in DAC960_LA_hw_mbox_status_available()
2570 	unsigned char odb = 0xFF;  in DAC960_LA_enable_intr()  local
2572 	odb &= ~DAC960_LA_IRQMASK_DISABLE_IRQ;  in DAC960_LA_enable_intr()
2573 	writeb(odb, base + DAC960_LA_IRQMASK_OFFSET);  in DAC960_LA_enable_intr()
2578 	unsigned char odb = 0xFF;  in DAC960_LA_disable_intr()  local
2580 	odb |= DAC960_LA_IRQMASK_DISABLE_IRQ;  in DAC960_LA_disable_intr()
2581 	writeb(odb, base + DAC960_LA_IRQMASK_OFFSET);  in DAC960_LA_disable_intr()
2810 	unsigned char odb = readl(base + DAC960_PG_ODB_OFFSET);  in DAC960_PG_hw_mbox_status_available()  local
2812 	return odb & DAC960_PG_ODB_HWMBOX_STS_AVAIL;  in DAC960_PG_hw_mbox_status_available()
3047 	unsigned char odb = readb(base + DAC960_PD_ODB_OFFSET);  in DAC960_PD_hw_mbox_status_available()  local
3049 	return odb & DAC960_PD_ODB_HWMBOX_STS_AVAIL;  in DAC960_PD_hw_mbox_status_available()