Lines Matching +full:0 +full:x3700
91 #define MPT2SAS_BUILD_VERSION 0
96 #define MPT3SAS_COREDUMP_LOOP_DONE (0xFF)
99 #define MPT3SAS_TIMESYNC_UNIT_MASK (0x80) /* bit 7 */
100 #define MPT3SAS_TIMESYNC_MASK (0x7F) /* 0 - 6 bits */
103 #define MPT3SAS_COREDUMP_LOOP_DONE (0xFF)
104 #define MPI26_SET_IOC_PARAMETER_SYNC_TIMESTAMP (0x81)
151 #define MPI3_HIM_MASK 0xFFFFFFFF /* mask every bit*/
153 #define MPT3SAS_INVALID_DEVICE_HANDLE 0xFFFF
170 #define NVME_TASK_MNGT_CUSTOM_MASK (0x0010)
195 #define MPT2_WARPDRIVE_LOGENTRY (0x8002)
196 #define MPT2_WARPDRIVE_LC_SSDT (0x41)
197 #define MPT2_WARPDRIVE_LC_SSDLW (0x43)
198 #define MPT2_WARPDRIVE_LC_SSDLF (0x44)
199 #define MPT2_WARPDRIVE_LC_BRMF (0x4D)
204 #define MPT_TARGET_FLAGS_RAID_COMPONENT 0x01
205 #define MPT_TARGET_FLAGS_VOLUME 0x02
206 #define MPT_TARGET_FLAGS_DELETED 0x04
207 #define MPT_TARGET_FASTPATH_IO 0x08
208 #define MPT_TARGET_FLAGS_PCIE_DEVICE 0x10
210 #define SAS2_PCI_DEVICE_B0_REVISION (0x01)
211 #define SAS3_PCI_DEVICE_C0_REVISION (0x02)
214 #define MPI26_ATLAS_PCIe_SWITCH_DEVID (0x00B2)
252 #define MPT2SAS_INTEL_RMS25JB080_SSDID 0x3516
253 #define MPT2SAS_INTEL_RMS25JB040_SSDID 0x3517
254 #define MPT2SAS_INTEL_RMS25KB080_SSDID 0x3518
255 #define MPT2SAS_INTEL_RMS25KB040_SSDID 0x3519
256 #define MPT2SAS_INTEL_RMS25LB040_SSDID 0x351A
257 #define MPT2SAS_INTEL_RMS25LB080_SSDID 0x351B
258 #define MPT2SAS_INTEL_RMS2LL080_SSDID 0x350E
259 #define MPT2SAS_INTEL_RMS2LL040_SSDID 0x350F
260 #define MPT2SAS_INTEL_RS25GB008_SSDID 0x3000
261 #define MPT2SAS_INTEL_SSD910_SSDID 0x3700
263 #define MPT3SAS_INTEL_RMS3JC080_SSDID 0x3521
264 #define MPT3SAS_INTEL_RS3GC008_SSDID 0x3522
265 #define MPT3SAS_INTEL_RS3FC044_SSDID 0x3523
266 #define MPT3SAS_INTEL_RS3UC080_SSDID 0x3524
287 #define MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID 0x1F1C
288 #define MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID 0x1F1D
289 #define MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID 0x1F1E
290 #define MPT2SAS_DELL_PERC_H200_MODULAR_SSDID 0x1F1F
291 #define MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID 0x1F20
292 #define MPT2SAS_DELL_PERC_H200_SSDID 0x1F21
293 #define MPT2SAS_DELL_6GBPS_SAS_SSDID 0x1F22
295 #define MPT3SAS_DELL_12G_HBA_SSDID 0x1F46
311 #define MPT3SAS_CISCO_12G_8E_HBA_SSDID 0x14C
312 #define MPT3SAS_CISCO_12G_8I_HBA_SSDID 0x154
313 #define MPT3SAS_CISCO_12G_AVILA_HBA_SSDID 0x155
314 #define MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_SSDID 0x156
319 #define MPT3_DIAG_BUFFER_IS_REGISTERED (0x01)
320 #define MPT3_DIAG_BUFFER_IS_RELEASED (0x02)
321 #define MPT3_DIAG_BUFFER_IS_DIAG_RESET (0x04)
322 #define MPT3_DIAG_BUFFER_IS_DRIVER_ALLOCATED (0x08)
323 #define MPT3_DIAG_BUFFER_IS_APP_OWNED (0x10)
328 #define MPT2SAS_HP_3PAR_SSVID 0x1590
344 #define MPT2SAS_HP_2_4_INTERNAL_SSDID 0x0041
345 #define MPT2SAS_HP_2_4_EXTERNAL_SSDID 0x0042
346 #define MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_SSDID 0x0043
347 #define MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_SSDID 0x0044
348 #define MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_SSDID 0x0046
353 * and each register is at offset 0x10 bytes from the previous one.
358 #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_OFFSET (0x10)
362 #define MFG10_OEM_ID_INVALID (0x00000000)
363 #define MFG10_OEM_ID_DELL (0x00000001)
364 #define MFG10_OEM_ID_FSC (0x00000002)
365 #define MFG10_OEM_ID_SUN (0x00000003)
366 #define MFG10_OEM_ID_IBM (0x00000004)
368 /* GENERIC Flags 0*/
369 #define MFG10_GF0_OCE_DISABLED (0x00000001)
370 #define MFG10_GF0_R1E_DRIVE_COUNT (0x00000002)
371 #define MFG10_GF0_R10_DISPLAY (0x00000004)
372 #define MFG10_GF0_SSD_DATA_SCRUB_DISABLE (0x00000008)
373 #define MFG10_GF0_SINGLE_DRIVE_R0 (0x00000010)
375 #define VIRTUAL_IO_FAILED_RETRY (0x32010081)
390 U32 Reserved3; /* 0Ch */
406 u8 Reserved3; /* 0Ah */
407 u8 Reserved4; /* 0Bh */
408 __le32 Reserved5[8]; /* 0Ch-2Ch */
457 #define MPT_DEVICE_FLAGS_INIT 0x01
459 #define MFG_PAGE10_HIDE_SSDS_MASK (0x00000003)
460 #define MFG_PAGE10_HIDE_ALL_DISKS (0x00)
461 #define MFG_PAGE10_EXPOSE_ALL_DISKS (0x01)
462 #define MFG_PAGE10_HIDE_IF_VOL_PRESENT (0x02)
473 * @eedp_type: 0(type_1), 1(type_2), 2(type_3)
501 #define MPT3_CMD_NOT_USED 0x8000 /* free */
502 #define MPT3_CMD_COMPLETE 0x0001 /* completed */
503 #define MPT3_CMD_PENDING 0x0002 /* pending */
504 #define MPT3_CMD_REPLY_VALID 0x0004 /* reply is valid */
505 #define MPT3_CMD_RESET 0x0008 /* host reset dropped the command */
506 #define MPT3_CMD_COMPLETE_ASYNC 0x0010 /* tells whether cmd completes in same thread or not */
544 * @phy: phy identifier provided in sas device page 0
978 /* SAS3.0 support */
1071 #define MPT_VPHY_FLAG_DIRTY_PHY 0x01
1093 #define HBA_PORT_FLAG_DIRTY_PORT 0x01
1094 #define HBA_PORT_FLAG_NEW_PORT 0x02
1096 #define MULTIPATH_DISABLED_PORT_ID 0xFF
1115 /* Bit 0 - Diag Buffer not Released */
1116 #define MPT3_DIAG_BUFFER_NOT_RELEASED (0x00)
1117 /* Bit 0 - Diag Buffer Released */
1118 #define MPT3_DIAG_BUFFER_RELEASED (0x01)
1122 * This bit is valid only if Bit 0 is one
1124 #define MPT3_DIAG_BUFFER_REL_IOCTL (0x02 | MPT3_DIAG_BUFFER_RELEASED)
1128 * This bit is valid only if Bit 0 is one
1130 #define MPT3_DIAG_BUFFER_REL_TRIGGER (0x04 | MPT3_DIAG_BUFFER_RELEASED)
1134 * This bit is valid only if Bit 0 is one
1136 #define MPT3_DIAG_BUFFER_REL_SYSFS (0x08 | MPT3_DIAG_BUFFER_RELEASED)
1139 #define MPT_DIAG_RESET_ISSUED_BY_DRIVER 0x00000000
1140 #define MPT_DIAG_RESET_ISSUED_BY_USER 0x00000001
1231 * @manu_pg0: static manufacturing page 0
1237 * @iounit_pg0: static iounit page 0
1645 #define MPT_DRV_SUPPORT_BITMAP_MEMMOVE 0x00000001
1646 #define MPT_DRV_SUPPORT_BITMAP_ADDNLQUERY 0x00000002
1648 #define MPT_DRV_INTERNAL_FIRST_PE_ISSUED 0x00000001
1661 #define ATTO_SASNVR_VERSION 0
1664 #define ATTO_SASNVR_CKSUM_SEED 0x5A
1747 mpt3sas_base_fault_info(ioc, fault_code); } while (0)
1752 mpt3sas_base_coredump_info(ioc, fault_code); } while (0)
1783 status, mpi_request, sz); } while (0)
2068 return 0; in mpt3sas_scsih_is_pcie_scsi_device()