Lines Matching +full:dw +full:- +full:pcie +full:- +full:ep
6 * Copyright (C) 2012-2014 LSI Corporation
7 * Copyright (C) 2013-2014 Avago Technologies
8 * (mailto: MPT-FusionLinux.pdl@avagotech.com)
23 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
42 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
57 #include <linux/dma-mapping.h>
75 static int max_queue_depth = -1;
79 static int max_sgl_entries = -1;
83 static int msix_disable = -1;
91 static int max_msix_vectors = -1;
96 static int irqpoll_weight = -1;
103 " enable detection of firmware fault and halt firmware - (default=0)");
105 static int perf_mode = -1;
109 "0 - balanced: high iops mode is enabled &\n\t\t"
111 "1 - iops: high iops mode is disabled &\n\t\t"
113 "2 - latency: high iops mode is disabled &\n\t\t"
115 "\t\tdefault - default perf_mode is 'balanced'"
127 MPT_PERF_MODE_DEFAULT = -1,
145 * mpt3sas_base_check_cmd_timeout - Function
173 * _scsih_set_fwfault_debug - global setting of ioc->fwfault_debug.
192 ioc->fwfault_debug = mpt3sas_fwfault_debug; in _scsih_set_fwfault_debug()
200 * _base_readl_aero - retry readl for max three times.
240 * _base_clone_reply_to_sys_mem - copies reply to reply free iomem
256 u16 cmd_credit = ioc->facts.RequestCredit + 1; in _base_clone_reply_to_sys_mem()
257 void __iomem *reply_free_iomem = (void __iomem *)ioc->chip + in _base_clone_reply_to_sys_mem()
259 (cmd_credit * ioc->request_sz) + (index * sizeof(u32)); in _base_clone_reply_to_sys_mem()
265 * _base_clone_mpi_to_sys_mem - Writes/copies MPI frames
284 * _base_clone_to_sys_mem - Writes/copies data to system/BAR0 region
302 * _base_get_chain - Calculates and Returns virtual chain address
316 u16 cmd_credit = ioc->facts.RequestCredit + 1; in _base_get_chain()
318 base_chain = (void __iomem *)ioc->chip + MPI_FRAME_START_OFFSET + in _base_get_chain()
319 (cmd_credit * ioc->request_sz) + in _base_get_chain()
321 chain_virt = base_chain + (smid * ioc->facts.MaxChainDepth * in _base_get_chain()
322 ioc->request_sz) + (sge_chain_count * ioc->request_sz); in _base_get_chain()
327 * _base_get_chain_phys - Calculates and Returns physical address
342 u16 cmd_credit = ioc->facts.RequestCredit + 1; in _base_get_chain_phys()
344 base_chain_phys = ioc->chip_phys + MPI_FRAME_START_OFFSET + in _base_get_chain_phys()
345 (cmd_credit * ioc->request_sz) + in _base_get_chain_phys()
347 chain_phys = base_chain_phys + (smid * ioc->facts.MaxChainDepth * in _base_get_chain_phys()
348 ioc->request_sz) + (sge_chain_count * ioc->request_sz); in _base_get_chain_phys()
353 * _base_get_buffer_bar0 - Calculates and Returns BAR0 mapped Host
366 u16 cmd_credit = ioc->facts.RequestCredit + 1; in _base_get_buffer_bar0()
370 ioc->facts.MaxChainDepth); in _base_get_buffer_bar0()
375 * _base_get_buffer_phys_bar0 - Calculates and Returns BAR0 mapped
387 u16 cmd_credit = ioc->facts.RequestCredit + 1; in _base_get_buffer_phys_bar0()
390 ioc->facts.MaxChainDepth); in _base_get_buffer_phys_bar0()
395 * _base_get_chain_buffer_dma_to_chain_buffer - Iterates chain
412 for (index = 0; index < ioc->scsiio_depth; index++) { in _base_get_chain_buffer_dma_to_chain_buffer()
413 for (j = 0; j < ioc->chains_needed_per_io; j++) { in _base_get_chain_buffer_dma_to_chain_buffer()
414 ct = &ioc->chain_lookup[index].chains_per_smid[j]; in _base_get_chain_buffer_dma_to_chain_buffer()
415 if (ct && ct->chain_buffer_dma == chain_buffer_dma) in _base_get_chain_buffer_dma_to_chain_buffer()
416 return ct->chain_buffer; in _base_get_chain_buffer_dma_to_chain_buffer()
424 * _clone_sg_entries - MPI EP's scsiio and config requests
454 if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST) { in _clone_sg_entries()
457 sgel = (Mpi2SGESimple32_t *) &scsiio_request->SGL; in _clone_sg_entries()
459 } else if (request_hdr->Function == MPI2_FUNCTION_CONFIG) { in _clone_sg_entries()
462 sgel = (Mpi2SGESimple32_t *) &config_req->PageBufferSGE; in _clone_sg_entries()
468 * address associated with sgel->Address. in _clone_sg_entries()
484 * 0 - 255 System register in _clone_sg_entries()
485 * 256 - 4352 MPI Frame. (This is based on maxCredit 32) in _clone_sg_entries()
486 * 4352 - 4864 Reply_free pool (512 byte is reserved in _clone_sg_entries()
490 * 4864 - 17152 SGE chain element. (32cmd * 3 chain of in _clone_sg_entries()
492 * 17152 - x Host buffer mapped with smid. in _clone_sg_entries()
505 if (le32_to_cpu(sgel->FlagsLength) & in _clone_sg_entries()
509 for (i = 0; i < MPT_MIN_PHYS_SEGMENTS + ioc->facts.MaxChainDepth; i++) { in _clone_sg_entries()
512 (le32_to_cpu(sgel->FlagsLength) >> MPI2_SGE_FLAGS_SHIFT); in _clone_sg_entries()
519 * the virtual address for sgel->Address in _clone_sg_entries()
523 le32_to_cpu(sgel->Address)); in _clone_sg_entries()
538 sgel->Address = in _clone_sg_entries()
548 (le32_to_cpu(sgel->FlagsLength) & in _clone_sg_entries()
554 sgel->Address = in _clone_sg_entries()
558 ioc->config_vaddr, in _clone_sg_entries()
559 (le32_to_cpu(sgel->FlagsLength) & in _clone_sg_entries()
561 sgel->Address = in _clone_sg_entries()
565 buff_ptr += (le32_to_cpu(sgel->FlagsLength) & in _clone_sg_entries()
567 buff_ptr_phys += (le32_to_cpu(sgel->FlagsLength) & in _clone_sg_entries()
569 if ((le32_to_cpu(sgel->FlagsLength) & in _clone_sg_entries()
596 src_chain_addr[i], ioc->request_sz); in _clone_sg_entries()
601 * mpt3sas_remove_dead_ioc_func - kthread context to remove dead ioc
606 * -1 for other case.
614 return -1; in mpt3sas_remove_dead_ioc_func()
616 pdev = ioc->pdev; in mpt3sas_remove_dead_ioc_func()
618 return -1; in mpt3sas_remove_dead_ioc_func()
624 * _base_sync_drv_fw_timestamp - Sync Drive-Fw TimeStamp.
638 mutex_lock(&ioc->scsih_cmds.mutex); in _base_sync_drv_fw_timestamp()
639 if (ioc->scsih_cmds.status != MPT3_CMD_NOT_USED) { in _base_sync_drv_fw_timestamp()
643 ioc->scsih_cmds.status = MPT3_CMD_PENDING; in _base_sync_drv_fw_timestamp()
644 smid = mpt3sas_base_get_smid(ioc, ioc->scsih_cb_idx); in _base_sync_drv_fw_timestamp()
647 ioc->scsih_cmds.status = MPT3_CMD_NOT_USED; in _base_sync_drv_fw_timestamp()
651 ioc->scsih_cmds.smid = smid; in _base_sync_drv_fw_timestamp()
653 mpi_request->Function = MPI2_FUNCTION_IO_UNIT_CONTROL; in _base_sync_drv_fw_timestamp()
654 mpi_request->Operation = MPI26_CTRL_OP_SET_IOC_PARAMETER; in _base_sync_drv_fw_timestamp()
655 mpi_request->IOCParameter = MPI26_SET_IOC_PARAMETER_SYNC_TIMESTAMP; in _base_sync_drv_fw_timestamp()
658 mpi_request->Reserved7 = cpu_to_le32(TimeStamp >> 32); in _base_sync_drv_fw_timestamp()
659 mpi_request->IOCParameterValue = cpu_to_le32(TimeStamp & 0xFFFFFFFF); in _base_sync_drv_fw_timestamp()
660 init_completion(&ioc->scsih_cmds.done); in _base_sync_drv_fw_timestamp()
661 ioc->put_smid_default(ioc, smid); in _base_sync_drv_fw_timestamp()
665 wait_for_completion_timeout(&ioc->scsih_cmds.done, in _base_sync_drv_fw_timestamp()
667 if (!(ioc->scsih_cmds.status & MPT3_CMD_COMPLETE)) { in _base_sync_drv_fw_timestamp()
669 ioc->scsih_cmds.status, mpi_request, in _base_sync_drv_fw_timestamp()
673 if (ioc->scsih_cmds.status & MPT3_CMD_REPLY_VALID) { in _base_sync_drv_fw_timestamp()
674 mpi_reply = ioc->scsih_cmds.reply; in _base_sync_drv_fw_timestamp()
677 le16_to_cpu(mpi_reply->IOCStatus), in _base_sync_drv_fw_timestamp()
678 le32_to_cpu(mpi_reply->IOCLogInfo))); in _base_sync_drv_fw_timestamp()
683 ioc->scsih_cmds.status = MPT3_CMD_NOT_USED; in _base_sync_drv_fw_timestamp()
685 mutex_unlock(&ioc->scsih_cmds.mutex); in _base_sync_drv_fw_timestamp()
689 * _base_fault_reset_work - workq handling ioc fault conditions
705 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); in _base_fault_reset_work()
706 if ((ioc->shost_recovery && (ioc->ioc_coredump_loop == 0)) || in _base_fault_reset_work()
707 ioc->pci_error_recovery) in _base_fault_reset_work()
709 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); in _base_fault_reset_work()
713 ioc_err(ioc, "SAS host is non-operational !!!!\n"); in _base_fault_reset_work()
717 * by considering controller is in a non-operational state. So in _base_fault_reset_work()
720 * controller to non-operational state and remove the dead ioc in _base_fault_reset_work()
723 if (ioc->non_operational_loop++ < 5) { in _base_fault_reset_work()
724 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, in _base_fault_reset_work()
737 ioc->schedule_dead_ioc_flush_running_cmds(ioc); in _base_fault_reset_work()
742 ioc->remove_host = 1; in _base_fault_reset_work()
745 "%s_dead_ioc_%d", ioc->driver_name, ioc->id); in _base_fault_reset_work()
756 u8 timeout = (ioc->manu_pg11.CoreDumpTOSec) ? in _base_fault_reset_work()
757 ioc->manu_pg11.CoreDumpTOSec : in _base_fault_reset_work()
762 if (ioc->ioc_coredump_loop == 0) { in _base_fault_reset_work()
767 &ioc->ioc_reset_in_progress_lock, flags); in _base_fault_reset_work()
768 ioc->shost_recovery = 1; in _base_fault_reset_work()
770 &ioc->ioc_reset_in_progress_lock, flags); in _base_fault_reset_work()
777 __func__, ioc->ioc_coredump_loop); in _base_fault_reset_work()
780 if (ioc->ioc_coredump_loop++ < timeout) { in _base_fault_reset_work()
782 &ioc->ioc_reset_in_progress_lock, flags); in _base_fault_reset_work()
787 if (ioc->ioc_coredump_loop) { in _base_fault_reset_work()
790 __func__, ioc->ioc_coredump_loop); in _base_fault_reset_work()
793 __func__, ioc->ioc_coredump_loop); in _base_fault_reset_work()
794 ioc->ioc_coredump_loop = MPT3SAS_COREDUMP_LOOP_DONE; in _base_fault_reset_work()
796 ioc->non_operational_loop = 0; in _base_fault_reset_work()
813 ioc->ioc_coredump_loop = 0; in _base_fault_reset_work()
814 if (ioc->time_sync_interval && in _base_fault_reset_work()
815 ++ioc->timestamp_update_count >= ioc->time_sync_interval) { in _base_fault_reset_work()
816 ioc->timestamp_update_count = 0; in _base_fault_reset_work()
819 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); in _base_fault_reset_work()
821 if (ioc->fault_reset_work_q) in _base_fault_reset_work()
822 queue_delayed_work(ioc->fault_reset_work_q, in _base_fault_reset_work()
823 &ioc->fault_reset_work, in _base_fault_reset_work()
825 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); in _base_fault_reset_work()
829 * mpt3sas_base_start_watchdog - start the fault_reset_work_q
839 if (ioc->fault_reset_work_q) in mpt3sas_base_start_watchdog()
842 ioc->timestamp_update_count = 0; in mpt3sas_base_start_watchdog()
845 INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work); in mpt3sas_base_start_watchdog()
846 snprintf(ioc->fault_reset_work_q_name, in mpt3sas_base_start_watchdog()
847 sizeof(ioc->fault_reset_work_q_name), "poll_%s%d_status", in mpt3sas_base_start_watchdog()
848 ioc->driver_name, ioc->id); in mpt3sas_base_start_watchdog()
849 ioc->fault_reset_work_q = alloc_ordered_workqueue( in mpt3sas_base_start_watchdog()
850 "%s", WQ_MEM_RECLAIM, ioc->fault_reset_work_q_name); in mpt3sas_base_start_watchdog()
851 if (!ioc->fault_reset_work_q) { in mpt3sas_base_start_watchdog()
855 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); in mpt3sas_base_start_watchdog()
856 if (ioc->fault_reset_work_q) in mpt3sas_base_start_watchdog()
857 queue_delayed_work(ioc->fault_reset_work_q, in mpt3sas_base_start_watchdog()
858 &ioc->fault_reset_work, in mpt3sas_base_start_watchdog()
860 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); in mpt3sas_base_start_watchdog()
864 * mpt3sas_base_stop_watchdog - stop the fault_reset_work_q
875 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); in mpt3sas_base_stop_watchdog()
876 wq = ioc->fault_reset_work_q; in mpt3sas_base_stop_watchdog()
877 ioc->fault_reset_work_q = NULL; in mpt3sas_base_stop_watchdog()
878 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); in mpt3sas_base_stop_watchdog()
880 if (!cancel_delayed_work_sync(&ioc->fault_reset_work)) in mpt3sas_base_stop_watchdog()
887 * mpt3sas_base_fault_info - verbose translation of firmware FAULT code
898 * mpt3sas_base_coredump_info - verbose translation of firmware CoreDump state
911 * mpt3sas_base_wait_for_coredump_completion - Wait until coredump
916 * Return: 0 for success, non-zero for failure.
922 u8 timeout = (ioc->manu_pg11.CoreDumpTOSec) ? in mpt3sas_base_wait_for_coredump_completion()
923 ioc->manu_pg11.CoreDumpTOSec : in mpt3sas_base_wait_for_coredump_completion()
942 * mpt3sas_halt_firmware - halt's mpt controller firmware
955 if (!ioc->fwfault_debug) in mpt3sas_halt_firmware()
960 doorbell = ioc->base_readl_ext_retry(&ioc->chip->Doorbell); in mpt3sas_halt_firmware()
969 writel(0xC0FFEE00, &ioc->chip->Doorbell); in mpt3sas_halt_firmware()
973 if (ioc->fwfault_debug == 2) in mpt3sas_halt_firmware()
981 * _base_sas_ioc_info - verbose translation of the ioc status
990 u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & in _base_sas_ioc_info()
997 if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST || in _base_sas_ioc_info()
998 request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH || in _base_sas_ioc_info()
999 request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION) in _base_sas_ioc_info()
1009 if (request_hdr->Function == MPI2_FUNCTION_CONFIG) { in _base_sas_ioc_info()
1012 if ((rqst->ExtPageType == in _base_sas_ioc_info()
1014 !(ioc->logging_level & MPT_DEBUG_CONFIG)) { in _base_sas_ioc_info()
1098 * For use by SCSI Initiator and SCSI Target end-to-end data protection in _base_sas_ioc_info()
1171 switch (request_hdr->Function) { in _base_sas_ioc_info()
1173 frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size; in _base_sas_ioc_info()
1197 frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size; in _base_sas_ioc_info()
1202 ioc->sge_size; in _base_sas_ioc_info()
1207 ioc->sge_size; in _base_sas_ioc_info()
1223 * _base_display_event_data - verbose translation of firmware asyn events
1234 if (!(ioc->logging_level & MPT_DEBUG_EVENTS)) in _base_display_event_data()
1237 event = le16_to_cpu(mpi_reply->Event); in _base_display_event_data()
1256 if (!ioc->hide_ir_msg) in _base_display_event_data()
1262 (Mpi2EventDataSasDiscovery_t *)mpi_reply->EventData; in _base_display_event_data()
1264 event_data->ReasonCode == MPI2_EVENT_SAS_DISC_RC_STARTED ? in _base_display_event_data()
1266 if (event_data->DiscoveryStatus) in _base_display_event_data()
1268 le32_to_cpu(event_data->DiscoveryStatus)); in _base_display_event_data()
1288 if (!ioc->hide_ir_msg) in _base_display_event_data()
1292 if (!ioc->hide_ir_msg) in _base_display_event_data()
1296 if (!ioc->hide_ir_msg) in _base_display_event_data()
1300 if (!ioc->hide_ir_msg) in _base_display_event_data()
1313 desc = "PCIE Device Status Change"; in _base_display_event_data()
1318 (Mpi26EventDataPCIeEnumeration_t *)mpi_reply->EventData; in _base_display_event_data()
1319 ioc_info(ioc, "PCIE Enumeration: (%s)", in _base_display_event_data()
1320 event_data->ReasonCode == MPI26_EVENT_PCIE_ENUM_RC_STARTED ? in _base_display_event_data()
1322 if (event_data->EnumerationStatus) in _base_display_event_data()
1324 le32_to_cpu(event_data->EnumerationStatus)); in _base_display_event_data()
1329 desc = "PCIE Topology Change List"; in _base_display_event_data()
1340 * _base_sas_log_info - verbose translation of firmware log info
1354 } dw; in _base_sas_log_info() member
1360 if (sas_loginfo.dw.bus_type != 3 /*SAS*/) in _base_sas_log_info()
1368 if (ioc->ignore_loginfos && (log_info == 0x30050000 || log_info == in _base_sas_log_info()
1372 switch (sas_loginfo.dw.originator) { in _base_sas_log_info()
1380 if (!ioc->hide_ir_msg) in _base_sas_log_info()
1389 originator_str, sas_loginfo.dw.code, sas_loginfo.dw.subcode); in _base_sas_log_info()
1393 * _base_display_reply_info - handle reply descriptors depending on IOC Status
1413 ioc_status = le16_to_cpu(mpi_reply->IOCStatus); in _base_display_reply_info()
1416 (ioc->logging_level & MPT_DEBUG_REPLY)) { in _base_display_reply_info()
1422 loginfo = le32_to_cpu(mpi_reply->IOCLogInfo); in _base_display_reply_info()
1433 * mpt3sas_base_done - base internal command completion routine
1450 if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK) in mpt3sas_base_done()
1453 if (ioc->base_cmds.status == MPT3_CMD_NOT_USED) in mpt3sas_base_done()
1456 ioc->base_cmds.status |= MPT3_CMD_COMPLETE; in mpt3sas_base_done()
1458 ioc->base_cmds.status |= MPT3_CMD_REPLY_VALID; in mpt3sas_base_done()
1459 memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4); in mpt3sas_base_done()
1461 ioc->base_cmds.status &= ~MPT3_CMD_PENDING; in mpt3sas_base_done()
1463 complete(&ioc->base_cmds.done); in mpt3sas_base_done()
1468 * _base_async_event - main callback handler for firmware asyn events
1488 if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION) in _base_async_event()
1493 if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED)) in _base_async_event()
1495 smid = mpt3sas_base_get_smid(ioc, ioc->base_cb_idx); in _base_async_event()
1501 INIT_LIST_HEAD(&delayed_event_ack->list); in _base_async_event()
1502 delayed_event_ack->Event = mpi_reply->Event; in _base_async_event()
1503 delayed_event_ack->EventContext = mpi_reply->EventContext; in _base_async_event()
1504 list_add_tail(&delayed_event_ack->list, in _base_async_event()
1505 &ioc->delayed_event_ack_list); in _base_async_event()
1508 le16_to_cpu(mpi_reply->Event))); in _base_async_event()
1514 ack_request->Function = MPI2_FUNCTION_EVENT_ACK; in _base_async_event()
1515 ack_request->Event = mpi_reply->Event; in _base_async_event()
1516 ack_request->EventContext = mpi_reply->EventContext; in _base_async_event()
1517 ack_request->VF_ID = 0; /* TODO */ in _base_async_event()
1518 ack_request->VP_ID = 0; in _base_async_event()
1519 ioc->put_smid_default(ioc, smid); in _base_async_event()
1538 WARN_ON(smid >= ioc->hi_priority_smid)) in _get_st_from_smid()
1549 * _base_get_cb_idx - obtain the callback index
1559 u16 ctl_smid = ioc->scsiio_depth - INTERNAL_SCSIIO_CMDS_COUNT + 1; in _base_get_cb_idx()
1562 if (smid < ioc->hi_priority_smid) { in _base_get_cb_idx()
1568 cb_idx = st->cb_idx; in _base_get_cb_idx()
1570 cb_idx = ioc->ctl_cb_idx; in _base_get_cb_idx()
1571 } else if (smid < ioc->internal_smid) { in _base_get_cb_idx()
1572 i = smid - ioc->hi_priority_smid; in _base_get_cb_idx()
1573 cb_idx = ioc->hpr_lookup[i].cb_idx; in _base_get_cb_idx()
1574 } else if (smid <= ioc->hba_queue_depth) { in _base_get_cb_idx()
1575 i = smid - ioc->internal_smid; in _base_get_cb_idx()
1576 cb_idx = ioc->internal_lookup[i].cb_idx; in _base_get_cb_idx()
1582 * mpt3sas_base_pause_mq_polling - pause polling on the mq poll queues
1596 ioc->reply_queue_count - ioc->iopoll_q_start_index; in mpt3sas_base_pause_mq_polling()
1600 atomic_set(&ioc->io_uring_poll_queues[qid].pause, 1); in mpt3sas_base_pause_mq_polling()
1606 while (atomic_read(&ioc->io_uring_poll_queues[qid].busy)) { in mpt3sas_base_pause_mq_polling()
1614 * mpt3sas_base_resume_mq_polling - Resume polling on mq poll queues.
1623 ioc->reply_queue_count - ioc->iopoll_q_start_index; in mpt3sas_base_resume_mq_polling()
1627 atomic_set(&ioc->io_uring_poll_queues[qid].pause, 0); in mpt3sas_base_resume_mq_polling()
1631 * mpt3sas_base_mask_interrupts - disable interrupts
1641 ioc->mask_interrupts = 1; in mpt3sas_base_mask_interrupts()
1642 him_register = ioc->base_readl(&ioc->chip->HostInterruptMask); in mpt3sas_base_mask_interrupts()
1644 writel(him_register, &ioc->chip->HostInterruptMask); in mpt3sas_base_mask_interrupts()
1645 ioc->base_readl(&ioc->chip->HostInterruptMask); in mpt3sas_base_mask_interrupts()
1649 * mpt3sas_base_unmask_interrupts - enable interrupts
1659 him_register = ioc->base_readl(&ioc->chip->HostInterruptMask); in mpt3sas_base_unmask_interrupts()
1661 writel(him_register, &ioc->chip->HostInterruptMask); in mpt3sas_base_unmask_interrupts()
1662 ioc->mask_interrupts = 0; in mpt3sas_base_unmask_interrupts()
1684 * _base_process_reply_queue - Process reply descriptors from reply
1700 u8 msix_index = reply_q->msix_index; in _base_process_reply_queue()
1701 struct MPT3SAS_ADAPTER *ioc = reply_q->ioc; in _base_process_reply_queue()
1706 if (!atomic_add_unless(&reply_q->busy, 1, 1)) in _base_process_reply_queue()
1709 rpf = &reply_q->reply_post_free[reply_q->reply_post_host_index]; in _base_process_reply_queue()
1710 request_descript_type = rpf->Default.ReplyFlags in _base_process_reply_queue()
1713 atomic_dec(&reply_q->busy); in _base_process_reply_queue()
1719 rd.word = le64_to_cpu(rpf->Words); in _base_process_reply_queue()
1723 smid = le16_to_cpu(rpf->Default.DescriptorTypeDependent1); in _base_process_reply_queue()
1741 rpf->AddressReply.ReplyFrameAddress); in _base_process_reply_queue()
1742 if (reply > ioc->reply_dma_max_address || in _base_process_reply_queue()
1743 reply < ioc->reply_dma_min_address) in _base_process_reply_queue()
1764 ioc->reply_free_host_index = in _base_process_reply_queue()
1765 (ioc->reply_free_host_index == in _base_process_reply_queue()
1766 (ioc->reply_free_queue_depth - 1)) ? in _base_process_reply_queue()
1767 0 : ioc->reply_free_host_index + 1; in _base_process_reply_queue()
1768 ioc->reply_free[ioc->reply_free_host_index] = in _base_process_reply_queue()
1770 if (ioc->is_mcpu_endpoint) in _base_process_reply_queue()
1773 ioc->reply_free_host_index); in _base_process_reply_queue()
1774 writel(ioc->reply_free_host_index, in _base_process_reply_queue()
1775 &ioc->chip->ReplyFreeHostIndex); in _base_process_reply_queue()
1779 rpf->Words = cpu_to_le64(ULLONG_MAX); in _base_process_reply_queue()
1780 reply_q->reply_post_host_index = in _base_process_reply_queue()
1781 (reply_q->reply_post_host_index == in _base_process_reply_queue()
1782 (ioc->reply_post_queue_depth - 1)) ? 0 : in _base_process_reply_queue()
1783 reply_q->reply_post_host_index + 1; in _base_process_reply_queue()
1785 reply_q->reply_post_free[reply_q->reply_post_host_index]. in _base_process_reply_queue()
1793 if (completed_cmds >= ioc->thresh_hold) { in _base_process_reply_queue()
1794 if (ioc->combined_reply_queue) { in _base_process_reply_queue()
1795 writel(reply_q->reply_post_host_index | in _base_process_reply_queue()
1798 ioc->replyPostRegisterIndex[msix_index/8]); in _base_process_reply_queue()
1800 writel(reply_q->reply_post_host_index | in _base_process_reply_queue()
1803 &ioc->chip->ReplyPostHostIndex); in _base_process_reply_queue()
1805 if (!reply_q->is_iouring_poll_q && in _base_process_reply_queue()
1806 !reply_q->irq_poll_scheduled) { in _base_process_reply_queue()
1807 reply_q->irq_poll_scheduled = true; in _base_process_reply_queue()
1808 irq_poll_sched(&reply_q->irqpoll); in _base_process_reply_queue()
1810 atomic_dec(&reply_q->busy); in _base_process_reply_queue()
1815 if (!reply_q->reply_post_host_index) in _base_process_reply_queue()
1816 rpf = reply_q->reply_post_free; in _base_process_reply_queue()
1824 atomic_dec(&reply_q->busy); in _base_process_reply_queue()
1828 if (ioc->is_warpdrive) { in _base_process_reply_queue()
1829 writel(reply_q->reply_post_host_index, in _base_process_reply_queue()
1830 ioc->reply_post_host_index[msix_index]); in _base_process_reply_queue()
1831 atomic_dec(&reply_q->busy); in _base_process_reply_queue()
1844 * Host Index Register supports 8 MSI-X vectors. in _base_process_reply_queue()
1850 if (ioc->combined_reply_queue) in _base_process_reply_queue()
1851 writel(reply_q->reply_post_host_index | ((msix_index & 7) << in _base_process_reply_queue()
1853 ioc->replyPostRegisterIndex[msix_index/8]); in _base_process_reply_queue()
1855 writel(reply_q->reply_post_host_index | (msix_index << in _base_process_reply_queue()
1857 &ioc->chip->ReplyPostHostIndex); in _base_process_reply_queue()
1858 atomic_dec(&reply_q->busy); in _base_process_reply_queue()
1863 * mpt3sas_blk_mq_poll - poll the blk mq poll queue
1872 (struct MPT3SAS_ADAPTER *)shost->hostdata; in mpt3sas_blk_mq_poll()
1875 int qid = queue_num - ioc->iopoll_q_start_index; in mpt3sas_blk_mq_poll()
1877 if (atomic_read(&ioc->io_uring_poll_queues[qid].pause) || in mpt3sas_blk_mq_poll()
1878 !atomic_add_unless(&ioc->io_uring_poll_queues[qid].busy, 1, 1)) in mpt3sas_blk_mq_poll()
1881 reply_q = ioc->io_uring_poll_queues[qid].reply_q; in mpt3sas_blk_mq_poll()
1884 atomic_dec(&ioc->io_uring_poll_queues[qid].busy); in mpt3sas_blk_mq_poll()
1890 * _base_interrupt - MPT adapter (IOC) specific interrupt handler.
1900 struct MPT3SAS_ADAPTER *ioc = reply_q->ioc; in _base_interrupt()
1902 if (ioc->mask_interrupts) in _base_interrupt()
1904 if (reply_q->irq_poll_scheduled) in _base_interrupt()
1911 * _base_irqpoll - IRQ poll callback handler
1925 if (reply_q->irq_line_enable) { in _base_irqpoll()
1926 disable_irq_nosync(reply_q->os_irq); in _base_irqpoll()
1927 reply_q->irq_line_enable = false; in _base_irqpoll()
1932 reply_q->irq_poll_scheduled = false; in _base_irqpoll()
1933 reply_q->irq_line_enable = true; in _base_irqpoll()
1934 enable_irq(reply_q->os_irq); in _base_irqpoll()
1948 * _base_init_irqpolls - initliaze IRQ polls
1958 if (list_empty(&ioc->reply_queue_list)) in _base_init_irqpolls()
1961 list_for_each_entry_safe(reply_q, next, &ioc->reply_queue_list, list) { in _base_init_irqpolls()
1962 if (reply_q->is_iouring_poll_q) in _base_init_irqpolls()
1964 irq_poll_init(&reply_q->irqpoll, in _base_init_irqpolls()
1965 ioc->hba_queue_depth/4, _base_irqpoll); in _base_init_irqpolls()
1966 reply_q->irq_poll_scheduled = false; in _base_init_irqpolls()
1967 reply_q->irq_line_enable = true; in _base_init_irqpolls()
1968 reply_q->os_irq = pci_irq_vector(ioc->pdev, in _base_init_irqpolls()
1969 reply_q->msix_index); in _base_init_irqpolls()
1974 * _base_is_controller_msix_enabled - is controller support muli-reply queues
1982 return (ioc->facts.IOCCapabilities & in _base_is_controller_msix_enabled()
1983 MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX) && ioc->msix_enable; in _base_is_controller_msix_enabled()
1987 * mpt3sas_base_sync_reply_irqs - flush pending MSIX interrupts
1990 * timed-out SCSI command got delayed
1991 * Context: non-ISR context
2001 * then multi-queues are not enabled in mpt3sas_base_sync_reply_irqs()
2006 list_for_each_entry(reply_q, &ioc->reply_queue_list, list) { in mpt3sas_base_sync_reply_irqs()
2007 if (ioc->shost_recovery || ioc->remove_host || in mpt3sas_base_sync_reply_irqs()
2008 ioc->pci_error_recovery) in mpt3sas_base_sync_reply_irqs()
2011 if (reply_q->msix_index == 0) in mpt3sas_base_sync_reply_irqs()
2014 if (reply_q->is_iouring_poll_q) { in mpt3sas_base_sync_reply_irqs()
2019 synchronize_irq(pci_irq_vector(ioc->pdev, reply_q->msix_index)); in mpt3sas_base_sync_reply_irqs()
2020 if (reply_q->irq_poll_scheduled) { in mpt3sas_base_sync_reply_irqs()
2024 irq_poll_disable(&reply_q->irqpoll); in mpt3sas_base_sync_reply_irqs()
2025 irq_poll_enable(&reply_q->irqpoll); in mpt3sas_base_sync_reply_irqs()
2029 if (reply_q->irq_poll_scheduled) { in mpt3sas_base_sync_reply_irqs()
2030 reply_q->irq_poll_scheduled = false; in mpt3sas_base_sync_reply_irqs()
2031 reply_q->irq_line_enable = true; in mpt3sas_base_sync_reply_irqs()
2032 enable_irq(reply_q->os_irq); in mpt3sas_base_sync_reply_irqs()
2042 * mpt3sas_base_release_callback_handler - clear interrupt callback handler
2052 * mpt3sas_base_register_callback_handler - obtain index for the interrupt callback handler
2062 for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--) in mpt3sas_base_register_callback_handler()
2071 * mpt3sas_base_initialize_callback_handler - initialize the interrupt callback handler
2084 * _base_build_zero_len_sge - build zero length sg entry
2099 ioc->base_add_sg_single(paddr, flags_length, -1); in _base_build_zero_len_sge()
2103 * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr.
2115 sgel->FlagsLength = cpu_to_le32(flags_length); in _base_add_sg_single_32()
2116 sgel->Address = cpu_to_le32(dma_addr); in _base_add_sg_single_32()
2121 * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr.
2133 sgel->FlagsLength = cpu_to_le32(flags_length); in _base_add_sg_single_64()
2134 sgel->Address = cpu_to_le64(dma_addr); in _base_add_sg_single_64()
2138 * _base_get_chain_buffer_tracker - obtain chain tracker
2151 u16 smid = st->smid; in _base_get_chain_buffer_tracker()
2153 atomic_read(&ioc->chain_lookup[smid - 1].chain_offset); in _base_get_chain_buffer_tracker()
2155 if (chain_offset == ioc->chains_needed_per_io) in _base_get_chain_buffer_tracker()
2158 chain_req = &ioc->chain_lookup[smid - 1].chains_per_smid[chain_offset]; in _base_get_chain_buffer_tracker()
2159 atomic_inc(&ioc->chain_lookup[smid - 1].chain_offset); in _base_get_chain_buffer_tracker()
2165 * _base_build_sg - build generic sg
2190 ioc->base_add_sg_single(psge, sgl_flags | in _base_build_sg()
2194 psge += ioc->sge_size; in _base_build_sg()
2201 ioc->base_add_sg_single(psge, sgl_flags | in _base_build_sg()
2208 ioc->base_add_sg_single(psge, sgl_flags | in _base_build_sg()
2215 ioc->base_add_sg_single(psge, sgl_flags | in _base_build_sg()
2223 * _base_build_nvme_prp - This function is called for NVMe end devices to build
2247 * non-contiguous SGL into a PRP in this case. All PRPs will describe
2259 * Each 64-bit PRP entry comprises an address and an offset field. The address
2262 * first element in a PRP list may contain a non-zero offset, implying that all
2267 * by the list begins at a non-zero offset within the first 4KB page, then the
2268 * first PRP element will contain a non-zero offset indicating where the region
2291 (void *)nvme_encap_request->NVMe_Command; in _base_build_nvme_prp()
2299 prp1_entry = &nvme_cmd->prp1; in _base_build_nvme_prp()
2300 prp2_entry = &nvme_cmd->prp2; in _base_build_nvme_prp()
2313 page_mask = ioc->page_size - 1; in _base_build_nvme_prp()
2340 * page boundary - prp_size (8 bytes). in _base_build_nvme_prp()
2347 * - bump the current memory pointer to the next in _base_build_nvme_prp()
2349 * - set the PRP Entry to point to that page. This in _base_build_nvme_prp()
2351 * - bump the PRP Entry pointer the start of the in _base_build_nvme_prp()
2353 * contiguous, no need to get a new page - it's in _base_build_nvme_prp()
2363 entry_len = ioc->page_size - offset; in _base_build_nvme_prp()
2383 if (length > ioc->page_size) { in _base_build_nvme_prp()
2427 length -= entry_len; in _base_build_nvme_prp()
2432 * base_make_prp_nvme - Prepare PRPs (Physical Region Page) -
2436 * @scmd: SCSI command from the mid-layer
2460 nvme_pg_size = max_t(u32, ioc->page_size, NVME_PRP_PAGE_SIZE); in base_make_prp_nvme()
2471 * of the PRP entries are built in the contiguous pcie buffer. in base_make_prp_nvme()
2473 page_mask = nvme_pg_size - 1; in base_make_prp_nvme()
2485 main_chain_element = (pMpi25IeeeSgeChain64_t)&mpi_request->SGL; in base_make_prp_nvme()
2502 main_chain_element->Address = cpu_to_le64(msg_dma); in base_make_prp_nvme()
2503 main_chain_element->NextChainOffset = 0; in base_make_prp_nvme()
2504 main_chain_element->Flags = MPI2_IEEE_SGE_FLAGS_CHAIN_ELEMENT | in base_make_prp_nvme()
2509 ptr_first_sgl = (pMpi25IeeeSgeChain64_t)&mpi_request->SGL; in base_make_prp_nvme()
2515 first_prp_len = nvme_pg_size - offset; in base_make_prp_nvme()
2517 ptr_first_sgl->Address = cpu_to_le64(sge_addr); in base_make_prp_nvme()
2518 ptr_first_sgl->Length = cpu_to_le32(first_prp_len); in base_make_prp_nvme()
2520 data_len -= first_prp_len; in base_make_prp_nvme()
2524 sge_len -= first_prp_len; in base_make_prp_nvme()
2552 sge_len -= nvme_pg_size; in base_make_prp_nvme()
2553 data_len -= nvme_pg_size; in base_make_prp_nvme()
2566 main_chain_element->Length = in base_make_prp_nvme()
2580 (mpt3sas_scsih_is_pcie_scsi_device(pcie_device->device_info))) { in base_is_prp_possible()
2595 * _base_check_pcie_native_sgl - This function is called for PCIe end devices to
2598 * PCIe SGL creation. If the driver will not build a native SGL, return
2605 * @pcie_device: points to the PCIe device's info
2641 * _base_add_sg_single_ieee - add sg element for IEEE format
2654 sgel->Flags = flags; in _base_add_sg_single_ieee()
2655 sgel->NextChainOffset = chain_offset; in _base_add_sg_single_ieee()
2656 sgel->Length = cpu_to_le32(length); in _base_add_sg_single_ieee()
2657 sgel->Address = cpu_to_le64(dma_addr); in _base_add_sg_single_ieee()
2661 * _base_build_zero_len_sge_ieee - build zero length sg entry for IEEE format
2676 _base_add_sg_single_ieee(paddr, sgl_flags, 0, 0, -1); in _base_build_zero_len_sge_ieee()
2682 * Some firmware versions byte-swap the REPORT ZONES command reply from in _base_scsi_dma_map()
2683 * ATA-ZAC devices by directly accessing in the host buffer. This does in _base_scsi_dma_map()
2687 * mapping bi-directional. in _base_scsi_dma_map()
2689 if (cmd->cmnd[0] == ZBC_IN && cmd->cmnd[1] == ZI_REPORT_ZONES) in _base_scsi_dma_map()
2690 cmd->sc_data_direction = DMA_BIDIRECTIONAL; in _base_scsi_dma_map()
2696 * _base_build_sg_scmd - main sg creation routine
2731 if (scmd->sc_data_direction == DMA_TO_DEVICE) in _base_build_sg_scmd()
2743 return -ENOMEM; in _base_build_sg_scmd()
2745 sg_local = &mpi_request->SGL; in _base_build_sg_scmd()
2746 sges_in_segment = ioc->max_sges_in_main_message; in _base_build_sg_scmd()
2750 mpi_request->ChainOffset = (offsetof(Mpi2SCSIIORequest_t, SGL) + in _base_build_sg_scmd()
2751 (sges_in_segment * ioc->sge_size))/4; in _base_build_sg_scmd()
2756 ioc->base_add_sg_single(sg_local, in _base_build_sg_scmd()
2760 ioc->base_add_sg_single(sg_local, sgl_flags | in _base_build_sg_scmd()
2763 sg_local += ioc->sge_size; in _base_build_sg_scmd()
2764 sges_left--; in _base_build_sg_scmd()
2765 sges_in_segment--; in _base_build_sg_scmd()
2772 return -1; in _base_build_sg_scmd()
2773 chain = chain_req->chain_buffer; in _base_build_sg_scmd()
2774 chain_dma = chain_req->chain_buffer_dma; in _base_build_sg_scmd()
2777 ioc->max_sges_in_chain_message) ? sges_left : in _base_build_sg_scmd()
2778 ioc->max_sges_in_chain_message; in _base_build_sg_scmd()
2780 0 : (sges_in_segment * ioc->sge_size)/4; in _base_build_sg_scmd()
2781 chain_length = sges_in_segment * ioc->sge_size; in _base_build_sg_scmd()
2785 chain_length += ioc->sge_size; in _base_build_sg_scmd()
2787 ioc->base_add_sg_single(sg_local, chain_flags | chain_offset | in _base_build_sg_scmd()
2796 ioc->base_add_sg_single(sg_local, in _base_build_sg_scmd()
2801 ioc->base_add_sg_single(sg_local, sgl_flags | in _base_build_sg_scmd()
2805 sg_local += ioc->sge_size; in _base_build_sg_scmd()
2806 sges_left--; in _base_build_sg_scmd()
2807 sges_in_segment--; in _base_build_sg_scmd()
2812 return -1; in _base_build_sg_scmd()
2813 chain = chain_req->chain_buffer; in _base_build_sg_scmd()
2814 chain_dma = chain_req->chain_buffer_dma; in _base_build_sg_scmd()
2823 ioc->base_add_sg_single(sg_local, sgl_flags_end_buffer | in _base_build_sg_scmd()
2826 ioc->base_add_sg_single(sg_local, sgl_flags | in _base_build_sg_scmd()
2829 sg_local += ioc->sge_size; in _base_build_sg_scmd()
2830 sges_left--; in _base_build_sg_scmd()
2837 * _base_build_sg_scmd_ieee - main sg creation routine for IEEE format
2841 * @pcie_device: Pointer to pcie_device. If set, the pcie native sgl will be
2887 return -ENOMEM; in _base_build_sg_scmd_ieee()
2889 sg_local = &mpi_request->SGL; in _base_build_sg_scmd_ieee()
2890 sges_in_segment = (ioc->request_sz - in _base_build_sg_scmd_ieee()
2891 offsetof(Mpi25SCSIIORequest_t, SGL))/ioc->sge_size_ieee; in _base_build_sg_scmd_ieee()
2895 mpi_request->ChainOffset = (sges_in_segment - 1 /* chain element */) + in _base_build_sg_scmd_ieee()
2896 (offsetof(Mpi25SCSIIORequest_t, SGL)/ioc->sge_size_ieee); in _base_build_sg_scmd_ieee()
2903 sg_local += ioc->sge_size_ieee; in _base_build_sg_scmd_ieee()
2904 sges_left--; in _base_build_sg_scmd_ieee()
2905 sges_in_segment--; in _base_build_sg_scmd_ieee()
2911 return -1; in _base_build_sg_scmd_ieee()
2912 chain = chain_req->chain_buffer; in _base_build_sg_scmd_ieee()
2913 chain_dma = chain_req->chain_buffer_dma; in _base_build_sg_scmd_ieee()
2916 ioc->max_sges_in_chain_message) ? sges_left : in _base_build_sg_scmd_ieee()
2917 ioc->max_sges_in_chain_message; in _base_build_sg_scmd_ieee()
2920 chain_length = sges_in_segment * ioc->sge_size_ieee; in _base_build_sg_scmd_ieee()
2922 chain_length += ioc->sge_size_ieee; in _base_build_sg_scmd_ieee()
2935 sg_local += ioc->sge_size_ieee; in _base_build_sg_scmd_ieee()
2936 sges_left--; in _base_build_sg_scmd_ieee()
2937 sges_in_segment--; in _base_build_sg_scmd_ieee()
2942 return -1; in _base_build_sg_scmd_ieee()
2943 chain = chain_req->chain_buffer; in _base_build_sg_scmd_ieee()
2944 chain_dma = chain_req->chain_buffer_dma; in _base_build_sg_scmd_ieee()
2960 sg_local += ioc->sge_size_ieee; in _base_build_sg_scmd_ieee()
2961 sges_left--; in _base_build_sg_scmd_ieee()
2968 * _base_build_sg_ieee - build generic sg for IEEE format
2996 psge += ioc->sge_size_ieee; in _base_build_sg_ieee()
3017 #define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10))
3020 * _base_config_dma_addressing - set dma addressing
3024 * Return: 0 for success, non-zero for failure.
3032 if (ioc->is_mcpu_endpoint || sizeof(dma_addr_t) == 4) { in _base_config_dma_addressing()
3033 ioc->dma_mask = 32; in _base_config_dma_addressing()
3036 } else if (ioc->hba_mpi_version_belonged > MPI2_VERSION) { in _base_config_dma_addressing()
3037 ioc->dma_mask = 63; in _base_config_dma_addressing()
3040 ioc->dma_mask = 64; in _base_config_dma_addressing()
3044 if (ioc->use_32bit_dma) in _base_config_dma_addressing()
3047 if (dma_set_mask(&pdev->dev, dma_mask) || in _base_config_dma_addressing()
3048 dma_set_coherent_mask(&pdev->dev, coherent_dma_mask)) in _base_config_dma_addressing()
3049 return -ENODEV; in _base_config_dma_addressing()
3051 if (ioc->dma_mask > 32) { in _base_config_dma_addressing()
3052 ioc->base_add_sg_single = &_base_add_sg_single_64; in _base_config_dma_addressing()
3053 ioc->sge_size = sizeof(Mpi2SGESimple64_t); in _base_config_dma_addressing()
3055 ioc->base_add_sg_single = &_base_add_sg_single_32; in _base_config_dma_addressing()
3056 ioc->sge_size = sizeof(Mpi2SGESimple32_t); in _base_config_dma_addressing()
3061 ioc->dma_mask, convert_to_kb(s.totalram)); in _base_config_dma_addressing()
3067 * _base_check_enable_msix - checks MSIX capabable.
3080 * if it is SAS2008 B0 controller use IO-APIC instead of MSIX in _base_check_enable_msix()
3082 if (ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008 && in _base_check_enable_msix()
3083 ioc->pdev->revision == SAS2_PCI_DEVICE_B0_REVISION) { in _base_check_enable_msix()
3084 return -EINVAL; in _base_check_enable_msix()
3087 base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX); in _base_check_enable_msix()
3090 return -EINVAL; in _base_check_enable_msix()
3095 if (ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2004 || in _base_check_enable_msix()
3096 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008 || in _base_check_enable_msix()
3097 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_1 || in _base_check_enable_msix()
3098 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_2 || in _base_check_enable_msix()
3099 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_3 || in _base_check_enable_msix()
3100 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_1 || in _base_check_enable_msix()
3101 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_2) in _base_check_enable_msix()
3102 ioc->msix_vector_count = 1; in _base_check_enable_msix()
3104 pci_read_config_word(ioc->pdev, base + 2, &message_control); in _base_check_enable_msix()
3105 ioc->msix_vector_count = (message_control & 0x3FF) + 1; in _base_check_enable_msix()
3108 ioc->msix_vector_count)); in _base_check_enable_msix()
3113 * mpt3sas_base_free_irq - free irq
3124 if (list_empty(&ioc->reply_queue_list)) in mpt3sas_base_free_irq()
3127 list_for_each_entry_safe(reply_q, next, &ioc->reply_queue_list, list) { in mpt3sas_base_free_irq()
3128 list_del(&reply_q->list); in mpt3sas_base_free_irq()
3129 if (reply_q->is_iouring_poll_q) { in mpt3sas_base_free_irq()
3134 if (ioc->smp_affinity_enable) { in mpt3sas_base_free_irq()
3135 irq = pci_irq_vector(ioc->pdev, reply_q->msix_index); in mpt3sas_base_free_irq()
3138 free_irq(pci_irq_vector(ioc->pdev, reply_q->msix_index), in mpt3sas_base_free_irq()
3145 * _base_request_irq - request irq
3154 struct pci_dev *pdev = ioc->pdev; in _base_request_irq()
3162 return -ENOMEM; in _base_request_irq()
3164 reply_q->ioc = ioc; in _base_request_irq()
3165 reply_q->msix_index = index; in _base_request_irq()
3167 atomic_set(&reply_q->busy, 0); in _base_request_irq()
3169 if (index >= ioc->iopoll_q_start_index) { in _base_request_irq()
3170 qid = index - ioc->iopoll_q_start_index; in _base_request_irq()
3171 snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d-mq-poll%d", in _base_request_irq()
3172 ioc->driver_name, ioc->id, qid); in _base_request_irq()
3173 reply_q->is_iouring_poll_q = 1; in _base_request_irq()
3174 ioc->io_uring_poll_queues[qid].reply_q = reply_q; in _base_request_irq()
3179 if (ioc->msix_enable) in _base_request_irq()
3180 snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d-msix%d", in _base_request_irq()
3181 ioc->driver_name, ioc->id, index); in _base_request_irq()
3183 snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d", in _base_request_irq()
3184 ioc->driver_name, ioc->id); in _base_request_irq()
3186 IRQF_SHARED, reply_q->name, reply_q); in _base_request_irq()
3189 reply_q->name, pci_irq_vector(pdev, index)); in _base_request_irq()
3191 return -EBUSY; in _base_request_irq()
3194 INIT_LIST_HEAD(&reply_q->list); in _base_request_irq()
3195 list_add_tail(&reply_q->list, &ioc->reply_queue_list); in _base_request_irq()
3200 * _base_assign_reply_queues - assigning msix index for each cpu
3210 int iopoll_q_count = ioc->reply_queue_count - in _base_assign_reply_queues()
3211 ioc->iopoll_q_start_index; in _base_assign_reply_queues()
3217 if (ioc->msix_load_balance) in _base_assign_reply_queues()
3220 memset(ioc->cpu_msix_table, 0, ioc->cpu_msix_table_sz); in _base_assign_reply_queues()
3223 nr_msix = ioc->reply_queue_count = min(ioc->reply_queue_count, in _base_assign_reply_queues()
3224 ioc->facts.MaxMSIxVectors); in _base_assign_reply_queues()
3228 if (ioc->smp_affinity_enable) { in _base_assign_reply_queues()
3234 if (ioc->high_iops_queues) { in _base_assign_reply_queues()
3235 mask = cpumask_of_node(dev_to_node(&ioc->pdev->dev)); in _base_assign_reply_queues()
3236 for (index = 0; index < ioc->high_iops_queues; in _base_assign_reply_queues()
3238 irq = pci_irq_vector(ioc->pdev, index); in _base_assign_reply_queues()
3243 list_for_each_entry(reply_q, &ioc->reply_queue_list, list) { in _base_assign_reply_queues()
3246 if (reply_q->msix_index < ioc->high_iops_queues || in _base_assign_reply_queues()
3247 reply_q->msix_index >= ioc->iopoll_q_start_index) in _base_assign_reply_queues()
3250 mask = pci_irq_get_affinity(ioc->pdev, in _base_assign_reply_queues()
3251 reply_q->msix_index); in _base_assign_reply_queues()
3254 reply_q->msix_index); in _base_assign_reply_queues()
3259 if (cpu >= ioc->cpu_msix_table_sz) in _base_assign_reply_queues()
3261 ioc->cpu_msix_table[cpu] = reply_q->msix_index; in _base_assign_reply_queues()
3269 nr_msix -= (ioc->high_iops_queues - iopoll_q_count); in _base_assign_reply_queues()
3272 list_for_each_entry(reply_q, &ioc->reply_queue_list, list) { in _base_assign_reply_queues()
3275 if (reply_q->msix_index < ioc->high_iops_queues || in _base_assign_reply_queues()
3276 reply_q->msix_index >= ioc->iopoll_q_start_index) in _base_assign_reply_queues()
3286 ioc->cpu_msix_table[cpu] = reply_q->msix_index; in _base_assign_reply_queues()
3294 * _base_check_and_enable_high_iops_queues - enable high iops mode
3299 * - HBA is a SEA/AERO controller and
3300 * - MSI-Xs vector supported by the HBA is 128 and
3301 * - total CPU count in the system >=16 and
3302 * - loaded driver with default max_msix_vectors module parameter and
3303 * - system booted in non kdump mode
3318 ioc->io_uring_poll_queues) { in _base_check_and_enable_high_iops_queues()
3319 ioc->high_iops_queues = 0; in _base_check_and_enable_high_iops_queues()
3325 pcie_capability_read_word(ioc->pdev, PCI_EXP_LNKSTA, &lnksta); in _base_check_and_enable_high_iops_queues()
3329 ioc->high_iops_queues = 0; in _base_check_and_enable_high_iops_queues()
3334 if (!reset_devices && ioc->is_aero_ioc && in _base_check_and_enable_high_iops_queues()
3337 max_msix_vectors == -1) in _base_check_and_enable_high_iops_queues()
3338 ioc->high_iops_queues = MPT3SAS_HIGH_IOPS_REPLY_QUEUES; in _base_check_and_enable_high_iops_queues()
3340 ioc->high_iops_queues = 0; in _base_check_and_enable_high_iops_queues()
3344 * mpt3sas_base_disable_msix - disables msix
3351 if (!ioc->msix_enable) in mpt3sas_base_disable_msix()
3353 pci_free_irq_vectors(ioc->pdev); in mpt3sas_base_disable_msix()
3354 ioc->msix_enable = 0; in mpt3sas_base_disable_msix()
3355 kfree(ioc->io_uring_poll_queues); in mpt3sas_base_disable_msix()
3359 * _base_alloc_irq_vectors - allocate msix vectors
3367 struct irq_affinity desc = { .pre_vectors = ioc->high_iops_queues }; in _base_alloc_irq_vectors()
3373 int nr_msix_vectors = ioc->iopoll_q_start_index; in _base_alloc_irq_vectors()
3376 if (ioc->smp_affinity_enable) in _base_alloc_irq_vectors()
3381 ioc_info(ioc, " %d %d %d\n", ioc->high_iops_queues, in _base_alloc_irq_vectors()
3382 ioc->reply_queue_count, nr_msix_vectors); in _base_alloc_irq_vectors()
3384 i = pci_alloc_irq_vectors_affinity(ioc->pdev, in _base_alloc_irq_vectors()
3385 ioc->high_iops_queues, in _base_alloc_irq_vectors()
3392 * _base_enable_msix - enables msix, failback to io_apic
3404 ioc->msix_load_balance = false; in _base_enable_msix()
3406 if (msix_disable == -1 || msix_disable == 0) in _base_enable_msix()
3415 ioc_info(ioc, "MSI-X vectors supported: %d\n", ioc->msix_vector_count); in _base_enable_msix()
3417 ioc->cpu_count, max_msix_vectors); in _base_enable_msix()
3419 ioc->reply_queue_count = in _base_enable_msix()
3420 min_t(int, ioc->cpu_count, ioc->msix_vector_count); in _base_enable_msix()
3422 if (!ioc->rdpq_array_enable && max_msix_vectors == -1) in _base_enable_msix()
3434 if (!ioc->combined_reply_queue && in _base_enable_msix()
3435 ioc->hba_mpi_version_belonged != MPI2_VERSION) { in _base_enable_msix()
3438 ioc->msix_load_balance = true; in _base_enable_msix()
3445 if (ioc->msix_load_balance) in _base_enable_msix()
3446 ioc->smp_affinity_enable = 0; in _base_enable_msix()
3448 if (!ioc->smp_affinity_enable || ioc->reply_queue_count <= 1) in _base_enable_msix()
3449 ioc->shost->host_tagset = 0; in _base_enable_msix()
3454 if (ioc->shost->host_tagset) in _base_enable_msix()
3458 ioc->io_uring_poll_queues = kcalloc(iopoll_q_count, in _base_enable_msix()
3460 if (!ioc->io_uring_poll_queues) in _base_enable_msix()
3464 if (ioc->is_aero_ioc) in _base_enable_msix()
3466 ioc->msix_vector_count); in _base_enable_msix()
3472 ioc->reply_queue_count = min_t(int, in _base_enable_msix()
3473 ioc->reply_queue_count + ioc->high_iops_queues, in _base_enable_msix()
3474 ioc->msix_vector_count); in _base_enable_msix()
3481 ioc->reply_queue_count = min_t(int, local_max_msix_vectors, in _base_enable_msix()
3482 ioc->reply_queue_count); in _base_enable_msix()
3488 if (ioc->reply_queue_count < (iopoll_q_count + MPT3_MIN_IRQS)) in _base_enable_msix()
3490 ioc->reply_queue_count = min_t(int, in _base_enable_msix()
3491 ioc->reply_queue_count + iopoll_q_count, in _base_enable_msix()
3492 ioc->msix_vector_count); in _base_enable_msix()
3498 ioc->iopoll_q_start_index = in _base_enable_msix()
3499 ioc->reply_queue_count - iopoll_q_count; in _base_enable_msix()
3512 if (r < ioc->iopoll_q_start_index) { in _base_enable_msix()
3513 ioc->reply_queue_count = r + iopoll_q_count; in _base_enable_msix()
3514 ioc->iopoll_q_start_index = in _base_enable_msix()
3515 ioc->reply_queue_count - iopoll_q_count; in _base_enable_msix()
3518 ioc->msix_enable = 1; in _base_enable_msix()
3519 for (i = 0; i < ioc->reply_queue_count; i++) { in _base_enable_msix()
3529 ioc->high_iops_queues ? "enabled" : "disabled"); in _base_enable_msix()
3535 ioc->high_iops_queues = 0; in _base_enable_msix()
3537 ioc->reply_queue_count = 1; in _base_enable_msix()
3538 ioc->iopoll_q_start_index = ioc->reply_queue_count - 0; in _base_enable_msix()
3539 r = pci_alloc_irq_vectors(ioc->pdev, 1, 1, PCI_IRQ_INTX); in _base_enable_msix()
3551 * mpt3sas_base_unmap_resources - free controller resources
3557 struct pci_dev *pdev = ioc->pdev; in mpt3sas_base_unmap_resources()
3564 kfree(ioc->replyPostRegisterIndex); in mpt3sas_base_unmap_resources()
3565 ioc->replyPostRegisterIndex = NULL; in mpt3sas_base_unmap_resources()
3568 if (ioc->chip_phys) { in mpt3sas_base_unmap_resources()
3569 iounmap(ioc->chip); in mpt3sas_base_unmap_resources()
3570 ioc->chip_phys = 0; in mpt3sas_base_unmap_resources()
3574 pci_release_selected_regions(ioc->pdev, ioc->bars); in mpt3sas_base_unmap_resources()
3583 * mpt3sas_base_check_for_fault_and_issue_reset - check if IOC is in fault state
3587 * Return: 0 for success, non-zero for failure.
3593 int rc = -EFAULT; in mpt3sas_base_check_for_fault_and_issue_reset()
3596 if (ioc->pci_error_recovery) in mpt3sas_base_check_for_fault_and_issue_reset()
3619 * mpt3sas_base_map_resources - map in controller resources (io/irq/memap)
3622 * Return: 0 for success, non-zero for failure.
3627 struct pci_dev *pdev = ioc->pdev; in mpt3sas_base_map_resources()
3638 ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM); in mpt3sas_base_map_resources()
3641 ioc->bars = 0; in mpt3sas_base_map_resources()
3642 return -ENODEV; in mpt3sas_base_map_resources()
3646 if (pci_request_selected_regions(pdev, ioc->bars, in mpt3sas_base_map_resources()
3647 ioc->driver_name)) { in mpt3sas_base_map_resources()
3649 ioc->bars = 0; in mpt3sas_base_map_resources()
3650 r = -ENODEV; in mpt3sas_base_map_resources()
3659 r = -ENODEV; in mpt3sas_base_map_resources()
3673 ioc->chip_phys = pci_resource_start(pdev, i); in mpt3sas_base_map_resources()
3674 chip_phys = ioc->chip_phys; in mpt3sas_base_map_resources()
3676 ioc->chip = ioremap(ioc->chip_phys, memap_sz); in mpt3sas_base_map_resources()
3680 if (ioc->chip == NULL) { in mpt3sas_base_map_resources()
3683 r = -EINVAL; in mpt3sas_base_map_resources()
3696 if (!ioc->rdpq_array_enable_assigned) { in mpt3sas_base_map_resources()
3697 ioc->rdpq_array_enable = ioc->rdpq_array_capable; in mpt3sas_base_map_resources()
3698 ioc->rdpq_array_enable_assigned = 1; in mpt3sas_base_map_resources()
3705 iopoll_q_count = ioc->reply_queue_count - ioc->iopoll_q_start_index; in mpt3sas_base_map_resources()
3707 atomic_set(&ioc->io_uring_poll_queues[i].busy, 0); in mpt3sas_base_map_resources()
3708 atomic_set(&ioc->io_uring_poll_queues[i].pause, 0); in mpt3sas_base_map_resources()
3711 if (!ioc->is_driver_loading) in mpt3sas_base_map_resources()
3716 if (ioc->combined_reply_queue) { in mpt3sas_base_map_resources()
3723 ioc->replyPostRegisterIndex = kcalloc( in mpt3sas_base_map_resources()
3724 ioc->combined_reply_index_count, in mpt3sas_base_map_resources()
3726 if (!ioc->replyPostRegisterIndex) { in mpt3sas_base_map_resources()
3729 r = -ENOMEM; in mpt3sas_base_map_resources()
3733 for (i = 0; i < ioc->combined_reply_index_count; i++) { in mpt3sas_base_map_resources()
3734 ioc->replyPostRegisterIndex[i] = in mpt3sas_base_map_resources()
3736 ((u8 __force *)&ioc->chip->Doorbell + in mpt3sas_base_map_resources()
3742 if (ioc->is_warpdrive) { in mpt3sas_base_map_resources()
3743 ioc->reply_post_host_index[0] = (resource_size_t __iomem *) in mpt3sas_base_map_resources()
3744 &ioc->chip->ReplyPostHostIndex; in mpt3sas_base_map_resources()
3746 for (i = 1; i < ioc->cpu_msix_table_sz; i++) in mpt3sas_base_map_resources()
3747 ioc->reply_post_host_index[i] = in mpt3sas_base_map_resources()
3749 ((u8 __iomem *)&ioc->chip->Doorbell + (0x4000 + ((i - 1) in mpt3sas_base_map_resources()
3753 list_for_each_entry(reply_q, &ioc->reply_queue_list, list) { in mpt3sas_base_map_resources()
3754 if (reply_q->msix_index >= ioc->iopoll_q_start_index) { in mpt3sas_base_map_resources()
3756 reply_q->name, reply_q->msix_index); in mpt3sas_base_map_resources()
3761 reply_q->name, in mpt3sas_base_map_resources()
3762 ioc->msix_enable ? "PCI-MSI-X" : "IO-APIC", in mpt3sas_base_map_resources()
3763 pci_irq_vector(ioc->pdev, reply_q->msix_index)); in mpt3sas_base_map_resources()
3767 &chip_phys, ioc->chip, memap_sz); in mpt3sas_base_map_resources()
3781 * mpt3sas_base_get_msg_frame - obtain request mf pointer
3790 return (void *)(ioc->request + (smid * ioc->request_sz)); in mpt3sas_base_get_msg_frame()
3794 * mpt3sas_base_get_sense_buffer - obtain a sense buffer virt addr
3803 return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE)); in mpt3sas_base_get_sense_buffer()
3807 * mpt3sas_base_get_sense_buffer_dma - obtain a sense buffer dma addr
3816 return cpu_to_le32(ioc->sense_dma + ((smid - 1) * in mpt3sas_base_get_sense_buffer_dma()
3821 * mpt3sas_base_get_pcie_sgl - obtain a PCIe SGL virt addr
3825 * Return: virt pointer to a PCIe SGL.
3830 return (void *)(ioc->pcie_sg_lookup[smid - 1].pcie_sgl); in mpt3sas_base_get_pcie_sgl()
3834 * mpt3sas_base_get_pcie_sgl_dma - obtain a PCIe SGL dma addr
3838 * Return: phys pointer to the address of the PCIe buffer.
3843 return ioc->pcie_sg_lookup[smid - 1].pcie_sgl_dma; in mpt3sas_base_get_pcie_sgl_dma()
3847 * mpt3sas_base_get_reply_virt_addr - obtain reply frames virt address
3858 return ioc->reply + (phys_addr - (u32)ioc->reply_dma); in mpt3sas_base_get_reply_virt_addr()
3862 * _base_get_msix_index - get the msix index
3875 if (ioc->msix_load_balance) in _base_get_msix_index()
3876 return ioc->reply_queue_count ? in _base_get_msix_index()
3878 &ioc->total_io_cnt), ioc->reply_queue_count) : 0; in _base_get_msix_index()
3880 if (scmd && ioc->shost->nr_hw_queues > 1) { in _base_get_msix_index()
3884 ioc->high_iops_queues; in _base_get_msix_index()
3887 return ioc->cpu_msix_table[raw_smp_processor_id()]; in _base_get_msix_index()
3891 * _base_get_high_iops_msix_index - get the msix index of
3910 if (scsi_device_busy(scmd->device) > MPT3SAS_DEVICE_HIGH_IOPS_DEPTH) in _base_get_high_iops_msix_index()
3912 atomic64_add_return(1, &ioc->high_iops_outstanding) / in _base_get_high_iops_msix_index()
3920 * mpt3sas_base_get_smid - obtain a free smid from internal queue
3933 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); in mpt3sas_base_get_smid()
3934 if (list_empty(&ioc->internal_free_list)) { in mpt3sas_base_get_smid()
3935 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); in mpt3sas_base_get_smid()
3940 request = list_entry(ioc->internal_free_list.next, in mpt3sas_base_get_smid()
3942 request->cb_idx = cb_idx; in mpt3sas_base_get_smid()
3943 smid = request->smid; in mpt3sas_base_get_smid()
3944 list_del(&request->tracker_list); in mpt3sas_base_get_smid()
3945 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); in mpt3sas_base_get_smid()
3950 * mpt3sas_base_get_smid_scsiio - obtain a free smid from scsiio queue
3975 * tag = smid - 1; in mpt3sas_base_get_smid_scsiio()
3976 * unique_tag = ioc->io_queue_num[tag] << BLK_MQ_UNIQUE_TAG_BITS | tag; in mpt3sas_base_get_smid_scsiio()
3978 ioc->io_queue_num[tag] = blk_mq_unique_tag_to_hwq(unique_tag); in mpt3sas_base_get_smid_scsiio()
3981 request->cb_idx = cb_idx; in mpt3sas_base_get_smid_scsiio()
3982 request->smid = smid; in mpt3sas_base_get_smid_scsiio()
3983 request->scmd = scmd; in mpt3sas_base_get_smid_scsiio()
3984 INIT_LIST_HEAD(&request->chain_list); in mpt3sas_base_get_smid_scsiio()
3989 * mpt3sas_base_get_smid_hpr - obtain a free smid from hi-priority queue
4002 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); in mpt3sas_base_get_smid_hpr()
4003 if (list_empty(&ioc->hpr_free_list)) { in mpt3sas_base_get_smid_hpr()
4004 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); in mpt3sas_base_get_smid_hpr()
4008 request = list_entry(ioc->hpr_free_list.next, in mpt3sas_base_get_smid_hpr()
4010 request->cb_idx = cb_idx; in mpt3sas_base_get_smid_hpr()
4011 smid = request->smid; in mpt3sas_base_get_smid_hpr()
4012 list_del(&request->tracker_list); in mpt3sas_base_get_smid_hpr()
4013 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); in mpt3sas_base_get_smid_hpr()
4023 if (ioc->shost_recovery && ioc->pending_io_count) { in _base_recovery_check()
4024 ioc->pending_io_count = scsi_host_busy(ioc->shost); in _base_recovery_check()
4025 if (ioc->pending_io_count == 0) in _base_recovery_check()
4026 wake_up(&ioc->reset_wq); in _base_recovery_check()
4033 if (WARN_ON(st->smid == 0)) in mpt3sas_base_clear_st()
4035 st->cb_idx = 0xFF; in mpt3sas_base_clear_st()
4036 st->direct_io = 0; in mpt3sas_base_clear_st()
4037 st->scmd = NULL; in mpt3sas_base_clear_st()
4038 atomic_set(&ioc->chain_lookup[st->smid - 1].chain_offset, 0); in mpt3sas_base_clear_st()
4039 st->smid = 0; in mpt3sas_base_clear_st()
4043 * mpt3sas_base_free_smid - put smid back on free_list
4053 if (smid < ioc->hi_priority_smid) { in mpt3sas_base_free_smid()
4065 memset(request, 0, ioc->request_sz); in mpt3sas_base_free_smid()
4069 ioc->io_queue_num[smid - 1] = 0; in mpt3sas_base_free_smid()
4073 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); in mpt3sas_base_free_smid()
4074 if (smid < ioc->internal_smid) { in mpt3sas_base_free_smid()
4075 /* hi-priority */ in mpt3sas_base_free_smid()
4076 i = smid - ioc->hi_priority_smid; in mpt3sas_base_free_smid()
4077 ioc->hpr_lookup[i].cb_idx = 0xFF; in mpt3sas_base_free_smid()
4078 list_add(&ioc->hpr_lookup[i].tracker_list, &ioc->hpr_free_list); in mpt3sas_base_free_smid()
4079 } else if (smid <= ioc->hba_queue_depth) { in mpt3sas_base_free_smid()
4081 i = smid - ioc->internal_smid; in mpt3sas_base_free_smid()
4082 ioc->internal_lookup[i].cb_idx = 0xFF; in mpt3sas_base_free_smid()
4083 list_add(&ioc->internal_lookup[i].tracker_list, in mpt3sas_base_free_smid()
4084 &ioc->internal_free_list); in mpt3sas_base_free_smid()
4086 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); in mpt3sas_base_free_smid()
4090 * _base_mpi_ep_writeq - 32 bit write to MMIO
4095 * This special handling for MPI EP to take care of 32 bit
4112 * _base_writeq - 64 bit write to MMIO
4138 * _base_set_and_get_msix_index - get the msix index and assign to msix_io
4150 if (smid < ioc->hi_priority_smid) in _base_set_and_get_msix_index()
4156 st->msix_io = ioc->get_msix_index_for_smlio(ioc, st->scmd); in _base_set_and_get_msix_index()
4157 return st->msix_io; in _base_set_and_get_msix_index()
4161 * _base_put_smid_mpi_ep_scsi_io - send SCSI_IO request to firmware
4176 mpi_req_iomem = (void __force *)ioc->chip + in _base_put_smid_mpi_ep_scsi_io()
4177 MPI_FRAME_START_OFFSET + (smid * ioc->request_sz); in _base_put_smid_mpi_ep_scsi_io()
4179 ioc->request_sz); in _base_put_smid_mpi_ep_scsi_io()
4185 _base_mpi_ep_writeq(*request, &ioc->chip->RequestDescriptorPostLow, in _base_put_smid_mpi_ep_scsi_io()
4186 &ioc->scsi_lookup_lock); in _base_put_smid_mpi_ep_scsi_io()
4190 * _base_put_smid_scsi_io - send SCSI_IO request to firmware
4207 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, in _base_put_smid_scsi_io()
4208 &ioc->scsi_lookup_lock); in _base_put_smid_scsi_io()
4212 * _base_put_smid_fast_path - send fast path request to firmware
4230 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, in _base_put_smid_fast_path()
4231 &ioc->scsi_lookup_lock); in _base_put_smid_fast_path()
4235 * _base_put_smid_hi_priority - send Task Management request to firmware
4248 if (ioc->is_mcpu_endpoint) { in _base_put_smid_hi_priority()
4252 mpi_req_iomem = (void __force *)ioc->chip in _base_put_smid_hi_priority()
4254 + (smid * ioc->request_sz); in _base_put_smid_hi_priority()
4256 ioc->request_sz); in _base_put_smid_hi_priority()
4267 if (ioc->is_mcpu_endpoint) in _base_put_smid_hi_priority()
4269 &ioc->chip->RequestDescriptorPostLow, in _base_put_smid_hi_priority()
4270 &ioc->scsi_lookup_lock); in _base_put_smid_hi_priority()
4272 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, in _base_put_smid_hi_priority()
4273 &ioc->scsi_lookup_lock); in _base_put_smid_hi_priority()
4277 * mpt3sas_base_put_smid_nvme_encap - send NVMe encapsulated request to
4294 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, in mpt3sas_base_put_smid_nvme_encap()
4295 &ioc->scsi_lookup_lock); in mpt3sas_base_put_smid_nvme_encap()
4299 * _base_put_smid_default - Default, primarily used for config pages
4310 if (ioc->is_mcpu_endpoint) { in _base_put_smid_default()
4315 mpi_req_iomem = (void __force *)ioc->chip + in _base_put_smid_default()
4316 MPI_FRAME_START_OFFSET + (smid * ioc->request_sz); in _base_put_smid_default()
4318 ioc->request_sz); in _base_put_smid_default()
4326 if (ioc->is_mcpu_endpoint) in _base_put_smid_default()
4328 &ioc->chip->RequestDescriptorPostLow, in _base_put_smid_default()
4329 &ioc->scsi_lookup_lock); in _base_put_smid_default()
4331 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, in _base_put_smid_default()
4332 &ioc->scsi_lookup_lock); in _base_put_smid_default()
4336 * _base_put_smid_scsi_io_atomic - send SCSI_IO request to firmware using
4355 writel(cpu_to_le32(*request), &ioc->chip->AtomicRequestDescriptorPost); in _base_put_smid_scsi_io_atomic()
4359 * _base_put_smid_fast_path_atomic - send fast path request to firmware
4377 writel(cpu_to_le32(*request), &ioc->chip->AtomicRequestDescriptorPost); in _base_put_smid_fast_path_atomic()
4381 * _base_put_smid_hi_priority_atomic - send Task Management request to
4400 writel(cpu_to_le32(*request), &ioc->chip->AtomicRequestDescriptorPost); in _base_put_smid_hi_priority_atomic()
4404 * _base_put_smid_default_atomic - Default, primarily used for config pages
4421 writel(cpu_to_le32(*request), &ioc->chip->AtomicRequestDescriptorPost); in _base_put_smid_default_atomic()
4425 * _base_display_OEMs_branding - Display branding string
4431 if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_INTEL) in _base_display_OEMs_branding()
4434 switch (ioc->pdev->subsystem_vendor) { in _base_display_OEMs_branding()
4436 switch (ioc->pdev->device) { in _base_display_OEMs_branding()
4438 switch (ioc->pdev->subsystem_device) { in _base_display_OEMs_branding()
4453 ioc->pdev->subsystem_device); in _base_display_OEMs_branding()
4458 switch (ioc->pdev->subsystem_device) { in _base_display_OEMs_branding()
4489 ioc->pdev->subsystem_device); in _base_display_OEMs_branding()
4494 switch (ioc->pdev->subsystem_device) { in _base_display_OEMs_branding()
4514 ioc->pdev->subsystem_device); in _base_display_OEMs_branding()
4520 ioc->pdev->subsystem_device); in _base_display_OEMs_branding()
4525 switch (ioc->pdev->device) { in _base_display_OEMs_branding()
4527 switch (ioc->pdev->subsystem_device) { in _base_display_OEMs_branding()
4558 ioc->pdev->subsystem_device); in _base_display_OEMs_branding()
4563 switch (ioc->pdev->subsystem_device) { in _base_display_OEMs_branding()
4570 ioc->pdev->subsystem_device); in _base_display_OEMs_branding()
4576 ioc->pdev->subsystem_device); in _base_display_OEMs_branding()
4581 switch (ioc->pdev->device) { in _base_display_OEMs_branding()
4583 switch (ioc->pdev->subsystem_device) { in _base_display_OEMs_branding()
4598 ioc->pdev->subsystem_device); in _base_display_OEMs_branding()
4603 switch (ioc->pdev->subsystem_device) { in _base_display_OEMs_branding()
4614 ioc->pdev->subsystem_device); in _base_display_OEMs_branding()
4620 ioc->pdev->subsystem_device); in _base_display_OEMs_branding()
4625 switch (ioc->pdev->device) { in _base_display_OEMs_branding()
4627 switch (ioc->pdev->subsystem_device) { in _base_display_OEMs_branding()
4634 ioc->pdev->subsystem_device); in _base_display_OEMs_branding()
4639 switch (ioc->pdev->subsystem_device) { in _base_display_OEMs_branding()
4658 ioc->pdev->subsystem_device); in _base_display_OEMs_branding()
4664 ioc->pdev->subsystem_device); in _base_display_OEMs_branding()
4674 * _base_display_fwpkg_version - sends FWUpload request to pull FWPkg
4678 * Return: 0 for success, non-zero for failure.
4696 if (ioc->base_cmds.status & MPT3_CMD_PENDING) { in _base_display_fwpkg_version()
4698 return -EAGAIN; in _base_display_fwpkg_version()
4702 fwpkg_data = dma_alloc_coherent(&ioc->pdev->dev, data_length, in _base_display_fwpkg_version()
4708 return -ENOMEM; in _base_display_fwpkg_version()
4711 smid = mpt3sas_base_get_smid(ioc, ioc->base_cb_idx); in _base_display_fwpkg_version()
4714 r = -EAGAIN; in _base_display_fwpkg_version()
4718 ioc->base_cmds.status = MPT3_CMD_PENDING; in _base_display_fwpkg_version()
4720 ioc->base_cmds.smid = smid; in _base_display_fwpkg_version()
4722 mpi_request->Function = MPI2_FUNCTION_FW_UPLOAD; in _base_display_fwpkg_version()
4723 mpi_request->ImageType = MPI2_FW_UPLOAD_ITYPE_FW_FLASH; in _base_display_fwpkg_version()
4724 mpi_request->ImageSize = cpu_to_le32(data_length); in _base_display_fwpkg_version()
4725 ioc->build_sg(ioc, &mpi_request->SGL, 0, 0, fwpkg_data_dma, in _base_display_fwpkg_version()
4727 init_completion(&ioc->base_cmds.done); in _base_display_fwpkg_version()
4728 ioc->put_smid_default(ioc, smid); in _base_display_fwpkg_version()
4730 wait_for_completion_timeout(&ioc->base_cmds.done, in _base_display_fwpkg_version()
4733 if (!(ioc->base_cmds.status & MPT3_CMD_COMPLETE)) { in _base_display_fwpkg_version()
4740 if (ioc->base_cmds.status & MPT3_CMD_REPLY_VALID) { in _base_display_fwpkg_version()
4741 memcpy(&mpi_reply, ioc->base_cmds.reply, in _base_display_fwpkg_version()
4747 if (le32_to_cpu(fw_img_hdr->Signature) == in _base_display_fwpkg_version()
4754 cmp_img_hdr->ApplicationSpecific); in _base_display_fwpkg_version()
4758 fw_img_hdr->PackageVersion.Word); in _base_display_fwpkg_version()
4772 ioc->base_cmds.status = MPT3_CMD_NOT_USED; in _base_display_fwpkg_version()
4775 dma_free_coherent(&ioc->pdev->dev, data_length, fwpkg_data, in _base_display_fwpkg_version()
4778 if (ioc->drv_internal_flags & MPT_DRV_INTERNAL_FIRST_PE_ISSUED) in _base_display_fwpkg_version()
4779 return -EFAULT; in _base_display_fwpkg_version()
4781 return -EFAULT; in _base_display_fwpkg_version()
4782 r = -EAGAIN; in _base_display_fwpkg_version()
4788 * _base_display_ioc_capabilities - Display IOC's capabilities.
4798 memtostr(desc, ioc->manu_pg0.ChipName); in _base_display_ioc_capabilities()
4801 (ioc->facts.FWVersion.Word & 0xFF000000) >> 24, in _base_display_ioc_capabilities()
4802 (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16, in _base_display_ioc_capabilities()
4803 (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8, in _base_display_ioc_capabilities()
4804 ioc->facts.FWVersion.Word & 0x000000FF, in _base_display_ioc_capabilities()
4805 ioc->pdev->revision); in _base_display_ioc_capabilities()
4809 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_NVME_DEVICES) { in _base_display_ioc_capabilities()
4816 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) { in _base_display_ioc_capabilities()
4821 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) { in _base_display_ioc_capabilities()
4829 if (!ioc->hide_ir_msg) { in _base_display_ioc_capabilities()
4830 if (ioc->facts.IOCCapabilities & in _base_display_ioc_capabilities()
4837 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) { in _base_display_ioc_capabilities()
4842 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) { in _base_display_ioc_capabilities()
4847 if (ioc->facts.IOCCapabilities & in _base_display_ioc_capabilities()
4853 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) { in _base_display_ioc_capabilities()
4858 if (ioc->facts.IOCCapabilities & in _base_display_ioc_capabilities()
4864 if (ioc->facts.IOCCapabilities & in _base_display_ioc_capabilities()
4870 if (ioc->facts.IOCCapabilities & in _base_display_ioc_capabilities()
4876 if (ioc->facts.IOCCapabilities & in _base_display_ioc_capabilities()
4882 if (ioc->facts.IOCCapabilities & in _base_display_ioc_capabilities()
4888 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags); in _base_display_ioc_capabilities()
4898 * mpt3sas_base_update_missing_delay - change the missing delay timers
4945 dmd = sas_iounit_pg1->ReportDeviceMissingDelay; in mpt3sas_base_update_missing_delay()
4958 sas_iounit_pg1->ReportDeviceMissingDelay = dmd; in mpt3sas_base_update_missing_delay()
4961 io_missing_delay_original = sas_iounit_pg1->IODeviceMissingDelay; in mpt3sas_base_update_missing_delay()
4962 sas_iounit_pg1->IODeviceMissingDelay = io_missing_delay; in mpt3sas_base_update_missing_delay()
4977 ioc->device_missing_delay = dmd_new; in mpt3sas_base_update_missing_delay()
4978 ioc->io_missing_delay = io_missing_delay; in mpt3sas_base_update_missing_delay()
4986 * _base_update_ioc_page1_inlinewith_perf_mode - Update IOC Page1 fields
5000 rc = mpt3sas_config_get_ioc_pg1(ioc, &mpi_reply, &ioc->ioc_pg1_copy); in _base_update_ioc_page1_inlinewith_perf_mode()
5003 memcpy(&ioc_pg1, &ioc->ioc_pg1_copy, sizeof(Mpi2IOCPage1_t)); in _base_update_ioc_page1_inlinewith_perf_mode()
5008 if (ioc->high_iops_queues) { in _base_update_ioc_page1_inlinewith_perf_mode()
5023 ((1 << MPT3SAS_HIGH_IOPS_REPLY_QUEUES/8) - 1)); in _base_update_ioc_page1_inlinewith_perf_mode()
5062 * _base_get_event_diag_triggers - get event diag trigger values from
5097 ioc->diag_trigger_event.ValidEntries = count; in _base_get_event_diag_triggers()
5099 event_tg = &ioc->diag_trigger_event.EventTriggerEntry[0]; in _base_get_event_diag_triggers()
5102 event_tg->EventValue = le16_to_cpu( in _base_get_event_diag_triggers()
5103 mpi_event_tg->MPIEventCode); in _base_get_event_diag_triggers()
5104 event_tg->LogEntryQualifier = le16_to_cpu( in _base_get_event_diag_triggers()
5105 mpi_event_tg->MPIEventCodeSpecific); in _base_get_event_diag_triggers()
5114 * _base_get_scsi_diag_triggers - get scsi diag trigger values from
5149 ioc->diag_trigger_scsi.ValidEntries = count; in _base_get_scsi_diag_triggers()
5151 scsi_tg = &ioc->diag_trigger_scsi.SCSITriggerEntry[0]; in _base_get_scsi_diag_triggers()
5154 scsi_tg->ASCQ = mpi_scsi_tg->ASCQ; in _base_get_scsi_diag_triggers()
5155 scsi_tg->ASC = mpi_scsi_tg->ASC; in _base_get_scsi_diag_triggers()
5156 scsi_tg->SenseKey = mpi_scsi_tg->SenseKey; in _base_get_scsi_diag_triggers()
5166 * _base_get_mpi_diag_triggers - get mpi diag trigger values from
5201 ioc->diag_trigger_mpi.ValidEntries = count; in _base_get_mpi_diag_triggers()
5203 status_tg = &ioc->diag_trigger_mpi.MPITriggerEntry[0]; in _base_get_mpi_diag_triggers()
5207 status_tg->IOCStatus = le16_to_cpu( in _base_get_mpi_diag_triggers()
5208 mpi_status_tg->IOCStatus); in _base_get_mpi_diag_triggers()
5209 status_tg->IocLogInfo = le32_to_cpu( in _base_get_mpi_diag_triggers()
5210 mpi_status_tg->LogInfo); in _base_get_mpi_diag_triggers()
5220 * _base_get_master_diag_triggers - get master diag trigger values from
5250 ioc->diag_trigger_master.MasterData |= in _base_get_master_diag_triggers()
5257 * _base_check_for_trigger_pages_support - checks whether HBA FW supports
5263 * otherwise returns %-EFAULT if driver trigger pages are not supported by FW or
5284 return -EFAULT; in _base_check_for_trigger_pages_support()
5291 * _base_get_diag_triggers - Retrieve diag trigger values from
5307 ioc->diag_trigger_master.MasterData = in _base_get_diag_triggers()
5312 if (r == -EAGAIN) in _base_get_diag_triggers()
5321 ioc->supports_trigger_pages = 1; in _base_get_diag_triggers()
5369 * _base_update_diag_trigger_pages - Update the driver trigger pages after
5380 if (ioc->diag_trigger_master.MasterData) in _base_update_diag_trigger_pages()
5382 &ioc->diag_trigger_master, 1); in _base_update_diag_trigger_pages()
5384 if (ioc->diag_trigger_event.ValidEntries) in _base_update_diag_trigger_pages()
5386 &ioc->diag_trigger_event, 1); in _base_update_diag_trigger_pages()
5388 if (ioc->diag_trigger_scsi.ValidEntries) in _base_update_diag_trigger_pages()
5390 &ioc->diag_trigger_scsi, 1); in _base_update_diag_trigger_pages()
5392 if (ioc->diag_trigger_mpi.ValidEntries) in _base_update_diag_trigger_pages()
5394 &ioc->diag_trigger_mpi, 1); in _base_update_diag_trigger_pages()
5398 * _base_assign_fw_reported_qd - Get FW reported QD for SAS/SATA devices.
5399 * - On failure set default QD values.
5402 * Returns 0 for success, non-zero for failure.
5413 ioc->max_wideport_qd = MPT3SAS_SAS_QUEUE_DEPTH; in _base_assign_fw_reported_qd()
5414 ioc->max_narrowport_qd = MPT3SAS_SAS_QUEUE_DEPTH; in _base_assign_fw_reported_qd()
5415 ioc->max_sata_qd = MPT3SAS_SATA_QUEUE_DEPTH; in _base_assign_fw_reported_qd()
5416 ioc->max_nvme_qd = MPT3SAS_NVME_QUEUE_DEPTH; in _base_assign_fw_reported_qd()
5417 if (!ioc->is_gen35_ioc) in _base_assign_fw_reported_qd()
5424 ioc->name, __FILE__, __LINE__, __func__); in _base_assign_fw_reported_qd()
5429 ioc->max_wideport_qd = (depth ? depth : MPT3SAS_SAS_QUEUE_DEPTH); in _base_assign_fw_reported_qd()
5432 ioc->max_narrowport_qd = (depth ? depth : MPT3SAS_SAS_QUEUE_DEPTH); in _base_assign_fw_reported_qd()
5435 ioc->max_sata_qd = (depth ? depth : MPT3SAS_SATA_QUEUE_DEPTH); in _base_assign_fw_reported_qd()
5437 /* pcie iounit page 1 */ in _base_assign_fw_reported_qd()
5442 ioc->name, __FILE__, __LINE__, __func__); in _base_assign_fw_reported_qd()
5445 ioc->max_nvme_qd = (le16_to_cpu(pcie_iounit_pg1.NVMeMaxQueueDepth)) ? in _base_assign_fw_reported_qd()
5451 ioc->max_wideport_qd, ioc->max_narrowport_qd, in _base_assign_fw_reported_qd()
5452 ioc->max_sata_qd, ioc->max_nvme_qd)); in _base_assign_fw_reported_qd()
5457 * mpt3sas_atto_validate_nvram - validate the ATTO nvram read from mfg pg1
5461 * Return: 0 for success, non-zero for failure.
5467 int r = -EINVAL; in mpt3sas_atto_validate_nvram()
5478 while (len--) in mpt3sas_atto_validate_nvram()
5486 s1 = (union ATTO_SAS_ADDRESS *) n->SasAddr; in mpt3sas_atto_validate_nvram()
5488 if (n->Signature[0] != 'E' in mpt3sas_atto_validate_nvram()
5489 || n->Signature[1] != 'S' in mpt3sas_atto_validate_nvram()
5490 || n->Signature[2] != 'A' in mpt3sas_atto_validate_nvram()
5491 || n->Signature[3] != 'S') in mpt3sas_atto_validate_nvram()
5493 else if (n->Version > ATTO_SASNVR_VERSION) in mpt3sas_atto_validate_nvram()
5495 else if ((n->SasAddr[7] & (ATTO_SAS_ADDR_ALIGN - 1)) in mpt3sas_atto_validate_nvram()
5496 || s1->b[0] != 0x50 in mpt3sas_atto_validate_nvram()
5497 || s1->b[1] != 0x01 in mpt3sas_atto_validate_nvram()
5498 || s1->b[2] != 0x08 in mpt3sas_atto_validate_nvram()
5499 || (s1->b[3] & 0xF0) != 0x60 in mpt3sas_atto_validate_nvram()
5500 || ((s1->b[3] & 0x0F) | le32_to_cpu(s1->d[1])) == 0) { in mpt3sas_atto_validate_nvram()
5508 * mpt3sas_atto_get_sas_addr - get the ATTO SAS address from mfg page 1
5512 * Return: 0 for success, non-zero for failure.
5535 addr = *((__be64 *) nvram->SasAddr); in mpt3sas_atto_get_sas_addr()
5536 sas_addr->q = cpu_to_le64(be64_to_cpu(addr)); in mpt3sas_atto_get_sas_addr()
5541 * mpt3sas_atto_init - perform initializaion for ATTO branded
5545 * Return: 0 for success, non-zero for failure.
5574 return -ENOMEM; in mpt3sas_atto_init()
5588 for (ix = 0; ix < bios_pg4->NumPhys; ix++) { in mpt3sas_atto_init()
5591 bios_pg4->Phy[ix].ReassignmentWWID = temp.q; in mpt3sas_atto_init()
5592 bios_pg4->Phy[ix].ReassignmentDeviceName = bias.q; in mpt3sas_atto_init()
5602 * _base_static_config_pages - static start of day config pages
5613 ioc->nvme_abort_timeout = 30; in _base_static_config_pages()
5616 &ioc->manu_pg0); in _base_static_config_pages()
5619 if (ioc->ir_firmware) { in _base_static_config_pages()
5621 &ioc->manu_pg10); in _base_static_config_pages()
5626 if (ioc->pdev->vendor == MPI2_MFGPAGE_VENDORID_ATTO) { in _base_static_config_pages()
5637 &ioc->manu_pg11); in _base_static_config_pages()
5640 if (!ioc->is_gen35_ioc && ioc->manu_pg11.EEDPTagMode == 0) { in _base_static_config_pages()
5642 ioc->name); in _base_static_config_pages()
5643 ioc->manu_pg11.EEDPTagMode = 0x1; in _base_static_config_pages()
5645 &ioc->manu_pg11); in _base_static_config_pages()
5647 if (ioc->manu_pg11.AddlFlags2 & NVME_TASK_MNGT_CUSTOM_MASK) in _base_static_config_pages()
5648 ioc->tm_custom_handling = 1; in _base_static_config_pages()
5650 ioc->tm_custom_handling = 0; in _base_static_config_pages()
5651 if (ioc->manu_pg11.NVMeAbortTO < NVME_TASK_ABORT_MIN_TIMEOUT) in _base_static_config_pages()
5652 ioc->nvme_abort_timeout = NVME_TASK_ABORT_MIN_TIMEOUT; in _base_static_config_pages()
5653 else if (ioc->manu_pg11.NVMeAbortTO > in _base_static_config_pages()
5655 ioc->nvme_abort_timeout = NVME_TASK_ABORT_MAX_TIMEOUT; in _base_static_config_pages()
5657 ioc->nvme_abort_timeout = ioc->manu_pg11.NVMeAbortTO; in _base_static_config_pages()
5659 ioc->time_sync_interval = in _base_static_config_pages()
5660 ioc->manu_pg11.TimeSyncInterval & MPT3SAS_TIMESYNC_MASK; in _base_static_config_pages()
5661 if (ioc->time_sync_interval) { in _base_static_config_pages()
5662 if (ioc->manu_pg11.TimeSyncInterval & MPT3SAS_TIMESYNC_UNIT_MASK) in _base_static_config_pages()
5663 ioc->time_sync_interval = in _base_static_config_pages()
5664 ioc->time_sync_interval * SECONDS_PER_HOUR; in _base_static_config_pages()
5666 ioc->time_sync_interval = in _base_static_config_pages()
5667 ioc->time_sync_interval * SECONDS_PER_MIN; in _base_static_config_pages()
5669 "Driver-FW TimeSync interval is %d seconds. ManuPg11 TimeSync Unit is in %s\n", in _base_static_config_pages()
5670 ioc->time_sync_interval, (ioc->manu_pg11.TimeSyncInterval & in _base_static_config_pages()
5673 if (ioc->is_gen35_ioc) in _base_static_config_pages()
5675 "TimeSync Interval in Manuf page-11 is not enabled. Periodic Time-Sync will be disabled\n"); in _base_static_config_pages()
5684 if (ioc->pdev->vendor == MPI2_MFGPAGE_VENDORID_ATTO) in _base_static_config_pages()
5685 ioc->bios_pg3.BiosVersion = 0; in _base_static_config_pages()
5687 rc = mpt3sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2); in _base_static_config_pages()
5690 rc = mpt3sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3); in _base_static_config_pages()
5695 rc = mpt3sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8); in _base_static_config_pages()
5698 rc = mpt3sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0); in _base_static_config_pages()
5701 rc = mpt3sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1); in _base_static_config_pages()
5713 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags); in _base_static_config_pages()
5714 if ((ioc->facts.IOCCapabilities & in _base_static_config_pages()
5721 ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags); in _base_static_config_pages()
5722 rc = mpt3sas_config_set_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1); in _base_static_config_pages()
5727 ioc->temp_sensors_count = iounit_pg8.NumSensors; in _base_static_config_pages()
5728 if (ioc->is_aero_ioc) { in _base_static_config_pages()
5733 if (ioc->is_gen35_ioc) { in _base_static_config_pages()
5734 if (ioc->is_driver_loading) { in _base_static_config_pages()
5743 * - If previous FW has not supported driver trigger in _base_static_config_pages()
5746 * - If previous FW has supported driver trigger pages in _base_static_config_pages()
5751 if (!ioc->supports_trigger_pages && tg_flags != -EFAULT) in _base_static_config_pages()
5753 else if (ioc->supports_trigger_pages && in _base_static_config_pages()
5754 tg_flags == -EFAULT) in _base_static_config_pages()
5755 ioc->supports_trigger_pages = 0; in _base_static_config_pages()
5762 * mpt3sas_free_enclosure_list - release memory
5774 enclosure_dev_next, &ioc->enclosure_list, list) { in mpt3sas_free_enclosure_list()
5775 list_del(&enclosure_dev->list); in mpt3sas_free_enclosure_list()
5781 * _base_release_memory_pools - release memory
5793 int count = ioc->rdpq_array_enable ? ioc->reply_queue_count : 1; in _base_release_memory_pools()
5797 if (ioc->request) { in _base_release_memory_pools()
5798 dma_free_coherent(&ioc->pdev->dev, ioc->request_dma_sz, in _base_release_memory_pools()
5799 ioc->request, ioc->request_dma); in _base_release_memory_pools()
5802 ioc->request)); in _base_release_memory_pools()
5803 ioc->request = NULL; in _base_release_memory_pools()
5806 if (ioc->sense) { in _base_release_memory_pools()
5807 dma_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma); in _base_release_memory_pools()
5808 dma_pool_destroy(ioc->sense_dma_pool); in _base_release_memory_pools()
5811 ioc->sense)); in _base_release_memory_pools()
5812 ioc->sense = NULL; in _base_release_memory_pools()
5815 if (ioc->reply) { in _base_release_memory_pools()
5816 dma_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma); in _base_release_memory_pools()
5817 dma_pool_destroy(ioc->reply_dma_pool); in _base_release_memory_pools()
5820 ioc->reply)); in _base_release_memory_pools()
5821 ioc->reply = NULL; in _base_release_memory_pools()
5824 if (ioc->reply_free) { in _base_release_memory_pools()
5825 dma_pool_free(ioc->reply_free_dma_pool, ioc->reply_free, in _base_release_memory_pools()
5826 ioc->reply_free_dma); in _base_release_memory_pools()
5827 dma_pool_destroy(ioc->reply_free_dma_pool); in _base_release_memory_pools()
5830 ioc->reply_free)); in _base_release_memory_pools()
5831 ioc->reply_free = NULL; in _base_release_memory_pools()
5834 if (ioc->reply_post) { in _base_release_memory_pools()
5840 if (ioc->reply_post[i].reply_post_free) { in _base_release_memory_pools()
5842 ioc->reply_post_free_dma_pool, in _base_release_memory_pools()
5843 ioc->reply_post[i].reply_post_free, in _base_release_memory_pools()
5844 ioc->reply_post[i].reply_post_free_dma); in _base_release_memory_pools()
5847 ioc->reply_post[i].reply_post_free)); in _base_release_memory_pools()
5848 ioc->reply_post[i].reply_post_free = in _base_release_memory_pools()
5851 --dma_alloc_count; in _base_release_memory_pools()
5854 dma_pool_destroy(ioc->reply_post_free_dma_pool); in _base_release_memory_pools()
5855 if (ioc->reply_post_free_array && in _base_release_memory_pools()
5856 ioc->rdpq_array_enable) { in _base_release_memory_pools()
5857 dma_pool_free(ioc->reply_post_free_array_dma_pool, in _base_release_memory_pools()
5858 ioc->reply_post_free_array, in _base_release_memory_pools()
5859 ioc->reply_post_free_array_dma); in _base_release_memory_pools()
5860 ioc->reply_post_free_array = NULL; in _base_release_memory_pools()
5862 dma_pool_destroy(ioc->reply_post_free_array_dma_pool); in _base_release_memory_pools()
5863 kfree(ioc->reply_post); in _base_release_memory_pools()
5866 if (ioc->pcie_sgl_dma_pool) { in _base_release_memory_pools()
5867 for (i = 0; i < ioc->scsiio_depth; i++) { in _base_release_memory_pools()
5868 dma_pool_free(ioc->pcie_sgl_dma_pool, in _base_release_memory_pools()
5869 ioc->pcie_sg_lookup[i].pcie_sgl, in _base_release_memory_pools()
5870 ioc->pcie_sg_lookup[i].pcie_sgl_dma); in _base_release_memory_pools()
5871 ioc->pcie_sg_lookup[i].pcie_sgl = NULL; in _base_release_memory_pools()
5873 dma_pool_destroy(ioc->pcie_sgl_dma_pool); in _base_release_memory_pools()
5875 kfree(ioc->pcie_sg_lookup); in _base_release_memory_pools()
5876 ioc->pcie_sg_lookup = NULL; in _base_release_memory_pools()
5878 if (ioc->config_page) { in _base_release_memory_pools()
5881 ioc->config_page)); in _base_release_memory_pools()
5882 dma_free_coherent(&ioc->pdev->dev, ioc->config_page_sz, in _base_release_memory_pools()
5883 ioc->config_page, ioc->config_page_dma); in _base_release_memory_pools()
5886 kfree(ioc->hpr_lookup); in _base_release_memory_pools()
5887 ioc->hpr_lookup = NULL; in _base_release_memory_pools()
5888 kfree(ioc->internal_lookup); in _base_release_memory_pools()
5889 ioc->internal_lookup = NULL; in _base_release_memory_pools()
5890 if (ioc->chain_lookup) { in _base_release_memory_pools()
5891 for (i = 0; i < ioc->scsiio_depth; i++) { in _base_release_memory_pools()
5892 for (j = ioc->chains_per_prp_buffer; in _base_release_memory_pools()
5893 j < ioc->chains_needed_per_io; j++) { in _base_release_memory_pools()
5894 ct = &ioc->chain_lookup[i].chains_per_smid[j]; in _base_release_memory_pools()
5895 if (ct && ct->chain_buffer) in _base_release_memory_pools()
5896 dma_pool_free(ioc->chain_dma_pool, in _base_release_memory_pools()
5897 ct->chain_buffer, in _base_release_memory_pools()
5898 ct->chain_buffer_dma); in _base_release_memory_pools()
5900 kfree(ioc->chain_lookup[i].chains_per_smid); in _base_release_memory_pools()
5902 dma_pool_destroy(ioc->chain_dma_pool); in _base_release_memory_pools()
5903 kfree(ioc->chain_lookup); in _base_release_memory_pools()
5904 ioc->chain_lookup = NULL; in _base_release_memory_pools()
5907 kfree(ioc->io_queue_num); in _base_release_memory_pools()
5908 ioc->io_queue_num = NULL; in _base_release_memory_pools()
5912 * mpt3sas_check_same_4gb_region - checks whether all reply queues in a set are
5925 end_address = start_address + pool_sz - 1; in mpt3sas_check_same_4gb_region()
5934 * _base_reduce_hba_queue_depth- Retry with reduced queue depth
5937 * Return: 0 for success, non-zero for failure.
5944 if ((ioc->hba_queue_depth - reduce_sz) > in _base_reduce_hba_queue_depth()
5945 (ioc->internal_depth + INTERNAL_SCSIIO_CMDS_COUNT)) { in _base_reduce_hba_queue_depth()
5946 ioc->hba_queue_depth -= reduce_sz; in _base_reduce_hba_queue_depth()
5949 return -ENOMEM; in _base_reduce_hba_queue_depth()
5953 * _base_allocate_pcie_sgl_pool - Allocating DMA'able memory
5954 * for pcie sgl pools.
5958 * Return: 0 for success, non-zero for failure.
5967 ioc->pcie_sgl_dma_pool = in _base_allocate_pcie_sgl_pool()
5968 dma_pool_create("PCIe SGL pool", &ioc->pdev->dev, sz, in _base_allocate_pcie_sgl_pool()
5969 ioc->page_size, 0); in _base_allocate_pcie_sgl_pool()
5970 if (!ioc->pcie_sgl_dma_pool) { in _base_allocate_pcie_sgl_pool()
5971 ioc_err(ioc, "PCIe SGL pool: dma_pool_create failed\n"); in _base_allocate_pcie_sgl_pool()
5972 return -ENOMEM; in _base_allocate_pcie_sgl_pool()
5975 ioc->chains_per_prp_buffer = sz/ioc->chain_segment_sz; in _base_allocate_pcie_sgl_pool()
5976 ioc->chains_per_prp_buffer = in _base_allocate_pcie_sgl_pool()
5977 min(ioc->chains_per_prp_buffer, ioc->chains_needed_per_io); in _base_allocate_pcie_sgl_pool()
5978 for (i = 0; i < ioc->scsiio_depth; i++) { in _base_allocate_pcie_sgl_pool()
5979 ioc->pcie_sg_lookup[i].pcie_sgl = in _base_allocate_pcie_sgl_pool()
5980 dma_pool_alloc(ioc->pcie_sgl_dma_pool, GFP_KERNEL, in _base_allocate_pcie_sgl_pool()
5981 &ioc->pcie_sg_lookup[i].pcie_sgl_dma); in _base_allocate_pcie_sgl_pool()
5982 if (!ioc->pcie_sg_lookup[i].pcie_sgl) { in _base_allocate_pcie_sgl_pool()
5983 ioc_err(ioc, "PCIe SGL pool: dma_pool_alloc failed\n"); in _base_allocate_pcie_sgl_pool()
5984 return -EAGAIN; in _base_allocate_pcie_sgl_pool()
5988 ioc->pcie_sg_lookup[i].pcie_sgl_dma, sz)) { in _base_allocate_pcie_sgl_pool()
5989 ioc_err(ioc, "PCIE SGLs are not in same 4G !! pcie sgl (0x%p) dma = (0x%llx)\n", in _base_allocate_pcie_sgl_pool()
5990 ioc->pcie_sg_lookup[i].pcie_sgl, in _base_allocate_pcie_sgl_pool()
5992 ioc->pcie_sg_lookup[i].pcie_sgl_dma); in _base_allocate_pcie_sgl_pool()
5993 ioc->use_32bit_dma = true; in _base_allocate_pcie_sgl_pool()
5994 return -EAGAIN; in _base_allocate_pcie_sgl_pool()
5997 for (j = 0; j < ioc->chains_per_prp_buffer; j++) { in _base_allocate_pcie_sgl_pool()
5998 ct = &ioc->chain_lookup[i].chains_per_smid[j]; in _base_allocate_pcie_sgl_pool()
5999 ct->chain_buffer = in _base_allocate_pcie_sgl_pool()
6000 ioc->pcie_sg_lookup[i].pcie_sgl + in _base_allocate_pcie_sgl_pool()
6001 (j * ioc->chain_segment_sz); in _base_allocate_pcie_sgl_pool()
6002 ct->chain_buffer_dma = in _base_allocate_pcie_sgl_pool()
6003 ioc->pcie_sg_lookup[i].pcie_sgl_dma + in _base_allocate_pcie_sgl_pool()
6004 (j * ioc->chain_segment_sz); in _base_allocate_pcie_sgl_pool()
6008 "PCIe sgl pool depth(%d), element_size(%d), pool_size(%d kB)\n", in _base_allocate_pcie_sgl_pool()
6009 ioc->scsiio_depth, sz, (sz * ioc->scsiio_depth)/1024)); in _base_allocate_pcie_sgl_pool()
6012 ioc->chains_per_prp_buffer)); in _base_allocate_pcie_sgl_pool()
6017 * _base_allocate_chain_dma_pool - Allocating DMA'able memory
6022 * Return: 0 for success, non-zero for failure.
6030 ioc->chain_dma_pool = dma_pool_create("chain pool", &ioc->pdev->dev, in _base_allocate_chain_dma_pool()
6031 ioc->chain_segment_sz, 16, 0); in _base_allocate_chain_dma_pool()
6032 if (!ioc->chain_dma_pool) in _base_allocate_chain_dma_pool()
6033 return -ENOMEM; in _base_allocate_chain_dma_pool()
6035 for (i = 0; i < ioc->scsiio_depth; i++) { in _base_allocate_chain_dma_pool()
6036 for (j = ioc->chains_per_prp_buffer; in _base_allocate_chain_dma_pool()
6037 j < ioc->chains_needed_per_io; j++) { in _base_allocate_chain_dma_pool()
6038 ctr = &ioc->chain_lookup[i].chains_per_smid[j]; in _base_allocate_chain_dma_pool()
6039 ctr->chain_buffer = dma_pool_alloc(ioc->chain_dma_pool, in _base_allocate_chain_dma_pool()
6040 GFP_KERNEL, &ctr->chain_buffer_dma); in _base_allocate_chain_dma_pool()
6041 if (!ctr->chain_buffer) in _base_allocate_chain_dma_pool()
6042 return -EAGAIN; in _base_allocate_chain_dma_pool()
6044 ctr->chain_buffer_dma, ioc->chain_segment_sz)) { in _base_allocate_chain_dma_pool()
6047 ctr->chain_buffer, in _base_allocate_chain_dma_pool()
6048 (unsigned long long)ctr->chain_buffer_dma); in _base_allocate_chain_dma_pool()
6049 ioc->use_32bit_dma = true; in _base_allocate_chain_dma_pool()
6050 return -EAGAIN; in _base_allocate_chain_dma_pool()
6056 ioc->scsiio_depth, ioc->chain_segment_sz, ((ioc->scsiio_depth * in _base_allocate_chain_dma_pool()
6057 (ioc->chains_needed_per_io - ioc->chains_per_prp_buffer) * in _base_allocate_chain_dma_pool()
6058 ioc->chain_segment_sz))/1024)); in _base_allocate_chain_dma_pool()
6063 * _base_allocate_sense_dma_pool - Allocating DMA'able memory
6067 * Return: 0 for success, non-zero for failure.
6072 ioc->sense_dma_pool = in _base_allocate_sense_dma_pool()
6073 dma_pool_create("sense pool", &ioc->pdev->dev, sz, 4, 0); in _base_allocate_sense_dma_pool()
6074 if (!ioc->sense_dma_pool) in _base_allocate_sense_dma_pool()
6075 return -ENOMEM; in _base_allocate_sense_dma_pool()
6076 ioc->sense = dma_pool_alloc(ioc->sense_dma_pool, in _base_allocate_sense_dma_pool()
6077 GFP_KERNEL, &ioc->sense_dma); in _base_allocate_sense_dma_pool()
6078 if (!ioc->sense) in _base_allocate_sense_dma_pool()
6079 return -EAGAIN; in _base_allocate_sense_dma_pool()
6080 if (!mpt3sas_check_same_4gb_region(ioc->sense_dma, sz)) { in _base_allocate_sense_dma_pool()
6083 ioc->sense, (unsigned long long) ioc->sense_dma)); in _base_allocate_sense_dma_pool()
6084 ioc->use_32bit_dma = true; in _base_allocate_sense_dma_pool()
6085 return -EAGAIN; in _base_allocate_sense_dma_pool()
6088 "sense pool(0x%p) - dma(0x%llx): depth(%d), element_size(%d), pool_size (%d kB)\n", in _base_allocate_sense_dma_pool()
6089 ioc->sense, (unsigned long long)ioc->sense_dma, in _base_allocate_sense_dma_pool()
6090 ioc->scsiio_depth, SCSI_SENSE_BUFFERSIZE, sz/1024); in _base_allocate_sense_dma_pool()
6095 * _base_allocate_reply_pool - Allocating DMA'able memory
6099 * Return: 0 for success, non-zero for failure.
6105 ioc->reply_dma_pool = dma_pool_create("reply pool", in _base_allocate_reply_pool()
6106 &ioc->pdev->dev, sz, 4, 0); in _base_allocate_reply_pool()
6107 if (!ioc->reply_dma_pool) in _base_allocate_reply_pool()
6108 return -ENOMEM; in _base_allocate_reply_pool()
6109 ioc->reply = dma_pool_alloc(ioc->reply_dma_pool, GFP_KERNEL, in _base_allocate_reply_pool()
6110 &ioc->reply_dma); in _base_allocate_reply_pool()
6111 if (!ioc->reply) in _base_allocate_reply_pool()
6112 return -EAGAIN; in _base_allocate_reply_pool()
6113 if (!mpt3sas_check_same_4gb_region(ioc->reply_dma, sz)) { in _base_allocate_reply_pool()
6116 ioc->reply, (unsigned long long) ioc->reply_dma)); in _base_allocate_reply_pool()
6117 ioc->use_32bit_dma = true; in _base_allocate_reply_pool()
6118 return -EAGAIN; in _base_allocate_reply_pool()
6120 ioc->reply_dma_min_address = (u32)(ioc->reply_dma); in _base_allocate_reply_pool()
6121 ioc->reply_dma_max_address = (u32)(ioc->reply_dma) + sz; in _base_allocate_reply_pool()
6123 "reply pool(0x%p) - dma(0x%llx): depth(%d), frame_size(%d), pool_size(%d kB)\n", in _base_allocate_reply_pool()
6124 ioc->reply, (unsigned long long)ioc->reply_dma, in _base_allocate_reply_pool()
6125 ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024); in _base_allocate_reply_pool()
6130 * _base_allocate_reply_free_dma_pool - Allocating DMA'able memory
6134 * Return: 0 for success, non-zero for failure.
6140 ioc->reply_free_dma_pool = dma_pool_create( in _base_allocate_reply_free_dma_pool()
6141 "reply_free pool", &ioc->pdev->dev, sz, 16, 0); in _base_allocate_reply_free_dma_pool()
6142 if (!ioc->reply_free_dma_pool) in _base_allocate_reply_free_dma_pool()
6143 return -ENOMEM; in _base_allocate_reply_free_dma_pool()
6144 ioc->reply_free = dma_pool_alloc(ioc->reply_free_dma_pool, in _base_allocate_reply_free_dma_pool()
6145 GFP_KERNEL, &ioc->reply_free_dma); in _base_allocate_reply_free_dma_pool()
6146 if (!ioc->reply_free) in _base_allocate_reply_free_dma_pool()
6147 return -EAGAIN; in _base_allocate_reply_free_dma_pool()
6148 if (!mpt3sas_check_same_4gb_region(ioc->reply_free_dma, sz)) { in _base_allocate_reply_free_dma_pool()
6151 ioc->reply_free, (unsigned long long) ioc->reply_free_dma)); in _base_allocate_reply_free_dma_pool()
6152 ioc->use_32bit_dma = true; in _base_allocate_reply_free_dma_pool()
6153 return -EAGAIN; in _base_allocate_reply_free_dma_pool()
6155 memset(ioc->reply_free, 0, sz); in _base_allocate_reply_free_dma_pool()
6158 ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024)); in _base_allocate_reply_free_dma_pool()
6161 (unsigned long long)ioc->reply_free_dma)); in _base_allocate_reply_free_dma_pool()
6166 * _base_allocate_reply_post_free_array - Allocating DMA'able memory
6170 * Return: 0 for success, non-zero for failure.
6177 ioc->reply_post_free_array_dma_pool = in _base_allocate_reply_post_free_array()
6179 &ioc->pdev->dev, reply_post_free_array_sz, 16, 0); in _base_allocate_reply_post_free_array()
6180 if (!ioc->reply_post_free_array_dma_pool) in _base_allocate_reply_post_free_array()
6181 return -ENOMEM; in _base_allocate_reply_post_free_array()
6182 ioc->reply_post_free_array = in _base_allocate_reply_post_free_array()
6183 dma_pool_alloc(ioc->reply_post_free_array_dma_pool, in _base_allocate_reply_post_free_array()
6184 GFP_KERNEL, &ioc->reply_post_free_array_dma); in _base_allocate_reply_post_free_array()
6185 if (!ioc->reply_post_free_array) in _base_allocate_reply_post_free_array()
6186 return -EAGAIN; in _base_allocate_reply_post_free_array()
6187 if (!mpt3sas_check_same_4gb_region(ioc->reply_post_free_array_dma, in _base_allocate_reply_post_free_array()
6191 ioc->reply_free, in _base_allocate_reply_post_free_array()
6192 (unsigned long long) ioc->reply_free_dma)); in _base_allocate_reply_post_free_array()
6193 ioc->use_32bit_dma = true; in _base_allocate_reply_post_free_array()
6194 return -EAGAIN; in _base_allocate_reply_post_free_array()
6199 * base_alloc_rdpq_dma_pool - Allocating DMA'able memory
6203 * Return: 0 for success, non-zero for failure.
6210 int reply_post_free_sz = ioc->reply_post_queue_depth * in base_alloc_rdpq_dma_pool()
6212 int count = ioc->rdpq_array_enable ? ioc->reply_queue_count : 1; in base_alloc_rdpq_dma_pool()
6214 ioc->reply_post = kcalloc(count, sizeof(struct reply_post_struct), in base_alloc_rdpq_dma_pool()
6216 if (!ioc->reply_post) in base_alloc_rdpq_dma_pool()
6217 return -ENOMEM; in base_alloc_rdpq_dma_pool()
6219 * For INVADER_SERIES each set of 8 reply queues(0-7, 8-15, ..) and in base_alloc_rdpq_dma_pool()
6220 * VENTURA_SERIES each set of 16 reply queues(0-15, 16-31, ..) should in base_alloc_rdpq_dma_pool()
6222 * upper 32-bits in their memory address. so here driver is allocating in base_alloc_rdpq_dma_pool()
6229 ioc->reply_post_free_dma_pool = in base_alloc_rdpq_dma_pool()
6231 &ioc->pdev->dev, sz, 16, 0); in base_alloc_rdpq_dma_pool()
6232 if (!ioc->reply_post_free_dma_pool) in base_alloc_rdpq_dma_pool()
6233 return -ENOMEM; in base_alloc_rdpq_dma_pool()
6236 ioc->reply_post[i].reply_post_free = in base_alloc_rdpq_dma_pool()
6237 dma_pool_zalloc(ioc->reply_post_free_dma_pool, in base_alloc_rdpq_dma_pool()
6239 &ioc->reply_post[i].reply_post_free_dma); in base_alloc_rdpq_dma_pool()
6240 if (!ioc->reply_post[i].reply_post_free) in base_alloc_rdpq_dma_pool()
6241 return -ENOMEM; in base_alloc_rdpq_dma_pool()
6252 ioc->reply_post[i].reply_post_free_dma, sz)) { in base_alloc_rdpq_dma_pool()
6256 ioc->reply_post[i].reply_post_free, in base_alloc_rdpq_dma_pool()
6258 ioc->reply_post[i].reply_post_free_dma)); in base_alloc_rdpq_dma_pool()
6259 return -EAGAIN; in base_alloc_rdpq_dma_pool()
6261 dma_alloc_count--; in base_alloc_rdpq_dma_pool()
6264 ioc->reply_post[i].reply_post_free = in base_alloc_rdpq_dma_pool()
6266 ((long)ioc->reply_post[i-1].reply_post_free in base_alloc_rdpq_dma_pool()
6268 ioc->reply_post[i].reply_post_free_dma = in base_alloc_rdpq_dma_pool()
6270 (ioc->reply_post[i-1].reply_post_free_dma + in base_alloc_rdpq_dma_pool()
6278 * _base_allocate_memory_pools - allocate start of day memory pools
6302 facts = &ioc->facts; in _base_allocate_memory_pools()
6305 if (max_sgl_entries != -1) in _base_allocate_memory_pools()
6308 if (ioc->hba_mpi_version_belonged == MPI2_VERSION) in _base_allocate_memory_pools()
6319 if (ioc->is_mcpu_endpoint) in _base_allocate_memory_pools()
6320 ioc->shost->sg_tablesize = MPT_MIN_PHYS_SEGMENTS; in _base_allocate_memory_pools()
6330 ioc->shost->sg_tablesize = sg_tablesize; in _base_allocate_memory_pools()
6333 ioc->internal_depth = min_t(int, (facts->HighPriorityCredit + (5)), in _base_allocate_memory_pools()
6334 (facts->RequestCredit / 4)); in _base_allocate_memory_pools()
6335 if (ioc->internal_depth < INTERNAL_CMDS_COUNT) { in _base_allocate_memory_pools()
6336 if (facts->RequestCredit <= (INTERNAL_CMDS_COUNT + in _base_allocate_memory_pools()
6339 facts->RequestCredit); in _base_allocate_memory_pools()
6340 return -ENOMEM; in _base_allocate_memory_pools()
6342 ioc->internal_depth = 10; in _base_allocate_memory_pools()
6345 ioc->hi_priority_depth = ioc->internal_depth - (5); in _base_allocate_memory_pools()
6347 if (max_queue_depth != -1 && max_queue_depth != 0) { in _base_allocate_memory_pools()
6349 ioc->internal_depth, facts->RequestCredit); in _base_allocate_memory_pools()
6353 max_request_credit = min_t(u16, facts->RequestCredit, in _base_allocate_memory_pools()
6354 (MPT3SAS_KDUMP_SCSI_IO_DEPTH + ioc->internal_depth)); in _base_allocate_memory_pools()
6356 max_request_credit = min_t(u16, facts->RequestCredit, in _base_allocate_memory_pools()
6359 /* Firmware maintains additional facts->HighPriorityCredit number of in _base_allocate_memory_pools()
6363 ioc->hba_queue_depth = max_request_credit + ioc->hi_priority_depth; in _base_allocate_memory_pools()
6366 ioc->request_sz = facts->IOCRequestFrameSize * 4; in _base_allocate_memory_pools()
6369 ioc->reply_sz = facts->ReplyFrameSize * 4; in _base_allocate_memory_pools()
6372 if (ioc->hba_mpi_version_belonged != MPI2_VERSION) { in _base_allocate_memory_pools()
6373 if (facts->IOCMaxChainSegmentSize) in _base_allocate_memory_pools()
6374 ioc->chain_segment_sz = in _base_allocate_memory_pools()
6375 facts->IOCMaxChainSegmentSize * in _base_allocate_memory_pools()
6379 ioc->chain_segment_sz = DEFAULT_NUM_FWCHAIN_ELEMTS * in _base_allocate_memory_pools()
6382 ioc->chain_segment_sz = ioc->request_sz; in _base_allocate_memory_pools()
6385 sge_size = max_t(u16, ioc->sge_size, ioc->sge_size_ieee); in _base_allocate_memory_pools()
6390 max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) - in _base_allocate_memory_pools()
6392 ioc->max_sges_in_main_message = max_sge_elements/sge_size; in _base_allocate_memory_pools()
6395 max_sge_elements = ioc->chain_segment_sz - sge_size; in _base_allocate_memory_pools()
6396 ioc->max_sges_in_chain_message = max_sge_elements/sge_size; in _base_allocate_memory_pools()
6401 chains_needed_per_io = ((ioc->shost->sg_tablesize - in _base_allocate_memory_pools()
6402 ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message) in _base_allocate_memory_pools()
6404 if (chains_needed_per_io > facts->MaxChainDepth) { in _base_allocate_memory_pools()
6405 chains_needed_per_io = facts->MaxChainDepth; in _base_allocate_memory_pools()
6406 ioc->shost->sg_tablesize = min_t(u16, in _base_allocate_memory_pools()
6407 ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message in _base_allocate_memory_pools()
6408 * chains_needed_per_io), ioc->shost->sg_tablesize); in _base_allocate_memory_pools()
6410 ioc->chains_needed_per_io = chains_needed_per_io; in _base_allocate_memory_pools()
6412 /* reply free queue sizing - taking into account for 64 FW events */ in _base_allocate_memory_pools()
6413 ioc->reply_free_queue_depth = ioc->hba_queue_depth + 64; in _base_allocate_memory_pools()
6416 if (ioc->is_mcpu_endpoint) in _base_allocate_memory_pools()
6417 ioc->reply_post_queue_depth = ioc->reply_free_queue_depth; in _base_allocate_memory_pools()
6420 ioc->reply_post_queue_depth = ioc->hba_queue_depth + in _base_allocate_memory_pools()
6421 ioc->reply_free_queue_depth + 1; in _base_allocate_memory_pools()
6423 if (ioc->reply_post_queue_depth % 16) in _base_allocate_memory_pools()
6424 ioc->reply_post_queue_depth += 16 - in _base_allocate_memory_pools()
6425 (ioc->reply_post_queue_depth % 16); in _base_allocate_memory_pools()
6428 if (ioc->reply_post_queue_depth > in _base_allocate_memory_pools()
6429 facts->MaxReplyDescriptorPostQueueDepth) { in _base_allocate_memory_pools()
6430 ioc->reply_post_queue_depth = in _base_allocate_memory_pools()
6431 facts->MaxReplyDescriptorPostQueueDepth - in _base_allocate_memory_pools()
6432 (facts->MaxReplyDescriptorPostQueueDepth % 16); in _base_allocate_memory_pools()
6433 ioc->hba_queue_depth = in _base_allocate_memory_pools()
6434 ((ioc->reply_post_queue_depth - 64) / 2) - 1; in _base_allocate_memory_pools()
6435 ioc->reply_free_queue_depth = ioc->hba_queue_depth + 64; in _base_allocate_memory_pools()
6441 ioc->max_sges_in_main_message, in _base_allocate_memory_pools()
6442 ioc->max_sges_in_chain_message, in _base_allocate_memory_pools()
6443 ioc->shost->sg_tablesize, in _base_allocate_memory_pools()
6444 ioc->chains_needed_per_io); in _base_allocate_memory_pools()
6447 reply_post_free_sz = ioc->reply_post_queue_depth * in _base_allocate_memory_pools()
6450 if ((_base_is_controller_msix_enabled(ioc) && !ioc->rdpq_array_enable) in _base_allocate_memory_pools()
6451 || (ioc->reply_queue_count < RDPQ_MAX_INDEX_IN_ONE_CHUNK)) in _base_allocate_memory_pools()
6452 rdpq_sz = reply_post_free_sz * ioc->reply_queue_count; in _base_allocate_memory_pools()
6454 if (ret == -EAGAIN) { in _base_allocate_memory_pools()
6460 ioc->use_32bit_dma = true; in _base_allocate_memory_pools()
6461 if (_base_config_dma_addressing(ioc, ioc->pdev) != 0) { in _base_allocate_memory_pools()
6463 "32 DMA mask failed %s\n", pci_name(ioc->pdev)); in _base_allocate_memory_pools()
6464 return -ENODEV; in _base_allocate_memory_pools()
6467 return -ENOMEM; in _base_allocate_memory_pools()
6468 } else if (ret == -ENOMEM) in _base_allocate_memory_pools()
6469 return -ENOMEM; in _base_allocate_memory_pools()
6470 total_sz = rdpq_sz * (!ioc->rdpq_array_enable ? 1 : in _base_allocate_memory_pools()
6471 DIV_ROUND_UP(ioc->reply_queue_count, RDPQ_MAX_INDEX_IN_ONE_CHUNK)); in _base_allocate_memory_pools()
6472 ioc->scsiio_depth = ioc->hba_queue_depth - in _base_allocate_memory_pools()
6473 ioc->hi_priority_depth - ioc->internal_depth; in _base_allocate_memory_pools()
6478 ioc->shost->can_queue = ioc->scsiio_depth - INTERNAL_SCSIIO_CMDS_COUNT; in _base_allocate_memory_pools()
6481 ioc->shost->can_queue)); in _base_allocate_memory_pools()
6486 ioc->chain_depth = ioc->chains_needed_per_io * ioc->scsiio_depth; in _base_allocate_memory_pools()
6487 sz = ((ioc->scsiio_depth + 1) * ioc->request_sz); in _base_allocate_memory_pools()
6489 /* hi-priority queue */ in _base_allocate_memory_pools()
6490 sz += (ioc->hi_priority_depth * ioc->request_sz); in _base_allocate_memory_pools()
6493 sz += (ioc->internal_depth * ioc->request_sz); in _base_allocate_memory_pools()
6495 ioc->request_dma_sz = sz; in _base_allocate_memory_pools()
6496 ioc->request = dma_alloc_coherent(&ioc->pdev->dev, sz, in _base_allocate_memory_pools()
6497 &ioc->request_dma, GFP_KERNEL); in _base_allocate_memory_pools()
6498 if (!ioc->request) { in _base_allocate_memory_pools()
6500 ioc->hba_queue_depth, ioc->chains_needed_per_io, in _base_allocate_memory_pools()
6501 ioc->request_sz, sz / 1024); in _base_allocate_memory_pools()
6502 if (ioc->scsiio_depth < MPT3SAS_SAS_QUEUE_DEPTH) in _base_allocate_memory_pools()
6505 ioc->hba_queue_depth -= retry_sz; in _base_allocate_memory_pools()
6512 ioc->hba_queue_depth, ioc->chains_needed_per_io, in _base_allocate_memory_pools()
6513 ioc->request_sz, sz / 1024); in _base_allocate_memory_pools()
6515 /* hi-priority queue */ in _base_allocate_memory_pools()
6516 ioc->hi_priority = ioc->request + ((ioc->scsiio_depth + 1) * in _base_allocate_memory_pools()
6517 ioc->request_sz); in _base_allocate_memory_pools()
6518 ioc->hi_priority_dma = ioc->request_dma + ((ioc->scsiio_depth + 1) * in _base_allocate_memory_pools()
6519 ioc->request_sz); in _base_allocate_memory_pools()
6522 ioc->internal = ioc->hi_priority + (ioc->hi_priority_depth * in _base_allocate_memory_pools()
6523 ioc->request_sz); in _base_allocate_memory_pools()
6524 ioc->internal_dma = ioc->hi_priority_dma + (ioc->hi_priority_depth * in _base_allocate_memory_pools()
6525 ioc->request_sz); in _base_allocate_memory_pools()
6528 "request pool(0x%p) - dma(0x%llx): " in _base_allocate_memory_pools()
6530 ioc->request, (unsigned long long) ioc->request_dma, in _base_allocate_memory_pools()
6531 ioc->hba_queue_depth, ioc->request_sz, in _base_allocate_memory_pools()
6532 (ioc->hba_queue_depth * ioc->request_sz) / 1024); in _base_allocate_memory_pools()
6538 ioc->request, ioc->scsiio_depth)); in _base_allocate_memory_pools()
6540 ioc->chain_depth = min_t(u32, ioc->chain_depth, MAX_CHAIN_DEPTH); in _base_allocate_memory_pools()
6541 sz = ioc->scsiio_depth * sizeof(struct chain_lookup); in _base_allocate_memory_pools()
6542 ioc->chain_lookup = kzalloc(sz, GFP_KERNEL); in _base_allocate_memory_pools()
6543 if (!ioc->chain_lookup) { in _base_allocate_memory_pools()
6548 sz = ioc->chains_needed_per_io * sizeof(struct chain_tracker); in _base_allocate_memory_pools()
6549 for (i = 0; i < ioc->scsiio_depth; i++) { in _base_allocate_memory_pools()
6550 ioc->chain_lookup[i].chains_per_smid = kzalloc(sz, GFP_KERNEL); in _base_allocate_memory_pools()
6551 if (!ioc->chain_lookup[i].chains_per_smid) { in _base_allocate_memory_pools()
6557 /* initialize hi-priority queue smid's */ in _base_allocate_memory_pools()
6558 ioc->hpr_lookup = kcalloc(ioc->hi_priority_depth, in _base_allocate_memory_pools()
6560 if (!ioc->hpr_lookup) { in _base_allocate_memory_pools()
6564 ioc->hi_priority_smid = ioc->scsiio_depth + 1; in _base_allocate_memory_pools()
6567 ioc->hi_priority, in _base_allocate_memory_pools()
6568 ioc->hi_priority_depth, ioc->hi_priority_smid)); in _base_allocate_memory_pools()
6571 ioc->internal_lookup = kcalloc(ioc->internal_depth, in _base_allocate_memory_pools()
6573 if (!ioc->internal_lookup) { in _base_allocate_memory_pools()
6577 ioc->internal_smid = ioc->hi_priority_smid + ioc->hi_priority_depth; in _base_allocate_memory_pools()
6580 ioc->internal, in _base_allocate_memory_pools()
6581 ioc->internal_depth, ioc->internal_smid)); in _base_allocate_memory_pools()
6583 ioc->io_queue_num = kcalloc(ioc->scsiio_depth, in _base_allocate_memory_pools()
6585 if (!ioc->io_queue_num) in _base_allocate_memory_pools()
6589 * (((sg_tablesize * 8) - 1) / (page_size - 8)) + 1 in _base_allocate_memory_pools()
6590 * ((sg_tablesize * 8) - 1) is the max PRP's minus the first PRP entry in _base_allocate_memory_pools()
6601 ioc->chains_per_prp_buffer = 0; in _base_allocate_memory_pools()
6602 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_NVME_DEVICES) { in _base_allocate_memory_pools()
6604 (ioc->shost->sg_tablesize * NVME_PRP_SIZE) - 1; in _base_allocate_memory_pools()
6605 nvme_blocks_needed /= (ioc->page_size - NVME_PRP_SIZE); in _base_allocate_memory_pools()
6608 sz = sizeof(struct pcie_sg_list) * ioc->scsiio_depth; in _base_allocate_memory_pools()
6609 ioc->pcie_sg_lookup = kzalloc(sz, GFP_KERNEL); in _base_allocate_memory_pools()
6610 if (!ioc->pcie_sg_lookup) { in _base_allocate_memory_pools()
6611 ioc_info(ioc, "PCIe SGL lookup: kzalloc failed\n"); in _base_allocate_memory_pools()
6614 sz = nvme_blocks_needed * ioc->page_size; in _base_allocate_memory_pools()
6616 if (rc == -ENOMEM) in _base_allocate_memory_pools()
6617 return -ENOMEM; in _base_allocate_memory_pools()
6618 else if (rc == -EAGAIN) in _base_allocate_memory_pools()
6620 total_sz += sz * ioc->scsiio_depth; in _base_allocate_memory_pools()
6623 rc = _base_allocate_chain_dma_pool(ioc, ioc->chain_segment_sz); in _base_allocate_memory_pools()
6624 if (rc == -ENOMEM) in _base_allocate_memory_pools()
6625 return -ENOMEM; in _base_allocate_memory_pools()
6626 else if (rc == -EAGAIN) in _base_allocate_memory_pools()
6628 total_sz += ioc->chain_segment_sz * ((ioc->chains_needed_per_io - in _base_allocate_memory_pools()
6629 ioc->chains_per_prp_buffer) * ioc->scsiio_depth); in _base_allocate_memory_pools()
6632 ioc->chain_depth, ioc->chain_segment_sz, in _base_allocate_memory_pools()
6633 (ioc->chain_depth * ioc->chain_segment_sz) / 1024)); in _base_allocate_memory_pools()
6635 sense_sz = ioc->scsiio_depth * SCSI_SENSE_BUFFERSIZE; in _base_allocate_memory_pools()
6637 if (rc == -ENOMEM) in _base_allocate_memory_pools()
6638 return -ENOMEM; in _base_allocate_memory_pools()
6639 else if (rc == -EAGAIN) in _base_allocate_memory_pools()
6643 sz = ioc->reply_free_queue_depth * ioc->reply_sz; in _base_allocate_memory_pools()
6645 if (rc == -ENOMEM) in _base_allocate_memory_pools()
6646 return -ENOMEM; in _base_allocate_memory_pools()
6647 else if (rc == -EAGAIN) in _base_allocate_memory_pools()
6652 sz = ioc->reply_free_queue_depth * 4; in _base_allocate_memory_pools()
6654 if (rc == -ENOMEM) in _base_allocate_memory_pools()
6655 return -ENOMEM; in _base_allocate_memory_pools()
6656 else if (rc == -EAGAIN) in _base_allocate_memory_pools()
6660 (unsigned long long)ioc->reply_free_dma)); in _base_allocate_memory_pools()
6662 if (ioc->rdpq_array_enable) { in _base_allocate_memory_pools()
6663 reply_post_free_array_sz = ioc->reply_queue_count * in _base_allocate_memory_pools()
6667 if (rc == -ENOMEM) in _base_allocate_memory_pools()
6668 return -ENOMEM; in _base_allocate_memory_pools()
6669 else if (rc == -EAGAIN) in _base_allocate_memory_pools()
6672 ioc->config_page_sz = 512; in _base_allocate_memory_pools()
6673 ioc->config_page = dma_alloc_coherent(&ioc->pdev->dev, in _base_allocate_memory_pools()
6674 ioc->config_page_sz, &ioc->config_page_dma, GFP_KERNEL); in _base_allocate_memory_pools()
6675 if (!ioc->config_page) { in _base_allocate_memory_pools()
6680 ioc_info(ioc, "config page(0x%p) - dma(0x%llx): size(%d)\n", in _base_allocate_memory_pools()
6681 ioc->config_page, (unsigned long long)ioc->config_page_dma, in _base_allocate_memory_pools()
6682 ioc->config_page_sz); in _base_allocate_memory_pools()
6683 total_sz += ioc->config_page_sz; in _base_allocate_memory_pools()
6688 ioc->shost->can_queue, facts->RequestCredit); in _base_allocate_memory_pools()
6690 ioc->shost->sg_tablesize); in _base_allocate_memory_pools()
6695 if (ioc->use_32bit_dma && (ioc->dma_mask > 32)) { in _base_allocate_memory_pools()
6697 if (_base_config_dma_addressing(ioc, ioc->pdev) != 0) { in _base_allocate_memory_pools()
6699 pci_name(ioc->pdev)); in _base_allocate_memory_pools()
6700 return -ENODEV; in _base_allocate_memory_pools()
6703 return -ENOMEM; in _base_allocate_memory_pools()
6707 return -ENOMEM; in _base_allocate_memory_pools()
6711 * mpt3sas_base_get_iocstate - Get the current state of a MPT adapter.
6723 s = ioc->base_readl_ext_retry(&ioc->chip->Doorbell); in mpt3sas_base_get_iocstate()
6729 * _base_wait_on_iocstate - waiting on a particular ioc state
6734 * Return: 0 for success, non-zero for failure.
6755 } while (--cntdn); in _base_wait_on_iocstate()
6761 * _base_dump_reg_set - This function will print hexdump of register set.
6770 u32 __iomem *reg = (u32 __iomem *)ioc->chip; in _base_dump_reg_set()
6778 * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by
6783 * Return: 0 for success, non-zero for failure.
6785 * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell.
6797 int_status = ioc->base_readl(&ioc->chip->HostInterruptStatus); in _base_wait_for_doorbell_int()
6807 } while (--cntdn); in _base_wait_for_doorbell_int()
6811 return -EFAULT; in _base_wait_for_doorbell_int()
6823 int_status = ioc->base_readl(&ioc->chip->HostInterruptStatus); in _base_spin_on_doorbell_int()
6833 } while (--cntdn); in _base_spin_on_doorbell_int()
6837 return -EFAULT; in _base_spin_on_doorbell_int()
6842 * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell.
6846 * Return: 0 for success, non-zero for failure.
6848 * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to
6861 int_status = ioc->base_readl(&ioc->chip->HostInterruptStatus); in _base_wait_for_doorbell_ack()
6868 doorbell = ioc->base_readl_ext_retry(&ioc->chip->Doorbell); in _base_wait_for_doorbell_ack()
6872 return -EFAULT; in _base_wait_for_doorbell_ack()
6877 return -EFAULT; in _base_wait_for_doorbell_ack()
6884 } while (--cntdn); in _base_wait_for_doorbell_ack()
6889 return -EFAULT; in _base_wait_for_doorbell_ack()
6893 * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use
6897 * Return: 0 for success, non-zero for failure.
6908 doorbell_reg = ioc->base_readl_ext_retry(&ioc->chip->Doorbell); in _base_wait_for_doorbell_not_used()
6918 } while (--cntdn); in _base_wait_for_doorbell_not_used()
6922 return -EFAULT; in _base_wait_for_doorbell_not_used()
6926 * _base_send_ioc_reset - send doorbell reset
6931 * Return: 0 for success, non-zero for failure.
6942 return -EFAULT; in _base_send_ioc_reset()
6945 if (!(ioc->facts.IOCCapabilities & in _base_send_ioc_reset()
6947 return -EFAULT; in _base_send_ioc_reset()
6952 &ioc->chip->Doorbell); in _base_send_ioc_reset()
6954 r = -EFAULT; in _base_send_ioc_reset()
6962 r = -EFAULT; in _base_send_ioc_reset()
6968 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); in _base_send_ioc_reset()
6974 MPI2_IOC_STATE_COREDUMP && (ioc->is_driver_loading == 1 || in _base_send_ioc_reset()
6975 ioc->fault_reset_work_q == NULL)) { in _base_send_ioc_reset()
6977 &ioc->ioc_reset_in_progress_lock, flags); in _base_send_ioc_reset()
6982 &ioc->ioc_reset_in_progress_lock, flags); in _base_send_ioc_reset()
6984 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); in _base_send_ioc_reset()
6992 * mpt3sas_wait_for_ioc - IOC's operational state is checked here.
6998 * and operational; otherwise returns %-EFAULT.
7019 if (ioc->is_driver_loading) in mpt3sas_wait_for_ioc()
7020 return -ETIME; in mpt3sas_wait_for_ioc()
7025 } while (--timeout); in mpt3sas_wait_for_ioc()
7028 return -EFAULT; in mpt3sas_wait_for_ioc()
7036 * _base_handshake_req_reply_wait - send request thru doorbell interface
7044 * Return: 0 for success, non-zero for failure.
7057 if ((ioc->base_readl_ext_retry(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) { in _base_handshake_req_reply_wait()
7063 if (ioc->base_readl(&ioc->chip->HostInterruptStatus) & in _base_handshake_req_reply_wait()
7065 writel(0, &ioc->chip->HostInterruptStatus); in _base_handshake_req_reply_wait()
7070 &ioc->chip->Doorbell); in _base_handshake_req_reply_wait()
7075 return -EFAULT; in _base_handshake_req_reply_wait()
7077 writel(0, &ioc->chip->HostInterruptStatus); in _base_handshake_req_reply_wait()
7082 return -EFAULT; in _base_handshake_req_reply_wait()
7085 /* send message 32-bits at a time */ in _base_handshake_req_reply_wait()
7087 writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell); in _base_handshake_req_reply_wait()
7095 return -EFAULT; in _base_handshake_req_reply_wait()
7102 return -EFAULT; in _base_handshake_req_reply_wait()
7105 /* read the first two 16-bits, it gives the total length of the reply */ in _base_handshake_req_reply_wait()
7106 reply[0] = le16_to_cpu(ioc->base_readl_ext_retry(&ioc->chip->Doorbell) in _base_handshake_req_reply_wait()
7108 writel(0, &ioc->chip->HostInterruptStatus); in _base_handshake_req_reply_wait()
7112 return -EFAULT; in _base_handshake_req_reply_wait()
7114 reply[1] = le16_to_cpu(ioc->base_readl_ext_retry(&ioc->chip->Doorbell) in _base_handshake_req_reply_wait()
7116 writel(0, &ioc->chip->HostInterruptStatus); in _base_handshake_req_reply_wait()
7118 for (i = 2; i < default_reply->MsgLength * 2; i++) { in _base_handshake_req_reply_wait()
7122 return -EFAULT; in _base_handshake_req_reply_wait()
7125 ioc->base_readl_ext_retry(&ioc->chip->Doorbell); in _base_handshake_req_reply_wait()
7128 ioc->base_readl_ext_retry(&ioc->chip->Doorbell) in _base_handshake_req_reply_wait()
7130 writel(0, &ioc->chip->HostInterruptStatus); in _base_handshake_req_reply_wait()
7139 writel(0, &ioc->chip->HostInterruptStatus); in _base_handshake_req_reply_wait()
7141 if (ioc->logging_level & MPT_DEBUG_INIT) { in _base_handshake_req_reply_wait()
7156 * mpt3sas_base_sas_iounit_control - send sas iounit control to FW
7161 * The SAS IO Unit Control Request message allows the host to perform low-level
7167 * Return: 0 for success, non-zero for failure.
7181 mutex_lock(&ioc->base_cmds.mutex); in mpt3sas_base_sas_iounit_control()
7183 if (ioc->base_cmds.status != MPT3_CMD_NOT_USED) { in mpt3sas_base_sas_iounit_control()
7185 rc = -EAGAIN; in mpt3sas_base_sas_iounit_control()
7193 smid = mpt3sas_base_get_smid(ioc, ioc->base_cb_idx); in mpt3sas_base_sas_iounit_control()
7196 rc = -EAGAIN; in mpt3sas_base_sas_iounit_control()
7201 ioc->base_cmds.status = MPT3_CMD_PENDING; in mpt3sas_base_sas_iounit_control()
7203 ioc->base_cmds.smid = smid; in mpt3sas_base_sas_iounit_control()
7205 if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET || in mpt3sas_base_sas_iounit_control()
7206 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) in mpt3sas_base_sas_iounit_control()
7207 ioc->ioc_link_reset_in_progress = 1; in mpt3sas_base_sas_iounit_control()
7208 init_completion(&ioc->base_cmds.done); in mpt3sas_base_sas_iounit_control()
7209 ioc->put_smid_default(ioc, smid); in mpt3sas_base_sas_iounit_control()
7210 wait_for_completion_timeout(&ioc->base_cmds.done, in mpt3sas_base_sas_iounit_control()
7212 if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET || in mpt3sas_base_sas_iounit_control()
7213 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) && in mpt3sas_base_sas_iounit_control()
7214 ioc->ioc_link_reset_in_progress) in mpt3sas_base_sas_iounit_control()
7215 ioc->ioc_link_reset_in_progress = 0; in mpt3sas_base_sas_iounit_control()
7216 if (!(ioc->base_cmds.status & MPT3_CMD_COMPLETE)) { in mpt3sas_base_sas_iounit_control()
7217 mpt3sas_check_cmd_timeout(ioc, ioc->base_cmds.status, in mpt3sas_base_sas_iounit_control()
7222 if (ioc->base_cmds.status & MPT3_CMD_REPLY_VALID) in mpt3sas_base_sas_iounit_control()
7223 memcpy(mpi_reply, ioc->base_cmds.reply, in mpt3sas_base_sas_iounit_control()
7227 ioc->base_cmds.status = MPT3_CMD_NOT_USED; in mpt3sas_base_sas_iounit_control()
7233 ioc->base_cmds.status = MPT3_CMD_NOT_USED; in mpt3sas_base_sas_iounit_control()
7234 rc = -EFAULT; in mpt3sas_base_sas_iounit_control()
7236 mutex_unlock(&ioc->base_cmds.mutex); in mpt3sas_base_sas_iounit_control()
7241 * mpt3sas_base_scsi_enclosure_processor - sending request to sep device
7249 * Return: 0 for success, non-zero for failure.
7262 mutex_lock(&ioc->base_cmds.mutex); in mpt3sas_base_scsi_enclosure_processor()
7264 if (ioc->base_cmds.status != MPT3_CMD_NOT_USED) { in mpt3sas_base_scsi_enclosure_processor()
7266 rc = -EAGAIN; in mpt3sas_base_scsi_enclosure_processor()
7274 smid = mpt3sas_base_get_smid(ioc, ioc->base_cb_idx); in mpt3sas_base_scsi_enclosure_processor()
7277 rc = -EAGAIN; in mpt3sas_base_scsi_enclosure_processor()
7282 ioc->base_cmds.status = MPT3_CMD_PENDING; in mpt3sas_base_scsi_enclosure_processor()
7284 ioc->base_cmds.smid = smid; in mpt3sas_base_scsi_enclosure_processor()
7285 memset(request, 0, ioc->request_sz); in mpt3sas_base_scsi_enclosure_processor()
7287 init_completion(&ioc->base_cmds.done); in mpt3sas_base_scsi_enclosure_processor()
7288 ioc->put_smid_default(ioc, smid); in mpt3sas_base_scsi_enclosure_processor()
7289 wait_for_completion_timeout(&ioc->base_cmds.done, in mpt3sas_base_scsi_enclosure_processor()
7291 if (!(ioc->base_cmds.status & MPT3_CMD_COMPLETE)) { in mpt3sas_base_scsi_enclosure_processor()
7293 ioc->base_cmds.status, mpi_request, in mpt3sas_base_scsi_enclosure_processor()
7297 if (ioc->base_cmds.status & MPT3_CMD_REPLY_VALID) in mpt3sas_base_scsi_enclosure_processor()
7298 memcpy(mpi_reply, ioc->base_cmds.reply, in mpt3sas_base_scsi_enclosure_processor()
7302 ioc->base_cmds.status = MPT3_CMD_NOT_USED; in mpt3sas_base_scsi_enclosure_processor()
7308 ioc->base_cmds.status = MPT3_CMD_NOT_USED; in mpt3sas_base_scsi_enclosure_processor()
7309 rc = -EFAULT; in mpt3sas_base_scsi_enclosure_processor()
7311 mutex_unlock(&ioc->base_cmds.mutex); in mpt3sas_base_scsi_enclosure_processor()
7316 * _base_get_port_facts - obtain port facts reply and save in ioc
7320 * Return: 0 for success, non-zero for failure.
7345 pfacts = &ioc->pfacts[port]; in _base_get_port_facts()
7347 pfacts->PortNumber = mpi_reply.PortNumber; in _base_get_port_facts()
7348 pfacts->VP_ID = mpi_reply.VP_ID; in _base_get_port_facts()
7349 pfacts->VF_ID = mpi_reply.VF_ID; in _base_get_port_facts()
7350 pfacts->MaxPostedCmdBuffers = in _base_get_port_facts()
7357 * _base_wait_for_iocstate - Wait until the card is in READY or OPERATIONAL
7361 * Return: 0 for success, non-zero for failure.
7371 if (ioc->pci_error_recovery) { in _base_wait_for_iocstate()
7375 return -EFAULT; in _base_wait_for_iocstate()
7401 return -EFAULT; in _base_wait_for_iocstate()
7409 return -EFAULT; in _base_wait_for_iocstate()
7420 * _base_get_ioc_facts - obtain ioc facts reply and save in ioc
7423 * Return: 0 for success, non-zero for failure.
7454 facts = &ioc->facts; in _base_get_ioc_facts()
7456 facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion); in _base_get_ioc_facts()
7457 facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion); in _base_get_ioc_facts()
7458 facts->VP_ID = mpi_reply.VP_ID; in _base_get_ioc_facts()
7459 facts->VF_ID = mpi_reply.VF_ID; in _base_get_ioc_facts()
7460 facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions); in _base_get_ioc_facts()
7461 facts->MaxChainDepth = mpi_reply.MaxChainDepth; in _base_get_ioc_facts()
7462 facts->WhoInit = mpi_reply.WhoInit; in _base_get_ioc_facts()
7463 facts->NumberOfPorts = mpi_reply.NumberOfPorts; in _base_get_ioc_facts()
7464 facts->MaxMSIxVectors = mpi_reply.MaxMSIxVectors; in _base_get_ioc_facts()
7465 if (ioc->msix_enable && (facts->MaxMSIxVectors <= in _base_get_ioc_facts()
7466 MAX_COMBINED_MSIX_VECTORS(ioc->is_gen35_ioc))) in _base_get_ioc_facts()
7467 ioc->combined_reply_queue = 0; in _base_get_ioc_facts()
7468 facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit); in _base_get_ioc_facts()
7469 facts->MaxReplyDescriptorPostQueueDepth = in _base_get_ioc_facts()
7471 facts->ProductID = le16_to_cpu(mpi_reply.ProductID); in _base_get_ioc_facts()
7472 facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities); in _base_get_ioc_facts()
7473 if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID)) in _base_get_ioc_facts()
7474 ioc->ir_firmware = 1; in _base_get_ioc_facts()
7475 if ((facts->IOCCapabilities & in _base_get_ioc_facts()
7477 ioc->rdpq_array_capable = 1; in _base_get_ioc_facts()
7478 if ((facts->IOCCapabilities & MPI26_IOCFACTS_CAPABILITY_ATOMIC_REQ) in _base_get_ioc_facts()
7479 && ioc->is_aero_ioc) in _base_get_ioc_facts()
7480 ioc->atomic_desc_capable = 1; in _base_get_ioc_facts()
7481 facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word); in _base_get_ioc_facts()
7482 facts->IOCRequestFrameSize = in _base_get_ioc_facts()
7484 if (ioc->hba_mpi_version_belonged != MPI2_VERSION) { in _base_get_ioc_facts()
7485 facts->IOCMaxChainSegmentSize = in _base_get_ioc_facts()
7488 facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators); in _base_get_ioc_facts()
7489 facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets); in _base_get_ioc_facts()
7490 ioc->shost->max_id = -1; in _base_get_ioc_facts()
7491 facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders); in _base_get_ioc_facts()
7492 facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures); in _base_get_ioc_facts()
7493 facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags); in _base_get_ioc_facts()
7494 facts->HighPriorityCredit = in _base_get_ioc_facts()
7496 facts->ReplyFrameSize = mpi_reply.ReplyFrameSize; in _base_get_ioc_facts()
7497 facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle); in _base_get_ioc_facts()
7498 facts->CurrentHostPageSize = mpi_reply.CurrentHostPageSize; in _base_get_ioc_facts()
7503 ioc->page_size = 1 << facts->CurrentHostPageSize; in _base_get_ioc_facts()
7504 if (ioc->page_size == 1) { in _base_get_ioc_facts()
7506 ioc->page_size = 1 << MPT3SAS_HOST_PAGE_SIZE_4K; in _base_get_ioc_facts()
7510 facts->CurrentHostPageSize)); in _base_get_ioc_facts()
7514 facts->RequestCredit, facts->MaxChainDepth)); in _base_get_ioc_facts()
7517 facts->IOCRequestFrameSize * 4, in _base_get_ioc_facts()
7518 facts->ReplyFrameSize * 4)); in _base_get_ioc_facts()
7523 * _base_send_ioc_init - send ioc_init to firmware
7526 * Return: 0 for success, non-zero for failure.
7545 mpi_request.MsgVersion = cpu_to_le16(ioc->hba_mpi_version_belonged); in _base_send_ioc_init()
7550 mpi_request.HostMSIxVectors = ioc->reply_queue_count; in _base_send_ioc_init()
7551 mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4); in _base_send_ioc_init()
7553 cpu_to_le16(ioc->reply_post_queue_depth); in _base_send_ioc_init()
7555 cpu_to_le16(ioc->reply_free_queue_depth); in _base_send_ioc_init()
7558 cpu_to_le32((u64)ioc->sense_dma >> 32); in _base_send_ioc_init()
7560 cpu_to_le32((u64)ioc->reply_dma >> 32); in _base_send_ioc_init()
7562 cpu_to_le64((u64)ioc->request_dma); in _base_send_ioc_init()
7564 cpu_to_le64((u64)ioc->reply_free_dma); in _base_send_ioc_init()
7566 if (ioc->rdpq_array_enable) { in _base_send_ioc_init()
7567 reply_post_free_array_sz = ioc->reply_queue_count * in _base_send_ioc_init()
7569 memset(ioc->reply_post_free_array, 0, reply_post_free_array_sz); in _base_send_ioc_init()
7570 for (i = 0; i < ioc->reply_queue_count; i++) in _base_send_ioc_init()
7571 ioc->reply_post_free_array[i].RDPQBaseAddress = in _base_send_ioc_init()
7573 (u64)ioc->reply_post[i].reply_post_free_dma); in _base_send_ioc_init()
7576 cpu_to_le64((u64)ioc->reply_post_free_array_dma); in _base_send_ioc_init()
7579 cpu_to_le64((u64)ioc->reply_post[0].reply_post_free_dma); in _base_send_ioc_init()
7594 if (ioc->logging_level & MPT_DEBUG_INIT) { in _base_send_ioc_init()
7618 r = -EIO; in _base_send_ioc_init()
7622 ioc->timestamp_update_count = 0; in _base_send_ioc_init()
7627 * mpt3sas_port_enable_done - command completion routine for port enable
7643 if (ioc->port_enable_cmds.status == MPT3_CMD_NOT_USED) in mpt3sas_port_enable_done()
7650 if (mpi_reply->Function != MPI2_FUNCTION_PORT_ENABLE) in mpt3sas_port_enable_done()
7653 ioc->port_enable_cmds.status &= ~MPT3_CMD_PENDING; in mpt3sas_port_enable_done()
7654 ioc->port_enable_cmds.status |= MPT3_CMD_COMPLETE; in mpt3sas_port_enable_done()
7655 ioc->port_enable_cmds.status |= MPT3_CMD_REPLY_VALID; in mpt3sas_port_enable_done()
7656 memcpy(ioc->port_enable_cmds.reply, mpi_reply, mpi_reply->MsgLength*4); in mpt3sas_port_enable_done()
7657 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK; in mpt3sas_port_enable_done()
7659 ioc->port_enable_failed = 1; in mpt3sas_port_enable_done()
7661 if (ioc->port_enable_cmds.status & MPT3_CMD_COMPLETE_ASYNC) { in mpt3sas_port_enable_done()
7662 ioc->port_enable_cmds.status &= ~MPT3_CMD_COMPLETE_ASYNC; in mpt3sas_port_enable_done()
7667 ioc->start_scan_failed = ioc_status; in mpt3sas_port_enable_done()
7668 ioc->start_scan = 0; in mpt3sas_port_enable_done()
7672 complete(&ioc->port_enable_cmds.done); in mpt3sas_port_enable_done()
7677 * _base_send_port_enable - send port_enable(discovery stuff) to firmware
7680 * Return: 0 for success, non-zero for failure.
7693 if (ioc->port_enable_cmds.status & MPT3_CMD_PENDING) { in _base_send_port_enable()
7695 return -EAGAIN; in _base_send_port_enable()
7698 smid = mpt3sas_base_get_smid(ioc, ioc->port_enable_cb_idx); in _base_send_port_enable()
7701 return -EAGAIN; in _base_send_port_enable()
7704 ioc->port_enable_cmds.status = MPT3_CMD_PENDING; in _base_send_port_enable()
7706 ioc->port_enable_cmds.smid = smid; in _base_send_port_enable()
7708 mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE; in _base_send_port_enable()
7710 init_completion(&ioc->port_enable_cmds.done); in _base_send_port_enable()
7711 ioc->put_smid_default(ioc, smid); in _base_send_port_enable()
7712 wait_for_completion_timeout(&ioc->port_enable_cmds.done, 300*HZ); in _base_send_port_enable()
7713 if (!(ioc->port_enable_cmds.status & MPT3_CMD_COMPLETE)) { in _base_send_port_enable()
7717 if (ioc->port_enable_cmds.status & MPT3_CMD_RESET) in _base_send_port_enable()
7718 r = -EFAULT; in _base_send_port_enable()
7720 r = -ETIME; in _base_send_port_enable()
7724 mpi_reply = ioc->port_enable_cmds.reply; in _base_send_port_enable()
7725 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK; in _base_send_port_enable()
7729 r = -EFAULT; in _base_send_port_enable()
7734 ioc->port_enable_cmds.status = MPT3_CMD_NOT_USED; in _base_send_port_enable()
7740 * mpt3sas_port_enable - initiate firmware discovery (don't wait for reply)
7743 * Return: 0 for success, non-zero for failure.
7753 if (ioc->port_enable_cmds.status & MPT3_CMD_PENDING) { in mpt3sas_port_enable()
7755 return -EAGAIN; in mpt3sas_port_enable()
7758 smid = mpt3sas_base_get_smid(ioc, ioc->port_enable_cb_idx); in mpt3sas_port_enable()
7761 return -EAGAIN; in mpt3sas_port_enable()
7763 ioc->drv_internal_flags |= MPT_DRV_INTERNAL_FIRST_PE_ISSUED; in mpt3sas_port_enable()
7764 ioc->port_enable_cmds.status = MPT3_CMD_PENDING; in mpt3sas_port_enable()
7765 ioc->port_enable_cmds.status |= MPT3_CMD_COMPLETE_ASYNC; in mpt3sas_port_enable()
7767 ioc->port_enable_cmds.smid = smid; in mpt3sas_port_enable()
7769 mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE; in mpt3sas_port_enable()
7771 ioc->put_smid_default(ioc, smid); in mpt3sas_port_enable()
7776 * _base_determine_wait_on_discovery - desposition
7789 * turn on the bit in ioc->pd_handles to indicate PD in _base_determine_wait_on_discovery()
7793 if (ioc->ir_firmware) in _base_determine_wait_on_discovery()
7797 if (!ioc->bios_pg3.BiosVersion) in _base_determine_wait_on_discovery()
7807 if ((ioc->bios_pg2.CurrentBootDeviceForm & in _base_determine_wait_on_discovery()
7811 (ioc->bios_pg2.ReqBootDeviceForm & in _base_determine_wait_on_discovery()
7815 (ioc->bios_pg2.ReqAltBootDeviceForm & in _base_determine_wait_on_discovery()
7824 * _base_unmask_events - turn on notification for this event
7828 * The mask is stored in ioc->event_masks.
7841 ioc->event_masks[0] &= ~desired_event; in _base_unmask_events()
7843 ioc->event_masks[1] &= ~desired_event; in _base_unmask_events()
7845 ioc->event_masks[2] &= ~desired_event; in _base_unmask_events()
7847 ioc->event_masks[3] &= ~desired_event; in _base_unmask_events()
7851 * _base_event_notification - send event notification
7854 * Return: 0 for success, non-zero for failure.
7866 if (ioc->base_cmds.status & MPT3_CMD_PENDING) { in _base_event_notification()
7868 return -EAGAIN; in _base_event_notification()
7871 smid = mpt3sas_base_get_smid(ioc, ioc->base_cb_idx); in _base_event_notification()
7874 return -EAGAIN; in _base_event_notification()
7876 ioc->base_cmds.status = MPT3_CMD_PENDING; in _base_event_notification()
7878 ioc->base_cmds.smid = smid; in _base_event_notification()
7880 mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION; in _base_event_notification()
7881 mpi_request->VF_ID = 0; /* TODO */ in _base_event_notification()
7882 mpi_request->VP_ID = 0; in _base_event_notification()
7884 mpi_request->EventMasks[i] = in _base_event_notification()
7885 cpu_to_le32(ioc->event_masks[i]); in _base_event_notification()
7886 init_completion(&ioc->base_cmds.done); in _base_event_notification()
7887 ioc->put_smid_default(ioc, smid); in _base_event_notification()
7888 wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ); in _base_event_notification()
7889 if (!(ioc->base_cmds.status & MPT3_CMD_COMPLETE)) { in _base_event_notification()
7893 if (ioc->base_cmds.status & MPT3_CMD_RESET) in _base_event_notification()
7894 r = -EFAULT; in _base_event_notification()
7900 ioc->base_cmds.status = MPT3_CMD_NOT_USED; in _base_event_notification()
7903 if (ioc->drv_internal_flags & MPT_DRV_INTERNAL_FIRST_PE_ISSUED) in _base_event_notification()
7904 return -EFAULT; in _base_event_notification()
7906 return -EFAULT; in _base_event_notification()
7907 r = -EAGAIN; in _base_event_notification()
7913 * mpt3sas_base_validate_event_type - validating event types
7933 (ioc->event_masks[i] & desired_event)) { in mpt3sas_base_validate_event_type()
7934 ioc->event_masks[i] &= ~desired_event; in mpt3sas_base_validate_event_type()
7944 mutex_lock(&ioc->base_cmds.mutex); in mpt3sas_base_validate_event_type()
7946 mutex_unlock(&ioc->base_cmds.mutex); in mpt3sas_base_validate_event_type()
7950 * mpt3sas_base_unlock_and_get_host_diagnostic- enable Host Diagnostic Register writes
7954 * Return: 0 for success, non-zero for failure.
7971 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence); in mpt3sas_base_unlock_and_get_host_diagnostic()
7972 writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence); in mpt3sas_base_unlock_and_get_host_diagnostic()
7973 writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence); in mpt3sas_base_unlock_and_get_host_diagnostic()
7974 writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence); in mpt3sas_base_unlock_and_get_host_diagnostic()
7975 writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence); in mpt3sas_base_unlock_and_get_host_diagnostic()
7976 writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence); in mpt3sas_base_unlock_and_get_host_diagnostic()
7977 writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence); in mpt3sas_base_unlock_and_get_host_diagnostic()
7986 return -EFAULT; in mpt3sas_base_unlock_and_get_host_diagnostic()
7989 *host_diagnostic = ioc->base_readl_ext_retry(&ioc->chip->HostDiagnostic); in mpt3sas_base_unlock_and_get_host_diagnostic()
8007 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence); in mpt3sas_base_lock_host_diagnostic()
8011 * _base_diag_reset - the "big hammer" start of day reset
8014 * Return: 0 for success, non-zero for failure.
8026 pci_cfg_access_lock(ioc->pdev); in _base_diag_reset()
8030 mutex_lock(&ioc->hostdiag_unlock_mutex); in _base_diag_reset()
8034 hcb_size = ioc->base_readl(&ioc->chip->HCBSize); in _base_diag_reset()
8037 &ioc->chip->HostDiagnostic); in _base_diag_reset()
8039 /* This delay allows the chip PCIe hardware time to finish reset tasks */ in _base_diag_reset()
8046 host_diagnostic = ioc->base_readl_ext_retry(&ioc->chip->HostDiagnostic); in _base_diag_reset()
8068 writel(host_diagnostic, &ioc->chip->HostDiagnostic); in _base_diag_reset()
8070 drsprintk(ioc, ioc_info(ioc, "re-enable the HCDW\n")); in _base_diag_reset()
8072 &ioc->chip->HCBSize); in _base_diag_reset()
8077 &ioc->chip->HostDiagnostic); in _base_diag_reset()
8080 mutex_unlock(&ioc->hostdiag_unlock_mutex); in _base_diag_reset()
8091 pci_cfg_access_unlock(ioc->pdev); in _base_diag_reset()
8096 mutex_unlock(&ioc->hostdiag_unlock_mutex); in _base_diag_reset()
8099 pci_cfg_access_unlock(ioc->pdev); in _base_diag_reset()
8101 return -EFAULT; in _base_diag_reset()
8105 * mpt3sas_base_make_ioc_ready - put controller in READY state
8109 * Return: 0 for success, non-zero for failure.
8120 if (ioc->pci_error_recovery) in mpt3sas_base_make_ioc_ready()
8136 return -EFAULT; in mpt3sas_base_make_ioc_ready()
8165 if (ioc->ioc_coredump_loop != MPT3SAS_COREDUMP_LOOP_DONE) { in mpt3sas_base_make_ioc_ready()
8189 * _base_make_ioc_operational - put controller in OPERATIONAL state
8192 * Return: 0 for success, non-zero for failure.
8212 &ioc->delayed_tr_list, list) { in _base_make_ioc_operational()
8213 list_del(&delayed_tr->list); in _base_make_ioc_operational()
8219 &ioc->delayed_tr_volume_list, list) { in _base_make_ioc_operational()
8220 list_del(&delayed_tr->list); in _base_make_ioc_operational()
8225 &ioc->delayed_sc_list, list) { in _base_make_ioc_operational()
8226 list_del(&delayed_sc->list); in _base_make_ioc_operational()
8231 &ioc->delayed_event_ack_list, list) { in _base_make_ioc_operational()
8232 list_del(&delayed_event_ack->list); in _base_make_ioc_operational()
8236 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); in _base_make_ioc_operational()
8238 /* hi-priority queue */ in _base_make_ioc_operational()
8239 INIT_LIST_HEAD(&ioc->hpr_free_list); in _base_make_ioc_operational()
8240 smid = ioc->hi_priority_smid; in _base_make_ioc_operational()
8241 for (i = 0; i < ioc->hi_priority_depth; i++, smid++) { in _base_make_ioc_operational()
8242 ioc->hpr_lookup[i].cb_idx = 0xFF; in _base_make_ioc_operational()
8243 ioc->hpr_lookup[i].smid = smid; in _base_make_ioc_operational()
8244 list_add_tail(&ioc->hpr_lookup[i].tracker_list, in _base_make_ioc_operational()
8245 &ioc->hpr_free_list); in _base_make_ioc_operational()
8249 INIT_LIST_HEAD(&ioc->internal_free_list); in _base_make_ioc_operational()
8250 smid = ioc->internal_smid; in _base_make_ioc_operational()
8251 for (i = 0; i < ioc->internal_depth; i++, smid++) { in _base_make_ioc_operational()
8252 ioc->internal_lookup[i].cb_idx = 0xFF; in _base_make_ioc_operational()
8253 ioc->internal_lookup[i].smid = smid; in _base_make_ioc_operational()
8254 list_add_tail(&ioc->internal_lookup[i].tracker_list, in _base_make_ioc_operational()
8255 &ioc->internal_free_list); in _base_make_ioc_operational()
8258 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); in _base_make_ioc_operational()
8261 for (i = 0, reply_address = (u32)ioc->reply_dma ; in _base_make_ioc_operational()
8262 i < ioc->reply_free_queue_depth ; i++, reply_address += in _base_make_ioc_operational()
8263 ioc->reply_sz) { in _base_make_ioc_operational()
8264 ioc->reply_free[i] = cpu_to_le32(reply_address); in _base_make_ioc_operational()
8265 if (ioc->is_mcpu_endpoint) in _base_make_ioc_operational()
8271 if (ioc->is_driver_loading) in _base_make_ioc_operational()
8276 reply_post_free_contig = ioc->reply_post[0].reply_post_free; in _base_make_ioc_operational()
8277 list_for_each_entry(reply_q, &ioc->reply_queue_list, list) { in _base_make_ioc_operational()
8282 if (ioc->rdpq_array_enable) { in _base_make_ioc_operational()
8283 reply_q->reply_post_free = in _base_make_ioc_operational()
8284 ioc->reply_post[index++].reply_post_free; in _base_make_ioc_operational()
8286 reply_q->reply_post_free = reply_post_free_contig; in _base_make_ioc_operational()
8287 reply_post_free_contig += ioc->reply_post_queue_depth; in _base_make_ioc_operational()
8290 reply_q->reply_post_host_index = 0; in _base_make_ioc_operational()
8291 for (i = 0; i < ioc->reply_post_queue_depth; i++) in _base_make_ioc_operational()
8292 reply_q->reply_post_free[i].Words = in _base_make_ioc_operational()
8306 if (!ioc->is_driver_loading) in _base_make_ioc_operational()
8315 ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1; in _base_make_ioc_operational()
8316 writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex); in _base_make_ioc_operational()
8319 list_for_each_entry(reply_q, &ioc->reply_queue_list, list) { in _base_make_ioc_operational()
8320 if (ioc->combined_reply_queue) in _base_make_ioc_operational()
8321 writel((reply_q->msix_index & 7)<< in _base_make_ioc_operational()
8323 ioc->replyPostRegisterIndex[reply_q->msix_index/8]); in _base_make_ioc_operational()
8325 writel(reply_q->msix_index << in _base_make_ioc_operational()
8327 &ioc->chip->ReplyPostHostIndex); in _base_make_ioc_operational()
8337 if (ioc->hba_mpi_version_belonged != MPI2_VERSION) { in _base_make_ioc_operational()
8351 if (!ioc->shost_recovery) { in _base_make_ioc_operational()
8353 if (ioc->is_warpdrive && ioc->manu_pg10.OEMIdentifier in _base_make_ioc_operational()
8356 le32_to_cpu(ioc->manu_pg10.OEMSpecificFlags0) & in _base_make_ioc_operational()
8359 ioc->mfg_pg10_hide_flag = hide_flag; in _base_make_ioc_operational()
8362 ioc->wait_for_discovery_to_complete = in _base_make_ioc_operational()
8376 * mpt3sas_base_free_resources - free resources controller resources
8385 mutex_lock(&ioc->pci_access_mutex); in mpt3sas_base_free_resources()
8386 if (ioc->chip_phys && ioc->chip) { in mpt3sas_base_free_resources()
8388 ioc->shost_recovery = 1; in mpt3sas_base_free_resources()
8390 ioc->shost_recovery = 0; in mpt3sas_base_free_resources()
8394 mutex_unlock(&ioc->pci_access_mutex); in mpt3sas_base_free_resources()
8399 * mpt3sas_base_attach - attach controller instance
8402 * Return: 0 for success, non-zero for failure.
8413 ioc->cpu_count = num_online_cpus(); in mpt3sas_base_attach()
8416 ioc->cpu_msix_table_sz = last_cpu_id + 1; in mpt3sas_base_attach()
8417 ioc->cpu_msix_table = kzalloc(ioc->cpu_msix_table_sz, GFP_KERNEL); in mpt3sas_base_attach()
8418 ioc->reply_queue_count = 1; in mpt3sas_base_attach()
8419 if (!ioc->cpu_msix_table) { in mpt3sas_base_attach()
8421 r = -ENOMEM; in mpt3sas_base_attach()
8425 if (ioc->is_warpdrive) { in mpt3sas_base_attach()
8426 ioc->reply_post_host_index = kcalloc(ioc->cpu_msix_table_sz, in mpt3sas_base_attach()
8428 if (!ioc->reply_post_host_index) { in mpt3sas_base_attach()
8430 r = -ENOMEM; in mpt3sas_base_attach()
8435 ioc->smp_affinity_enable = smp_affinity_enable; in mpt3sas_base_attach()
8437 ioc->rdpq_array_enable_assigned = 0; in mpt3sas_base_attach()
8438 ioc->use_32bit_dma = false; in mpt3sas_base_attach()
8439 ioc->dma_mask = 64; in mpt3sas_base_attach()
8440 if (ioc->is_aero_ioc) { in mpt3sas_base_attach()
8441 ioc->base_readl = &_base_readl_aero; in mpt3sas_base_attach()
8442 ioc->base_readl_ext_retry = &_base_readl_ext_retry; in mpt3sas_base_attach()
8444 ioc->base_readl = &_base_readl; in mpt3sas_base_attach()
8445 ioc->base_readl_ext_retry = &_base_readl; in mpt3sas_base_attach()
8451 pci_set_drvdata(ioc->pdev, ioc->shost); in mpt3sas_base_attach()
8459 switch (ioc->hba_mpi_version_belonged) { in mpt3sas_base_attach()
8461 ioc->build_sg_scmd = &_base_build_sg_scmd; in mpt3sas_base_attach()
8462 ioc->build_sg = &_base_build_sg; in mpt3sas_base_attach()
8463 ioc->build_zero_len_sge = &_base_build_zero_len_sge; in mpt3sas_base_attach()
8464 ioc->get_msix_index_for_smlio = &_base_get_msix_index; in mpt3sas_base_attach()
8471 * Target Status - all require the IEEE formatted scatter gather in mpt3sas_base_attach()
8474 ioc->build_sg_scmd = &_base_build_sg_scmd_ieee; in mpt3sas_base_attach()
8475 ioc->build_sg = &_base_build_sg_ieee; in mpt3sas_base_attach()
8476 ioc->build_nvme_prp = &_base_build_nvme_prp; in mpt3sas_base_attach()
8477 ioc->build_zero_len_sge = &_base_build_zero_len_sge_ieee; in mpt3sas_base_attach()
8478 ioc->sge_size_ieee = sizeof(Mpi2IeeeSgeSimple64_t); in mpt3sas_base_attach()
8479 if (ioc->high_iops_queues) in mpt3sas_base_attach()
8480 ioc->get_msix_index_for_smlio = in mpt3sas_base_attach()
8483 ioc->get_msix_index_for_smlio = &_base_get_msix_index; in mpt3sas_base_attach()
8486 if (ioc->atomic_desc_capable) { in mpt3sas_base_attach()
8487 ioc->put_smid_default = &_base_put_smid_default_atomic; in mpt3sas_base_attach()
8488 ioc->put_smid_scsi_io = &_base_put_smid_scsi_io_atomic; in mpt3sas_base_attach()
8489 ioc->put_smid_fast_path = in mpt3sas_base_attach()
8491 ioc->put_smid_hi_priority = in mpt3sas_base_attach()
8494 ioc->put_smid_default = &_base_put_smid_default; in mpt3sas_base_attach()
8495 ioc->put_smid_fast_path = &_base_put_smid_fast_path; in mpt3sas_base_attach()
8496 ioc->put_smid_hi_priority = &_base_put_smid_hi_priority; in mpt3sas_base_attach()
8497 if (ioc->is_mcpu_endpoint) in mpt3sas_base_attach()
8498 ioc->put_smid_scsi_io = in mpt3sas_base_attach()
8501 ioc->put_smid_scsi_io = &_base_put_smid_scsi_io; in mpt3sas_base_attach()
8509 ioc->build_sg_mpi = &_base_build_sg; in mpt3sas_base_attach()
8510 ioc->build_zero_len_sge_mpi = &_base_build_zero_len_sge; in mpt3sas_base_attach()
8516 ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts, in mpt3sas_base_attach()
8518 if (!ioc->pfacts) { in mpt3sas_base_attach()
8519 r = -ENOMEM; in mpt3sas_base_attach()
8523 for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) { in mpt3sas_base_attach()
8537 ioc->thresh_hold = irqpoll_weight; in mpt3sas_base_attach()
8539 ioc->thresh_hold = ioc->hba_queue_depth/4; in mpt3sas_base_attach()
8542 init_waitqueue_head(&ioc->reset_wq); in mpt3sas_base_attach()
8545 ioc->pd_handles_sz = (ioc->facts.MaxDevHandle / 8); in mpt3sas_base_attach()
8546 if (ioc->facts.MaxDevHandle % 8) in mpt3sas_base_attach()
8547 ioc->pd_handles_sz++; in mpt3sas_base_attach()
8550 * set_bit()/test_bit(), otherwise out-of-memory touch may occur. in mpt3sas_base_attach()
8552 ioc->pd_handles_sz = ALIGN(ioc->pd_handles_sz, sizeof(unsigned long)); in mpt3sas_base_attach()
8554 ioc->pd_handles = kzalloc(ioc->pd_handles_sz, in mpt3sas_base_attach()
8556 if (!ioc->pd_handles) { in mpt3sas_base_attach()
8557 r = -ENOMEM; in mpt3sas_base_attach()
8560 ioc->blocking_handles = kzalloc(ioc->pd_handles_sz, in mpt3sas_base_attach()
8562 if (!ioc->blocking_handles) { in mpt3sas_base_attach()
8563 r = -ENOMEM; in mpt3sas_base_attach()
8568 ioc->pend_os_device_add_sz = (ioc->facts.MaxDevHandle / 8); in mpt3sas_base_attach()
8569 if (ioc->facts.MaxDevHandle % 8) in mpt3sas_base_attach()
8570 ioc->pend_os_device_add_sz++; in mpt3sas_base_attach()
8574 * set_bit()/test_bit(), otherwise out-of-memory may occur. in mpt3sas_base_attach()
8576 ioc->pend_os_device_add_sz = ALIGN(ioc->pend_os_device_add_sz, in mpt3sas_base_attach()
8578 ioc->pend_os_device_add = kzalloc(ioc->pend_os_device_add_sz, in mpt3sas_base_attach()
8580 if (!ioc->pend_os_device_add) { in mpt3sas_base_attach()
8581 r = -ENOMEM; in mpt3sas_base_attach()
8585 ioc->device_remove_in_progress_sz = ioc->pend_os_device_add_sz; in mpt3sas_base_attach()
8586 ioc->device_remove_in_progress = in mpt3sas_base_attach()
8587 kzalloc(ioc->device_remove_in_progress_sz, GFP_KERNEL); in mpt3sas_base_attach()
8588 if (!ioc->device_remove_in_progress) { in mpt3sas_base_attach()
8589 r = -ENOMEM; in mpt3sas_base_attach()
8593 ioc->fwfault_debug = mpt3sas_fwfault_debug; in mpt3sas_base_attach()
8596 mutex_init(&ioc->base_cmds.mutex); in mpt3sas_base_attach()
8597 ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); in mpt3sas_base_attach()
8598 ioc->base_cmds.status = MPT3_CMD_NOT_USED; in mpt3sas_base_attach()
8601 ioc->port_enable_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); in mpt3sas_base_attach()
8602 ioc->port_enable_cmds.status = MPT3_CMD_NOT_USED; in mpt3sas_base_attach()
8605 ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); in mpt3sas_base_attach()
8606 ioc->transport_cmds.status = MPT3_CMD_NOT_USED; in mpt3sas_base_attach()
8607 mutex_init(&ioc->transport_cmds.mutex); in mpt3sas_base_attach()
8610 ioc->scsih_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); in mpt3sas_base_attach()
8611 ioc->scsih_cmds.status = MPT3_CMD_NOT_USED; in mpt3sas_base_attach()
8612 mutex_init(&ioc->scsih_cmds.mutex); in mpt3sas_base_attach()
8615 ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); in mpt3sas_base_attach()
8616 ioc->tm_cmds.status = MPT3_CMD_NOT_USED; in mpt3sas_base_attach()
8617 mutex_init(&ioc->tm_cmds.mutex); in mpt3sas_base_attach()
8620 ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); in mpt3sas_base_attach()
8621 ioc->config_cmds.status = MPT3_CMD_NOT_USED; in mpt3sas_base_attach()
8622 mutex_init(&ioc->config_cmds.mutex); in mpt3sas_base_attach()
8625 ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); in mpt3sas_base_attach()
8626 ioc->ctl_cmds.sense = kzalloc(SCSI_SENSE_BUFFERSIZE, GFP_KERNEL); in mpt3sas_base_attach()
8627 ioc->ctl_cmds.status = MPT3_CMD_NOT_USED; in mpt3sas_base_attach()
8628 mutex_init(&ioc->ctl_cmds.mutex); in mpt3sas_base_attach()
8630 if (!ioc->base_cmds.reply || !ioc->port_enable_cmds.reply || in mpt3sas_base_attach()
8631 !ioc->transport_cmds.reply || !ioc->scsih_cmds.reply || in mpt3sas_base_attach()
8632 !ioc->tm_cmds.reply || !ioc->config_cmds.reply || in mpt3sas_base_attach()
8633 !ioc->ctl_cmds.reply || !ioc->ctl_cmds.sense) { in mpt3sas_base_attach()
8634 r = -ENOMEM; in mpt3sas_base_attach()
8639 ioc->event_masks[i] = -1; in mpt3sas_base_attach()
8655 if (ioc->hba_mpi_version_belonged == MPI26_VERSION) { in mpt3sas_base_attach()
8656 if (ioc->is_gen35_ioc) { in mpt3sas_base_attach()
8665 if (r == -EAGAIN) { in mpt3sas_base_attach()
8675 memcpy(&ioc->prev_fw_facts, &ioc->facts, in mpt3sas_base_attach()
8678 ioc->non_operational_loop = 0; in mpt3sas_base_attach()
8679 ioc->ioc_coredump_loop = 0; in mpt3sas_base_attach()
8680 ioc->got_task_abort_from_ioctl = 0; in mpt3sas_base_attach()
8685 ioc->remove_host = 1; in mpt3sas_base_attach()
8689 pci_set_drvdata(ioc->pdev, NULL); in mpt3sas_base_attach()
8690 kfree(ioc->cpu_msix_table); in mpt3sas_base_attach()
8691 if (ioc->is_warpdrive) in mpt3sas_base_attach()
8692 kfree(ioc->reply_post_host_index); in mpt3sas_base_attach()
8693 kfree(ioc->pd_handles); in mpt3sas_base_attach()
8694 kfree(ioc->blocking_handles); in mpt3sas_base_attach()
8695 kfree(ioc->device_remove_in_progress); in mpt3sas_base_attach()
8696 kfree(ioc->pend_os_device_add); in mpt3sas_base_attach()
8697 kfree(ioc->tm_cmds.reply); in mpt3sas_base_attach()
8698 kfree(ioc->transport_cmds.reply); in mpt3sas_base_attach()
8699 kfree(ioc->scsih_cmds.reply); in mpt3sas_base_attach()
8700 kfree(ioc->config_cmds.reply); in mpt3sas_base_attach()
8701 kfree(ioc->base_cmds.reply); in mpt3sas_base_attach()
8702 kfree(ioc->port_enable_cmds.reply); in mpt3sas_base_attach()
8703 kfree(ioc->ctl_cmds.reply); in mpt3sas_base_attach()
8704 kfree(ioc->ctl_cmds.sense); in mpt3sas_base_attach()
8705 kfree(ioc->pfacts); in mpt3sas_base_attach()
8706 ioc->ctl_cmds.reply = NULL; in mpt3sas_base_attach()
8707 ioc->base_cmds.reply = NULL; in mpt3sas_base_attach()
8708 ioc->tm_cmds.reply = NULL; in mpt3sas_base_attach()
8709 ioc->scsih_cmds.reply = NULL; in mpt3sas_base_attach()
8710 ioc->transport_cmds.reply = NULL; in mpt3sas_base_attach()
8711 ioc->config_cmds.reply = NULL; in mpt3sas_base_attach()
8712 ioc->pfacts = NULL; in mpt3sas_base_attach()
8718 * mpt3sas_base_detach - remove controller instance
8730 pci_set_drvdata(ioc->pdev, NULL); in mpt3sas_base_detach()
8731 kfree(ioc->cpu_msix_table); in mpt3sas_base_detach()
8732 if (ioc->is_warpdrive) in mpt3sas_base_detach()
8733 kfree(ioc->reply_post_host_index); in mpt3sas_base_detach()
8734 kfree(ioc->pd_handles); in mpt3sas_base_detach()
8735 kfree(ioc->blocking_handles); in mpt3sas_base_detach()
8736 kfree(ioc->device_remove_in_progress); in mpt3sas_base_detach()
8737 kfree(ioc->pend_os_device_add); in mpt3sas_base_detach()
8738 kfree(ioc->pfacts); in mpt3sas_base_detach()
8739 kfree(ioc->ctl_cmds.reply); in mpt3sas_base_detach()
8740 kfree(ioc->ctl_cmds.sense); in mpt3sas_base_detach()
8741 kfree(ioc->base_cmds.reply); in mpt3sas_base_detach()
8742 kfree(ioc->port_enable_cmds.reply); in mpt3sas_base_detach()
8743 kfree(ioc->tm_cmds.reply); in mpt3sas_base_detach()
8744 kfree(ioc->transport_cmds.reply); in mpt3sas_base_detach()
8745 kfree(ioc->scsih_cmds.reply); in mpt3sas_base_detach()
8746 kfree(ioc->config_cmds.reply); in mpt3sas_base_detach()
8750 * _base_pre_reset_handler - pre reset handler
8761 * _base_clear_outstanding_mpt_commands - clears outstanding mpt commands
8769 if (ioc->transport_cmds.status & MPT3_CMD_PENDING) { in _base_clear_outstanding_mpt_commands()
8770 ioc->transport_cmds.status |= MPT3_CMD_RESET; in _base_clear_outstanding_mpt_commands()
8771 mpt3sas_base_free_smid(ioc, ioc->transport_cmds.smid); in _base_clear_outstanding_mpt_commands()
8772 complete(&ioc->transport_cmds.done); in _base_clear_outstanding_mpt_commands()
8774 if (ioc->base_cmds.status & MPT3_CMD_PENDING) { in _base_clear_outstanding_mpt_commands()
8775 ioc->base_cmds.status |= MPT3_CMD_RESET; in _base_clear_outstanding_mpt_commands()
8776 mpt3sas_base_free_smid(ioc, ioc->base_cmds.smid); in _base_clear_outstanding_mpt_commands()
8777 complete(&ioc->base_cmds.done); in _base_clear_outstanding_mpt_commands()
8779 if (ioc->port_enable_cmds.status & MPT3_CMD_PENDING) { in _base_clear_outstanding_mpt_commands()
8780 ioc->port_enable_failed = 1; in _base_clear_outstanding_mpt_commands()
8781 ioc->port_enable_cmds.status |= MPT3_CMD_RESET; in _base_clear_outstanding_mpt_commands()
8782 mpt3sas_base_free_smid(ioc, ioc->port_enable_cmds.smid); in _base_clear_outstanding_mpt_commands()
8783 if (ioc->is_driver_loading) { in _base_clear_outstanding_mpt_commands()
8784 ioc->start_scan_failed = in _base_clear_outstanding_mpt_commands()
8786 ioc->start_scan = 0; in _base_clear_outstanding_mpt_commands()
8788 complete(&ioc->port_enable_cmds.done); in _base_clear_outstanding_mpt_commands()
8791 if (ioc->config_cmds.status & MPT3_CMD_PENDING) { in _base_clear_outstanding_mpt_commands()
8792 ioc->config_cmds.status |= MPT3_CMD_RESET; in _base_clear_outstanding_mpt_commands()
8793 mpt3sas_base_free_smid(ioc, ioc->config_cmds.smid); in _base_clear_outstanding_mpt_commands()
8794 ioc->config_cmds.smid = USHRT_MAX; in _base_clear_outstanding_mpt_commands()
8795 complete(&ioc->config_cmds.done); in _base_clear_outstanding_mpt_commands()
8800 * _base_clear_outstanding_commands - clear all outstanding commands
8811 * _base_reset_done_handler - reset done handler
8822 * mpt3sas_wait_for_commands_to_complete - reset controller
8833 ioc->pending_io_count = 0; in mpt3sas_wait_for_commands_to_complete()
8840 ioc->pending_io_count = scsi_host_busy(ioc->shost); in mpt3sas_wait_for_commands_to_complete()
8842 if (!ioc->pending_io_count) in mpt3sas_wait_for_commands_to_complete()
8846 wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 10 * HZ); in mpt3sas_wait_for_commands_to_complete()
8850 * _base_check_ioc_facts_changes - Look for increase/decrease of IOCFacts
8862 struct mpt3sas_facts *old_facts = &ioc->prev_fw_facts; in _base_check_ioc_facts_changes()
8864 if (ioc->facts.MaxDevHandle > old_facts->MaxDevHandle) { in _base_check_ioc_facts_changes()
8865 pd_handles_sz = (ioc->facts.MaxDevHandle / 8); in _base_check_ioc_facts_changes()
8866 if (ioc->facts.MaxDevHandle % 8) in _base_check_ioc_facts_changes()
8871 * set_bit()/test_bit(), otherwise out-of-memory touch may in _base_check_ioc_facts_changes()
8875 pd_handles = krealloc(ioc->pd_handles, pd_handles_sz, in _base_check_ioc_facts_changes()
8881 return -ENOMEM; in _base_check_ioc_facts_changes()
8883 memset(pd_handles + ioc->pd_handles_sz, 0, in _base_check_ioc_facts_changes()
8884 (pd_handles_sz - ioc->pd_handles_sz)); in _base_check_ioc_facts_changes()
8885 ioc->pd_handles = pd_handles; in _base_check_ioc_facts_changes()
8887 blocking_handles = krealloc(ioc->blocking_handles, in _base_check_ioc_facts_changes()
8894 return -ENOMEM; in _base_check_ioc_facts_changes()
8896 memset(blocking_handles + ioc->pd_handles_sz, 0, in _base_check_ioc_facts_changes()
8897 (pd_handles_sz - ioc->pd_handles_sz)); in _base_check_ioc_facts_changes()
8898 ioc->blocking_handles = blocking_handles; in _base_check_ioc_facts_changes()
8899 ioc->pd_handles_sz = pd_handles_sz; in _base_check_ioc_facts_changes()
8901 pend_os_device_add = krealloc(ioc->pend_os_device_add, in _base_check_ioc_facts_changes()
8907 return -ENOMEM; in _base_check_ioc_facts_changes()
8909 memset(pend_os_device_add + ioc->pend_os_device_add_sz, 0, in _base_check_ioc_facts_changes()
8910 (pd_handles_sz - ioc->pend_os_device_add_sz)); in _base_check_ioc_facts_changes()
8911 ioc->pend_os_device_add = pend_os_device_add; in _base_check_ioc_facts_changes()
8912 ioc->pend_os_device_add_sz = pd_handles_sz; in _base_check_ioc_facts_changes()
8915 ioc->device_remove_in_progress, pd_handles_sz, GFP_KERNEL); in _base_check_ioc_facts_changes()
8920 return -ENOMEM; in _base_check_ioc_facts_changes()
8923 ioc->device_remove_in_progress_sz, 0, in _base_check_ioc_facts_changes()
8924 (pd_handles_sz - ioc->device_remove_in_progress_sz)); in _base_check_ioc_facts_changes()
8925 ioc->device_remove_in_progress = device_remove_in_progress; in _base_check_ioc_facts_changes()
8926 ioc->device_remove_in_progress_sz = pd_handles_sz; in _base_check_ioc_facts_changes()
8929 memcpy(&ioc->prev_fw_facts, &ioc->facts, sizeof(struct mpt3sas_facts)); in _base_check_ioc_facts_changes()
8934 * mpt3sas_base_hard_reset_handler - reset controller
8938 * Return: 0 for success, non-zero for failure.
8951 if (ioc->pci_error_recovery) { in mpt3sas_base_hard_reset_handler()
8961 mutex_lock(&ioc->reset_in_progress_mutex); in mpt3sas_base_hard_reset_handler()
8963 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); in mpt3sas_base_hard_reset_handler()
8964 ioc->shost_recovery = 1; in mpt3sas_base_hard_reset_handler()
8965 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); in mpt3sas_base_hard_reset_handler()
8967 if ((ioc->diag_buffer_status[MPI2_DIAG_BUF_TYPE_TRACE] & in mpt3sas_base_hard_reset_handler()
8969 (!(ioc->diag_buffer_status[MPI2_DIAG_BUF_TYPE_TRACE] & in mpt3sas_base_hard_reset_handler()
8977 ioc->htb_rel.trigger_info_dwords[1] = in mpt3sas_base_hard_reset_handler()
8993 if (ioc->is_driver_loading && ioc->port_enable_failed) { in mpt3sas_base_hard_reset_handler()
8994 ioc->remove_host = 1; in mpt3sas_base_hard_reset_handler()
8995 r = -EFAULT; in mpt3sas_base_hard_reset_handler()
9009 if (ioc->rdpq_array_enable && !ioc->rdpq_array_capable) in mpt3sas_base_hard_reset_handler()
9012 " firmware version is running\n", ioc->name); in mpt3sas_base_hard_reset_handler()
9021 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); in mpt3sas_base_hard_reset_handler()
9022 ioc->shost_recovery = 0; in mpt3sas_base_hard_reset_handler()
9023 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); in mpt3sas_base_hard_reset_handler()
9024 ioc->ioc_reset_count++; in mpt3sas_base_hard_reset_handler()
9025 mutex_unlock(&ioc->reset_in_progress_mutex); in mpt3sas_base_hard_reset_handler()