Lines Matching +full:0 +full:x0007ffff
144 #define COMPLETION_QUEUE_CYCLE_BIT(x) ((x) & 0x80000000)
210 writel(0xFF000000, &ihost->smu_registers->interrupt_mask); in sci_controller_isr()
211 writel(0, &ihost->smu_registers->interrupt_mask); in sci_controller_isr()
236 if (interrupt_status != 0) { in sci_controller_error_isr()
249 writel(0xff, &ihost->smu_registers->interrupt_mask); in sci_controller_error_isr()
250 writel(0, &ihost->smu_registers->interrupt_mask); in sci_controller_error_isr()
379 "%s: SCIC Controller 0x%p received SMU command error " in sci_controller_event_completion()
380 "0x%x\n", in sci_controller_event_completion()
393 "%s: SCIC Controller 0x%p received fatal controller " in sci_controller_event_completion()
394 "event 0x%x\n", in sci_controller_event_completion()
414 "%s: SCIC Controller 0x%p received " in sci_controller_event_completion()
415 "event 0x%x for io request object " in sci_controller_event_completion()
429 "%s: SCIC Controller 0x%p received " in sci_controller_event_completion()
430 "event 0x%x for remote device object " in sci_controller_event_completion()
464 "%s: SCIC Controller 0x%p received event 0x%x " in sci_controller_event_completion()
465 "for remote device object 0x%0x that doesn't " in sci_controller_event_completion()
485 u32 completion_count = 0; in sci_controller_process_completions()
493 "%s: completion queue beginning get:0x%08x\n", in sci_controller_process_completions()
518 "%s: completion queue entry:0x%08x\n", in sci_controller_process_completions()
558 if (completion_count > 0) { in sci_controller_process_completions()
573 "%s: completion queue ending get:0x%08x\n", in sci_controller_process_completions()
603 writel(0, &ihost->smu_registers->interrupt_mask); in sci_controller_error_handler()
658 return 0; in isci_host_scan_finished()
681 return 0; in sci_controller_get_suggested_start_timeout()
705 writel(0, &ihost->smu_registers->interrupt_mask); in sci_controller_enable_interrupts()
711 writel(0xffffffff, &ihost->smu_registers->interrupt_mask); in sci_controller_disable_interrupts()
733 * Assign all the TCs to function 0 in sci_controller_assign_task_entries()
738 readl(&ihost->smu_registers->task_context_assignment[0]); in sci_controller_assign_task_entries()
740 task_assignment |= (SMU_TCA_GEN_VAL(STARTING, 0)) | in sci_controller_assign_task_entries()
745 &ihost->smu_registers->task_context_assignment[0]); in sci_controller_assign_task_entries()
756 ihost->completion_queue_get = 0; in sci_controller_initialize_completion_queue()
768 (SMU_CQGR_GEN_VAL(POINTER, 0)) in sci_controller_initialize_completion_queue()
769 | (SMU_CQGR_GEN_VAL(EVENT_POINTER, 0)) in sci_controller_initialize_completion_queue()
779 (SMU_CQPR_GEN_VAL(POINTER, 0)) in sci_controller_initialize_completion_queue()
780 | (SMU_CQPR_GEN_VAL(EVENT_POINTER, 0)) in sci_controller_initialize_completion_queue()
787 for (index = 0; index < SCU_MAX_COMPLETION_QUEUE_ENTRIES; index++) { in sci_controller_initialize_completion_queue()
792 ihost->completion_queue[index] = 0x80000000; in sci_controller_initialize_completion_queue()
811 SCU_UFQGP_GEN_VAL(POINTER, 0) in sci_controller_initialize_unsolicited_frame_queue()
818 frame_queue_put_value = SCU_UFQPP_GEN_VAL(POINTER, 0); in sci_controller_initialize_unsolicited_frame_queue()
863 for (i = 0; i < SCI_MAX_PHYS; i++) { in is_controller_start_complete()
999 BUILD_BUG_ON(SCI_MAX_IO_REQUESTS > 1 << sizeof(ihost->tci_pool[0]) * 8); in sci_controller_start()
1000 ihost->tci_head = 0; in sci_controller_start()
1001 ihost->tci_tail = 0; in sci_controller_start()
1002 for (index = 0; index < ihost->task_context_entries; index++) in sci_controller_start()
1028 for (index = 0; index < ihost->logical_port_entries; index++) { in sci_controller_start()
1074 writel(0xFF000000, &ihost->smu_registers->interrupt_mask); in sci_controller_completion_handler()
1075 writel(0, &ihost->smu_registers->interrupt_mask); in sci_controller_completion_handler()
1209 for (index = 0; index < SCI_MAX_PHYS; index++) { in sci_controller_stop_phys()
1244 for (i = 0; i < isci_gpio_count(ihost); i++) in isci_host_deinit()
1265 writel(0, &ihost->scu_registers->peg0.sgpio.interface_control); in isci_host_deinit()
1272 for (i = 0; i < ihost->logical_port_entries; i++) { in isci_host_deinit()
1278 for (i = 0; i < SCI_MAX_PHYS; i++) { in isci_host_deinit()
1337 * is [0, 256]. A setting of 0 results in coalescing being disabled.
1339 * input is [0, 2700000] . A setting of 0 is allowed and results in no
1351 u8 timeout_encode = 0; in sci_controller_set_interrupt_coalescence()
1352 u32 min = 0; in sci_controller_set_interrupt_coalescence()
1353 u32 max = 0; in sci_controller_set_interrupt_coalescence()
1363 * 0 - - Disabled in sci_controller_set_interrupt_coalescence()
1397 if (coalesce_timeout == 0) in sci_controller_set_interrupt_coalescence()
1398 timeout_encode = 0; in sci_controller_set_interrupt_coalescence()
1456 sci_controller_set_interrupt_coalescence(ihost, 0, 0); in sci_controller_ready_state_enter()
1464 sci_controller_set_interrupt_coalescence(ihost, 0, 0); in sci_controller_ready_state_exit()
1473 for (index = 0; index < ihost->logical_port_entries; index++) { in sci_controller_stop_ports()
1502 for (index = 0; index < ihost->remote_node_entries; index++) { in sci_controller_stop_devices()
1505 device_status = sci_remote_device_stop(ihost->device_table[index], 0); in sci_controller_stop_devices()
1511 "to stop device 0x%p because of " in sci_controller_stop_devices()
1546 writel(0xFFFFFFFF, &ihost->smu_registers->soft_reset_control); in sci_controller_reset_hardware()
1552 writel(0x00000000, &ihost->smu_registers->completion_queue_get); in sci_controller_reset_hardware()
1555 writel(0, &ihost->scu_registers->sdma.unsolicited_frame_get_pointer); in sci_controller_reset_hardware()
1634 for (i = 0; i < SCI_MAX_PORTS; i++) in sci_controller_construct()
1639 for (i = 0; i < SCI_MAX_PHYS; i++) { in sci_controller_construct()
1645 ihost->invalid_phy_mask = 0; in sci_controller_construct()
1656 for (i = 0; i < SCI_MAX_PORTS; i++) in sci_oem_parameters_validate()
1660 for (i = 0; i < SCI_MAX_PHYS; i++) in sci_oem_parameters_validate()
1661 if (oem->phys[i].sas_address.high == 0 && in sci_oem_parameters_validate()
1662 oem->phys[i].sas_address.low == 0) in sci_oem_parameters_validate()
1666 for (i = 0; i < SCI_MAX_PHYS; i++) in sci_oem_parameters_validate()
1667 if (oem->ports[i].phy_mask != 0) in sci_oem_parameters_validate()
1670 u8 phy_mask = 0; in sci_oem_parameters_validate()
1672 for (i = 0; i < SCI_MAX_PHYS; i++) in sci_oem_parameters_validate()
1675 if (phy_mask == 0) in sci_oem_parameters_validate()
1692 case 0: in sci_oem_parameters_validate()
1703 if (oem->controller.ssc_sas_tx_type == 0) { in sci_oem_parameters_validate()
1705 case 0: in sci_oem_parameters_validate()
1714 case 0: in sci_oem_parameters_validate()
1725 return 0; in sci_oem_parameters_validate()
1751 ihost->power_control.phys_granted_power = 0; in power_control_timeout()
1753 if (ihost->power_control.phys_waiting == 0) { in power_control_timeout()
1758 for (i = 0; i < SCI_MAX_PHYS; i++) { in power_control_timeout()
1760 if (ihost->power_control.phys_waiting == 0) in power_control_timeout()
1778 for (j = 0; j < SCI_MAX_PHYS; j++) { in power_control_timeout()
1791 if (other == 0) { in power_control_timeout()
1823 * no_of_phys_granted_power will be set to 0 in sci_controller_power_control_queue_insert()
1840 for (i = 0; i < SCI_MAX_PHYS; i++) { in sci_controller_power_control_queue_insert()
1850 other == 0) { in sci_controller_power_control_queue_insert()
1889 return ((selection_byte & (1 << phy)) ? 1 : 0) in decode_selection_byte()
1890 + (selection_byte & (1 << (phy + 4)) ? 2 : 0); in decode_selection_byte()
1913 [undefined_cable] = "<undefined, assumed long>" /* bit 0==1 */ in lookup_cable_names()
1931 writel(0x0081000f, &afe->afe_dfx_master_control0); in sci_controller_afe_initialization()
1938 writel(0x0007FFFF, &afe->afe_pmsn_master_control2); in sci_controller_afe_initialization()
1944 writel(0x00005A00, &afe->afe_bias_control); in sci_controller_afe_initialization()
1946 writel(0x00005F00, &afe->afe_bias_control); in sci_controller_afe_initialization()
1948 writel(0x00005500, &afe->afe_bias_control); in sci_controller_afe_initialization()
1954 writel(0x80040908, &afe->afe_pll_control0); in sci_controller_afe_initialization()
1956 writel(0x80040A08, &afe->afe_pll_control0); in sci_controller_afe_initialization()
1958 writel(0x80000B08, &afe->afe_pll_control0); in sci_controller_afe_initialization()
1960 writel(0x00000B08, &afe->afe_pll_control0); in sci_controller_afe_initialization()
1962 writel(0x80000B08, &afe->afe_pll_control0); in sci_controller_afe_initialization()
1971 } while ((afe_status & 0x00001000) == 0); in sci_controller_afe_initialization()
1977 writel(0x7bcc96ad, &afe->afe_pmsn_master_control0); in sci_controller_afe_initialization()
1981 for (phy_id = 0; phy_id < SCI_MAX_PHYS; phy_id++) { in sci_controller_afe_initialization()
1991 * Alignament/Comma Detect Enable....(0xe800) in sci_controller_afe_initialization()
1993 writel(0x00004512, &xcvr->afe_xcvr_control0); in sci_controller_afe_initialization()
1996 writel(0x0050100F, &xcvr->afe_xcvr_control1); in sci_controller_afe_initialization()
2000 writel(0x00030000, &xcvr->afe_tx_ssc_control); in sci_controller_afe_initialization()
2004 writel(0x00010202, &xcvr->afe_tx_ssc_control); in sci_controller_afe_initialization()
2008 * Alignament/Comma Detect Enable....(0xe800) in sci_controller_afe_initialization()
2010 writel(0x00014500, &xcvr->afe_xcvr_control0); in sci_controller_afe_initialization()
2014 writel(0x00010202, &xcvr->afe_tx_ssc_control); in sci_controller_afe_initialization()
2018 * Alignament/Comma Detect Enable....(0xe800) in sci_controller_afe_initialization()
2020 writel(0x0001C500, &xcvr->afe_xcvr_control0); in sci_controller_afe_initialization()
2025 * PWRDNRX) & increase TX int & ext bias 20%....(0xe85c) in sci_controller_afe_initialization()
2028 writel(0x000003F0, &xcvr->afe_channel_control); in sci_controller_afe_initialization()
2030 writel(0x000003D7, &xcvr->afe_channel_control); in sci_controller_afe_initialization()
2033 writel(0x000003D4, &xcvr->afe_channel_control); in sci_controller_afe_initialization()
2035 writel(0x000001E7, &xcvr->afe_channel_control); in sci_controller_afe_initialization()
2038 writel(0x000001E4, &xcvr->afe_channel_control); in sci_controller_afe_initialization()
2040 writel(cable_length_long ? 0x000002F7 : 0x000001F7, in sci_controller_afe_initialization()
2044 writel(cable_length_long ? 0x000002F4 : 0x000001F4, in sci_controller_afe_initialization()
2050 /* Enable TX equalization (0xe824) */ in sci_controller_afe_initialization()
2051 writel(0x00040000, &xcvr->afe_tx_control); in sci_controller_afe_initialization()
2056 /* RDPI=0x0(RX Power On), RXOOBDETPDNC=0x0, in sci_controller_afe_initialization()
2057 * TPD=0x0(TX Power On), RDD=0x0(RX Detect in sci_controller_afe_initialization()
2058 * Enabled) ....(0xe800) in sci_controller_afe_initialization()
2060 writel(0x00004100, &xcvr->afe_xcvr_control0); in sci_controller_afe_initialization()
2062 writel(0x00014100, &xcvr->afe_xcvr_control0); in sci_controller_afe_initialization()
2064 writel(0x0001C100, &xcvr->afe_xcvr_control0); in sci_controller_afe_initialization()
2069 writel(0x3F11103F, &xcvr->afe_rx_ssc_control0); in sci_controller_afe_initialization()
2071 writel(0x3F11103F, &xcvr->afe_rx_ssc_control0); in sci_controller_afe_initialization()
2073 /* Enable TX equalization (0xe824) */ in sci_controller_afe_initialization()
2074 writel(0x00040000, &xcvr->afe_tx_control); in sci_controller_afe_initialization()
2076 writel(0x01400C0F, &xcvr->afe_rx_ssc_control1); in sci_controller_afe_initialization()
2079 writel(0x3F6F103F, &xcvr->afe_rx_ssc_control0); in sci_controller_afe_initialization()
2082 /* Enable TX equalization (0xe824) */ in sci_controller_afe_initialization()
2083 writel(0x00040000, &xcvr->afe_tx_control); in sci_controller_afe_initialization()
2085 writel(cable_length_long ? 0x01500C0C : in sci_controller_afe_initialization()
2086 cable_length_medium ? 0x01400C0D : 0x02400C0D, in sci_controller_afe_initialization()
2090 writel(0x000003E0, &xcvr->afe_dfx_rx_control1); in sci_controller_afe_initialization()
2093 writel(cable_length_long ? 0x33091C1F : in sci_controller_afe_initialization()
2094 cable_length_medium ? 0x3315181F : 0x2B17161F, in sci_controller_afe_initialization()
2098 /* Enable TX equalization (0xe824) */ in sci_controller_afe_initialization()
2099 writel(0x00040000, &xcvr->afe_tx_control); in sci_controller_afe_initialization()
2118 writel(0x00010f00, &afe->afe_dfx_master_control0); in sci_controller_afe_initialization()
2126 memset(ihost->power_control.requesters, 0, in sci_controller_initialize_power_control()
2129 ihost->power_control.phys_waiting = 0; in sci_controller_initialize_power_control()
2130 ihost->power_control.phys_granted_power = 0; in sci_controller_initialize_power_control()
2149 ihost->next_phy_to_start = 0; in sci_controller_initialize()
2163 writel(0, &ihost->smu_registers->soft_reset_control); in sci_controller_initialize()
2178 if (i == 0) in sci_controller_initialize()
2195 for (i = 0; i < ihost->logical_port_entries; i++) { in sci_controller_initialize()
2215 for (i = 0; i < SCI_MAX_PHYS; i++) { in sci_controller_initialize()
2223 for (i = 0; i < ihost->logical_port_entries; i++) { in sci_controller_initialize()
2227 iport->port_pe_configuration_register = &ihost->scu_registers->peg0.ptsg.protocol_engine[0]; in sci_controller_initialize()
2252 return 0; in sci_controller_dma_alloc()
2278 for (i = 0; i < SCI_MAX_IO_REQUESTS; i++) { in sci_controller_dma_alloc()
2293 return 0; in sci_controller_dma_alloc()
2328 return 0; in sci_controller_mem_init()
2361 " status = 0x%x\n", in isci_host_init()
2372 for (i = 0; i < isci_gpio_count(ihost); i++) in isci_host_init()
2374 writel(0, &ihost->scu_registers->peg0.sgpio.vendor_specific_code); in isci_host_init()
2376 return 0; in isci_host_init()
2425 for (index = 0; index < ihost->remote_node_entries; index++) { in sci_controller_has_remote_devices_stopping()
2439 "SCIC Controller 0x%p remote device stopped event " in sci_controller_remote_device_stopped()
2440 "from device 0x%p in unexpected state %d\n", in sci_controller_remote_device_stopped()
2590 if (isci_tci_active(ihost) == 0) in isci_free_tag()
2758 if (reg_index == 0) in sci_write_gpio_tx_gp()
2761 for (d = 0; d < isci_gpio_count(ihost); d++) { in sci_write_gpio_tx_gp()
2762 u32 val = 0x444; /* all ODx.n clear */ in sci_write_gpio_tx_gp()
2765 for (i = 0; i < 3; i++) { in sci_write_gpio_tx_gp()
2771 if (bit < 0) in sci_write_gpio_tx_gp()
2786 return d > 0; in sci_write_gpio_tx_gp()