Lines Matching +full:0 +full:x04080000

28  *	- RAID Levels 0, 5, 10
80 static unsigned int ipr_fastfail = 0;
81 static unsigned int ipr_transop_timeout = 0;
82 static unsigned int ipr_debug = 0;
92 .mailbox = 0x0042C,
94 .cache_line_size = 0x20,
96 .iopoll_weight = 0,
98 .set_interrupt_mask_reg = 0x0022C,
99 .clr_interrupt_mask_reg = 0x00230,
100 .clr_interrupt_mask_reg32 = 0x00230,
101 .sense_interrupt_mask_reg = 0x0022C,
102 .sense_interrupt_mask_reg32 = 0x0022C,
103 .clr_interrupt_reg = 0x00228,
104 .clr_interrupt_reg32 = 0x00228,
105 .sense_interrupt_reg = 0x00224,
106 .sense_interrupt_reg32 = 0x00224,
107 .ioarrin_reg = 0x00404,
108 .sense_uproc_interrupt_reg = 0x00214,
109 .sense_uproc_interrupt_reg32 = 0x00214,
110 .set_uproc_interrupt_reg = 0x00214,
111 .set_uproc_interrupt_reg32 = 0x00214,
112 .clr_uproc_interrupt_reg = 0x00218,
113 .clr_uproc_interrupt_reg32 = 0x00218
117 .mailbox = 0x0052C,
119 .cache_line_size = 0x20,
121 .iopoll_weight = 0,
123 .set_interrupt_mask_reg = 0x00288,
124 .clr_interrupt_mask_reg = 0x0028C,
125 .clr_interrupt_mask_reg32 = 0x0028C,
126 .sense_interrupt_mask_reg = 0x00288,
127 .sense_interrupt_mask_reg32 = 0x00288,
128 .clr_interrupt_reg = 0x00284,
129 .clr_interrupt_reg32 = 0x00284,
130 .sense_interrupt_reg = 0x00280,
131 .sense_interrupt_reg32 = 0x00280,
132 .ioarrin_reg = 0x00504,
133 .sense_uproc_interrupt_reg = 0x00290,
134 .sense_uproc_interrupt_reg32 = 0x00290,
135 .set_uproc_interrupt_reg = 0x00290,
136 .set_uproc_interrupt_reg32 = 0x00290,
137 .clr_uproc_interrupt_reg = 0x00294,
138 .clr_uproc_interrupt_reg32 = 0x00294
142 .mailbox = 0x00044,
144 .cache_line_size = 0x20,
145 .clear_isr = 0,
148 .set_interrupt_mask_reg = 0x00010,
149 .clr_interrupt_mask_reg = 0x00018,
150 .clr_interrupt_mask_reg32 = 0x0001C,
151 .sense_interrupt_mask_reg = 0x00010,
152 .sense_interrupt_mask_reg32 = 0x00014,
153 .clr_interrupt_reg = 0x00008,
154 .clr_interrupt_reg32 = 0x0000C,
155 .sense_interrupt_reg = 0x00000,
156 .sense_interrupt_reg32 = 0x00004,
157 .ioarrin_reg = 0x00070,
158 .sense_uproc_interrupt_reg = 0x00020,
159 .sense_uproc_interrupt_reg32 = 0x00024,
160 .set_uproc_interrupt_reg = 0x00020,
161 .set_uproc_interrupt_reg32 = 0x00024,
162 .clr_uproc_interrupt_reg = 0x00028,
163 .clr_uproc_interrupt_reg32 = 0x0002C,
164 .init_feedback_reg = 0x0005C,
165 .dump_addr_reg = 0x00064,
166 .dump_data_reg = 0x00068,
167 .endian_swap_reg = 0x00084
173 …{ PCI_VENDOR_ID_MYLEX, PCI_DEVICE_ID_IBM_GEMSTONE, false, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[0]…
174 { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CITRINE, false, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[0] },
175 …OR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_OBSIDIAN, false, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[0] },
176 { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN, false, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[0] },
177 …{ PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN_E, true, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[0] …
191 module_param_named(max_speed, ipr_max_speed, uint, 0);
192 MODULE_PARM_DESC(max_speed, "Maximum bus speed (0-2). Default: 1=U160. Speeds: 0=80 MB/s, 1=U160, 2…
193 module_param_named(log_level, ipr_log_level, uint, 0);
194 MODULE_PARM_DESC(log_level, "Set to 0 - 4 for increasing verbosity of device driver");
197 module_param_named(transop_timeout, ipr_transop_timeout, int, 0);
200 MODULE_PARM_DESC(debug, "Enable device driver debugging logging. Set to 1 to enable. (default: 0)");
201 module_param_named(dual_ioa_raid, ipr_dual_ioa_raid, int, 0);
203 module_param_named(max_devs, ipr_max_devs, int, 0);
206 module_param_named(number_of_msix, ipr_number_of_msix, int, 0);
209 MODULE_PARM_DESC(fast_reboot, "Skip adapter shutdown during reboot. Set to 1 to enable. (default: 0
216 {0x00000000, 1, IPR_DEFAULT_LOG_LEVEL,
218 {0x00330000, 0, 0,
220 {0x005A0000, 0, 0,
222 {0x00808000, 0, 0,
224 {0x01080000, 1, IPR_DEFAULT_LOG_LEVEL,
226 {0x01088100, 0, IPR_DEFAULT_LOG_LEVEL,
228 {0x01100100, 0, IPR_DEFAULT_LOG_LEVEL,
230 {0x01100300, 0, IPR_DEFAULT_LOG_LEVEL,
232 {0x01108300, 0, IPR_DEFAULT_LOG_LEVEL,
234 {0x01109000, 0, IPR_DEFAULT_LOG_LEVEL,
236 {0x01109200, 0, IPR_DEFAULT_LOG_LEVEL,
238 {0x0110A000, 0, IPR_DEFAULT_LOG_LEVEL,
240 {0x0110A100, 0, IPR_DEFAULT_LOG_LEVEL,
242 {0x01170600, 0, IPR_DEFAULT_LOG_LEVEL,
244 {0x01170900, 0, IPR_DEFAULT_LOG_LEVEL,
246 {0x01180200, 0, IPR_DEFAULT_LOG_LEVEL,
248 {0x01180500, 0, IPR_DEFAULT_LOG_LEVEL,
250 {0x01180600, 0, IPR_DEFAULT_LOG_LEVEL,
252 {0x01418000, 0, IPR_DEFAULT_LOG_LEVEL,
254 {0x01440000, 1, IPR_DEFAULT_LOG_LEVEL,
256 {0x01448100, 0, IPR_DEFAULT_LOG_LEVEL,
258 {0x01448200, 1, IPR_DEFAULT_LOG_LEVEL,
260 {0x01448300, 0, IPR_DEFAULT_LOG_LEVEL,
262 {0x014A0000, 1, IPR_DEFAULT_LOG_LEVEL,
264 {0x014A8000, 0, IPR_DEFAULT_LOG_LEVEL,
266 {0x015D0000, 0, IPR_DEFAULT_LOG_LEVEL,
268 {0x015D9200, 0, IPR_DEFAULT_LOG_LEVEL,
270 {0x02040100, 0, 0,
272 {0x02040200, 0, 0,
274 {0x02040400, 0, 0,
276 {0x02040C00, 0, 0,
278 {0x02048000, 0, IPR_DEFAULT_LOG_LEVEL,
280 {0x023F0000, 0, 0,
282 {0x02408500, 0, 0,
284 {0x02408600, 0, 0,
286 {0x024E0000, 0, 0,
288 {0x025A0000, 0, 0,
290 {0x02670100, 0, IPR_DEFAULT_LOG_LEVEL,
292 {0x03110B00, 0, 0,
294 {0x03110C00, 0, 0,
296 {0x03310000, 0, IPR_DEFAULT_LOG_LEVEL,
298 {0x04050000, 0, IPR_DEFAULT_LOG_LEVEL,
300 {0x04080000, 1, IPR_DEFAULT_LOG_LEVEL,
302 {0x04080100, 0, IPR_DEFAULT_LOG_LEVEL,
304 {0x04088000, 0, 0,
306 {0x04088100, 0, IPR_DEFAULT_LOG_LEVEL,
308 {0x04100100, 0, IPR_DEFAULT_LOG_LEVEL,
310 {0x04100300, 0, IPR_DEFAULT_LOG_LEVEL,
312 {0x04108300, 1, IPR_DEFAULT_LOG_LEVEL,
314 {0x04109000, 1, IPR_DEFAULT_LOG_LEVEL,
316 {0x04109200, 1, IPR_DEFAULT_LOG_LEVEL,
318 {0x0410A000, 0, IPR_DEFAULT_LOG_LEVEL,
320 {0x0410A100, 0, IPR_DEFAULT_LOG_LEVEL,
322 {0x04118000, 0, IPR_DEFAULT_LOG_LEVEL,
324 {0x04118100, 0, IPR_DEFAULT_LOG_LEVEL,
326 {0x04118200, 0, IPR_DEFAULT_LOG_LEVEL,
328 {0x04118300, 1, IPR_DEFAULT_LOG_LEVEL,
330 {0x04320000, 0, IPR_DEFAULT_LOG_LEVEL,
332 {0x04330000, 1, IPR_DEFAULT_LOG_LEVEL,
334 {0x04338000, 1, IPR_DEFAULT_LOG_LEVEL,
336 {0x043E0100, 0, IPR_DEFAULT_LOG_LEVEL,
338 {0x04408500, 0, IPR_DEFAULT_LOG_LEVEL,
340 {0x04418000, 1, IPR_DEFAULT_LOG_LEVEL,
342 {0x04430000, 1, 0,
344 {0x04440000, 1, IPR_DEFAULT_LOG_LEVEL,
346 {0x04448200, 1, IPR_DEFAULT_LOG_LEVEL,
348 {0x04448300, 0, IPR_DEFAULT_LOG_LEVEL,
350 {0x04448400, 0, IPR_DEFAULT_LOG_LEVEL,
352 {0x04448500, 0, 0,
354 {0x04448600, 0, IPR_DEFAULT_LOG_LEVEL,
356 {0x04448700, 0, 0,
358 {0x04490000, 0, 0,
360 {0x04449200, 0, IPR_DEFAULT_LOG_LEVEL,
362 {0x0444A000, 0, IPR_DEFAULT_LOG_LEVEL,
364 {0x0444A200, 0, IPR_DEFAULT_LOG_LEVEL,
366 {0x0444A300, 0, IPR_DEFAULT_LOG_LEVEL,
368 {0x044A0000, 1, IPR_DEFAULT_LOG_LEVEL,
370 {0x044A8000, 1, IPR_DEFAULT_LOG_LEVEL,
372 {0x04670400, 0, IPR_DEFAULT_LOG_LEVEL,
374 {0x04678000, 0, IPR_DEFAULT_LOG_LEVEL,
376 {0x04678100, 0, IPR_DEFAULT_LOG_LEVEL,
378 {0x04678200, 0, IPR_DEFAULT_LOG_LEVEL,
380 {0x04678300, 0, IPR_DEFAULT_LOG_LEVEL,
382 {0x04679000, 0, IPR_DEFAULT_LOG_LEVEL,
384 {0x04679800, 0, IPR_DEFAULT_LOG_LEVEL,
386 {0x046E0000, 0, IPR_DEFAULT_LOG_LEVEL,
388 {0x05240000, 1, 0,
390 {0x05250000, 0, 0,
392 {0x05258000, 0, 0,
394 {0x05258100, 0, 0,
396 {0x05258200, 0, 0,
398 {0x05260000, 0, 0,
400 {0x05260100, 0, 0,
402 {0x05260200, 0, 0,
404 {0x052C0000, 0, 0,
406 {0x052C8000, 1, 0,
408 {0x052C8100, 1, 0,
410 {0x054E8000, 1, 0,
412 {0x06040500, 0, IPR_DEFAULT_LOG_LEVEL,
414 {0x06040600, 0, IPR_DEFAULT_LOG_LEVEL,
416 {0x060B0100, 0, IPR_DEFAULT_LOG_LEVEL,
418 {0x060B8000, 0, IPR_DEFAULT_LOG_LEVEL,
420 {0x060B8100, 0, IPR_DEFAULT_LOG_LEVEL,
422 {0x06288000, 0, IPR_DEFAULT_LOG_LEVEL,
424 {0x06290000, 0, IPR_DEFAULT_LOG_LEVEL,
426 {0x06290500, 0, 0,
428 {0x06290600, 0, 0,
430 {0x06298000, 0, IPR_DEFAULT_LOG_LEVEL,
432 {0x063F0300, 0, IPR_DEFAULT_LOG_LEVEL,
434 {0x063F8300, 0, IPR_DEFAULT_LOG_LEVEL,
436 {0x064C8000, 0, IPR_DEFAULT_LOG_LEVEL,
438 {0x064C8100, 0, IPR_DEFAULT_LOG_LEVEL,
440 {0x06670100, 0, IPR_DEFAULT_LOG_LEVEL,
442 {0x06670600, 0, IPR_DEFAULT_LOG_LEVEL,
444 {0x06678000, 0, IPR_DEFAULT_LOG_LEVEL,
446 {0x06678100, 0, IPR_DEFAULT_LOG_LEVEL,
448 {0x06678300, 0, IPR_DEFAULT_LOG_LEVEL,
450 {0x06678400, 0, IPR_DEFAULT_LOG_LEVEL,
452 {0x06678500, 0, IPR_DEFAULT_LOG_LEVEL,
454 {0x06678600, 0, IPR_DEFAULT_LOG_LEVEL,
456 {0x06679100, 0, IPR_DEFAULT_LOG_LEVEL,
458 {0x06679800, 0, IPR_DEFAULT_LOG_LEVEL,
460 {0x06679900, 0, IPR_DEFAULT_LOG_LEVEL,
462 {0x06679A00, 0, IPR_DEFAULT_LOG_LEVEL,
464 {0x06679B00, 0, IPR_DEFAULT_LOG_LEVEL,
466 {0x06690000, 0, IPR_DEFAULT_LOG_LEVEL,
468 {0x06690200, 0, IPR_DEFAULT_LOG_LEVEL,
470 {0x06698200, 0, IPR_DEFAULT_LOG_LEVEL,
472 {0x066B0200, 0, IPR_DEFAULT_LOG_LEVEL,
474 {0x066B8000, 0, IPR_DEFAULT_LOG_LEVEL,
476 {0x066B8100, 0, IPR_DEFAULT_LOG_LEVEL,
478 {0x066B8200, 0, IPR_DEFAULT_LOG_LEVEL,
480 {0x066B8300, 0, IPR_DEBUG_LOG_LEVEL,
482 {0x066B9100, 0, IPR_DEFAULT_LOG_LEVEL,
484 {0x066B9200, 0, IPR_DEFAULT_LOG_LEVEL,
486 {0x06808100, 0, IPR_DEBUG_LOG_LEVEL,
488 {0x06808200, 0, IPR_DEBUG_LOG_LEVEL,
490 {0x07270000, 0, 0,
492 {0x07278000, 0, IPR_DEFAULT_LOG_LEVEL,
494 {0x07278100, 0, IPR_DEFAULT_LOG_LEVEL,
496 {0x07278200, 0, IPR_DEFAULT_LOG_LEVEL,
498 {0x07278400, 0, IPR_DEFAULT_LOG_LEVEL,
500 {0x07278500, 0, IPR_DEFAULT_LOG_LEVEL,
502 {0x07278600, 0, IPR_DEFAULT_LOG_LEVEL,
504 {0x07278700, 0, IPR_DEFAULT_LOG_LEVEL,
506 {0x07278800, 0, IPR_DEFAULT_LOG_LEVEL,
508 {0x07278900, 0, IPR_DEFAULT_LOG_LEVEL,
510 {0x07278A00, 0, IPR_DEFAULT_LOG_LEVEL,
512 {0x07278B00, 0, IPR_DEFAULT_LOG_LEVEL,
514 {0x07278C00, 0, IPR_DEFAULT_LOG_LEVEL,
516 {0x07278D00, 0, IPR_DEFAULT_LOG_LEVEL,
518 {0x07278F00, 0, IPR_DEFAULT_LOG_LEVEL,
520 {0x07279100, 0, IPR_DEFAULT_LOG_LEVEL,
522 {0x07279200, 0, IPR_DEFAULT_LOG_LEVEL,
524 {0x07279600, 0, IPR_DEFAULT_LOG_LEVEL,
526 {0x07279700, 0, IPR_DEFAULT_LOG_LEVEL,
528 {0x07279800, 0, IPR_DEFAULT_LOG_LEVEL,
530 {0x07279900, 0, IPR_DEFAULT_LOG_LEVEL,
532 {0x07279A00, 0, 0,
534 {0x0B260000, 0, 0,
536 {0x0B3F9000, 0, 0,
538 {0x0B530200, 0, 0,
540 {0x0B5A0000, 0, 0,
542 {0x0B5B8000, 0, 0,
592 trace_entry->op_code = ipr_cmd->ioarcb.cmd_pkt.cdb[0]; in ipr_trc_hook()
594 trace_entry->cmd_index = ipr_cmd->cmd_index & 0xff; in ipr_trc_hook()
600 #define ipr_trc_hook(ipr_cmd, type, add_data) do { } while (0)
635 memset(&ioarcb->cmd_pkt, 0, sizeof(struct ipr_cmd_pkt)); in ipr_reinit_ipr_cmnd()
637 ioarcb->data_transfer_length = 0; in ipr_reinit_ipr_cmnd()
638 ioarcb->read_data_transfer_length = 0; in ipr_reinit_ipr_cmnd()
639 ioarcb->ioadl_len = 0; in ipr_reinit_ipr_cmnd()
640 ioarcb->read_ioadl_len = 0; in ipr_reinit_ipr_cmnd()
651 ioasa->hdr.ioasc = 0; in ipr_reinit_ipr_cmnd()
652 ioasa->hdr.residual_data_len = 0; in ipr_reinit_ipr_cmnd()
654 ipr_cmd->sense_buffer[0] = 0; in ipr_reinit_ipr_cmnd()
655 ipr_cmd->dma_use_sg = 0; in ipr_reinit_ipr_cmnd()
670 ipr_cmd->u.scratch = 0; in ipr_init_ipr_cmnd()
674 timer_setup(&ipr_cmd->timer, NULL, 0); in ipr_init_ipr_cmnd()
732 for (i = 0; i < ioa_cfg->hrrq_num; i++) { in ipr_mask_and_clear_interrupts()
734 ioa_cfg->hrrq[i].allow_interrupts = 0; in ipr_mask_and_clear_interrupts()
740 writeq(~0, ioa_cfg->regs.set_interrupt_mask_reg); in ipr_mask_and_clear_interrupts()
742 writel(~0, ioa_cfg->regs.set_interrupt_mask_reg); in ipr_mask_and_clear_interrupts()
746 writel(~0, ioa_cfg->regs.clr_interrupt_reg); in ipr_mask_and_clear_interrupts()
756 * 0 on success / -EIO on failure
763 if (pcix_cmd_reg == 0) in ipr_save_pcix_cmd_reg()
764 return 0; in ipr_save_pcix_cmd_reg()
774 return 0; in ipr_save_pcix_cmd_reg()
782 * 0 on success / -EIO on failure
798 return 0; in ipr_set_pcix_cmd_reg()
902 send_dma_addr |= 0x1; in ipr_send_command()
907 send_dma_addr |= 0x4; in ipr_send_command()
939 ipr_trc_hook(ipr_cmd, IPR_TRACE_START, 0); in ipr_do_req()
1035 hrrq = 0; in ipr_get_hrrq_index()
1072 ioarcb->cmd_pkt.cdb[0] = IPR_HOST_CONTROLLED_ASYNC; in ipr_send_hcam()
1074 ioarcb->cmd_pkt.cdb[7] = (sizeof(hostrcb->hcam) >> 8) & 0xff; in ipr_send_hcam()
1075 ioarcb->cmd_pkt.cdb[8] = sizeof(hostrcb->hcam) & 0xff; in ipr_send_hcam()
1104 int found = 0; in ipr_init_res_entry()
1108 res->needs_sync_complete = 0; in ipr_init_res_entry()
1109 res->in_erp = 0; in ipr_init_res_entry()
1110 res->add_to_ml = 0; in ipr_init_res_entry()
1111 res->del_from_ml = 0; in ipr_init_res_entry()
1112 res->resetting_device = 0; in ipr_init_res_entry()
1113 res->reset_occurred = 0; in ipr_init_res_entry()
1125 res->bus = 0; in ipr_init_res_entry()
1145 res->target = 0; in ipr_init_res_entry()
1167 res->type = cfgtew->u.cfgte->rsvd_subtype & 0x0f; in ipr_init_res_entry()
1182 * 1 if the devices are the same / 0 otherwise
1201 return 0; in ipr_is_same_device()
1218 *p = '\0'; in __ipr_format_res_path()
1219 p += scnprintf(p, buffer + len - p, "%02X", res_path[0]); in __ipr_format_res_path()
1220 for (i = 1; res_path[i] != 0xff && i < IPR_RES_PATH_BYTES; i++) in __ipr_format_res_path()
1241 *p = '\0'; in ipr_format_res_path()
1259 int new_path = 0; in ipr_update_res_entry()
1292 res->type = cfgtew->u.cfgte->rsvd_subtype & 0x0f; in ipr_update_res_entry()
1322 else if (res->bus == 0 && res->type == IPR_RES_TYPE_GENERIC_SCSI) { in ipr_clear_res_target()
1328 } else if (res->bus == 0) in ipr_clear_res_target()
1359 is_ndn = 0; in ipr_handle_config_change()
1422 "Host RCB failed with IOASC: 0x%08X\n", ioasc); in ipr_process_ccn()
1446 buf[i+1] = '\0'; in strip_whitespace()
1493 buffer[IPR_VENDOR_ID_LEN + IPR_PROD_ID_LEN] = '\0'; in ipr_log_vpd()
1497 buffer[IPR_SERIAL_NUM_LEN] = '\0'; in ipr_log_vpd()
1515 be32_to_cpu(vpd->wwid[0]), be32_to_cpu(vpd->wwid[1])); in ipr_log_ext_vpd_compact()
1528 ipr_err(" WWN: %08X%08X\n", be32_to_cpu(vpd->wwid[0]), in ipr_log_ext_vpd()
1563 be32_to_cpu(error->ioa_data[0]), in ipr_log_enhanced_cache_error()
1595 be32_to_cpu(error->ioa_data[0]), in ipr_log_cache_error()
1623 for (i = 0; i < errors_logged; i++, dev_entry++) { in ipr_log_enhanced_config_error()
1664 for (i = 0; i < errors_logged; i++, dev_entry++) { in ipr_log_sis64_config_error()
1706 for (i = 0; i < errors_logged; i++, dev_entry++) { in ipr_log_config_error()
1722 be32_to_cpu(dev_entry->ioa_data[0]), in ipr_log_config_error()
1744 const u8 zero_sn[IPR_SERIAL_NUM_LEN] = { [0 ... IPR_SERIAL_NUM_LEN-1] = '0' }; in ipr_log_enhanced_array_error()
1763 for (i = 0; i < num_entries; i++, array_entry++) { in ipr_log_enhanced_array_error()
1795 const u8 zero_sn[IPR_SERIAL_NUM_LEN] = { [0 ... IPR_SERIAL_NUM_LEN-1] = '0' }; in ipr_log_array_error()
1812 for (i = 0; i < 18; i++) { in ipr_log_array_error()
1849 if (len == 0) in ipr_log_hex_data()
1855 for (i = 0; i < len / 4; i += 4) { in ipr_log_hex_data()
1882 error->failure_reason[sizeof(error->failure_reason) - 1] = '\0'; in ipr_log_enhanced_dual_ioa_error()
1908 error->failure_reason[sizeof(error->failure_reason) - 1] = '\0'; in ipr_log_dual_ioa_error()
1955 for (i = 0; i < ARRAY_SIZE(path_active_desc); i++) { in ipr_log_fabric_path()
1959 for (j = 0; j < ARRAY_SIZE(path_state_desc); j++) { in ipr_log_fabric_path()
1963 if (fabric->cascaded_expander == 0xff && fabric->phy == 0xff) { in ipr_log_fabric_path()
1967 } else if (fabric->cascaded_expander == 0xff) { in ipr_log_fabric_path()
1971 } else if (fabric->phy == 0xff) { in ipr_log_fabric_path()
2005 for (i = 0; i < ARRAY_SIZE(path_active_desc); i++) { in ipr_log64_fabric_path()
2009 for (j = 0; j < ARRAY_SIZE(path_state_desc); j++) { in ipr_log64_fabric_path()
2086 for (i = 0; i < ARRAY_SIZE(path_type_desc); i++) { in ipr_log_path_elem()
2090 for (j = 0; j < ARRAY_SIZE(path_status_desc); j++) { in ipr_log_path_elem()
2098 be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1])); in ipr_log_path_elem()
2100 if (cfg->cascaded_expander == 0xff && cfg->phy == 0xff) { in ipr_log_path_elem()
2104 be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1])); in ipr_log_path_elem()
2105 } else if (cfg->cascaded_expander == 0xff) { in ipr_log_path_elem()
2110 be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1])); in ipr_log_path_elem()
2111 } else if (cfg->phy == 0xff) { in ipr_log_path_elem()
2116 be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1])); in ipr_log_path_elem()
2122 be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1])); in ipr_log_path_elem()
2132 be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1])); in ipr_log_path_elem()
2155 for (i = 0; i < ARRAY_SIZE(path_type_desc); i++) { in ipr_log64_path_elem()
2159 for (j = 0; j < ARRAY_SIZE(path_status_desc); j++) { in ipr_log64_path_elem()
2168 be32_to_cpu(cfg->wwid[0]), in ipr_log64_path_elem()
2178 be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1])); in ipr_log64_path_elem()
2198 error->failure_reason[sizeof(error->failure_reason) - 1] = '\0'; in ipr_log_fabric_error()
2205 for (i = 0, fabric = error->desc; i < error->num_entries; i++) { in ipr_log_fabric_error()
2233 const u8 zero_sn[IPR_SERIAL_NUM_LEN] = { [0 ... IPR_SERIAL_NUM_LEN-1] = '0' }; in ipr_log_sis64_array_error()
2250 for (i = 0; i < num_entries; i++, array_entry++) { in ipr_log_sis64_array_error()
2292 error->failure_reason[sizeof(error->failure_reason) - 1] = '\0'; in ipr_log_sis64_fabric_error()
2299 for (i = 0, fabric = error->desc; i < error->num_entries; i++) { in ipr_log_sis64_fabric_error()
2327 error->failure_reason[sizeof(error->failure_reason) - 1] = '\0'; in ipr_log_sis64_service_required_error()
2367 be32_to_cpu(error->wwn[0]), be32_to_cpu(error->wwn[1]), in ipr_log_sis64_device_error()
2372 error->primary_problem_desc[sizeof(error->primary_problem_desc) - 1] = '\0'; in ipr_log_sis64_device_error()
2373 error->second_problem_desc[sizeof(error->second_problem_desc) - 1] = '\0'; in ipr_log_sis64_device_error()
2391 * 0 will be returned, which points to the entry used for unknown errors.
2400 for (i = 0; i < ARRAY_SIZE(ipr_error_table); i++) in ipr_get_error()
2404 return 0; in ipr_get_error()
2451 if (((be32_to_cpu(error->sense_data[0]) & 0x0000ff00) >> 8) == ILLEGAL_REQUEST && in ipr_handle_log_data()
2570 "Host RCB failed with IOASC: 0x%08X\n", ioasc); in ipr_process_error()
2593 unsigned long lock_flags = 0; in ipr_timeout()
2626 unsigned long lock_flags = 0; in ipr_oper_timeout()
2663 for (i = 0; i < ARRAY_SIZE(ipr_ses_table); i++, ste++) { in ipr_find_ses_entry()
2664 for (j = 0, matches = 0; j < IPR_PROD_ID_LEN; j++) { in ipr_find_ses_entry()
2725 * 0 on success / other on failure
2737 return 0; in ipr_wait_iodbg_ack()
2758 * 0 on success
2766 for (i = 0; i < length_in_words; i++) { in ipr_get_sis64_dump_data_section()
2772 return 0; in ipr_get_sis64_dump_data_section()
2783 * 0 on success / -EIO on failure
2790 int i, delay = 0; in ipr_get_ldump_data_section()
2819 for (i = 0; i < length_in_words; i++) { in ipr_get_ldump_data_section()
2857 return 0; in ipr_get_ldump_data_section()
2863 return 0; in ipr_get_ldump_data_section()
2876 * 0 on success / other on failure
2881 int bytes_copied = 0; in ipr_sdt_copy()
2884 unsigned long lock_flags = 0; in ipr_sdt_copy()
2895 ioa_dump->page_offset == 0) { in ipr_sdt_copy()
2903 ioa_dump->page_offset = 0; in ipr_sdt_copy()
2973 (ucode_vpd->card_type << 16) | (ucode_vpd->minor_release[0] << 8) | in ipr_dump_ioa_type_data()
3052 unsigned long lock_flags = 0; in ipr_get_ioa_dump()
3107 ioa_dump->hdr.len = 0; in ipr_get_ioa_dump()
3156 for (i = 0; i < num_entries; i++) { in ipr_get_ioa_dump()
3173 valid = 0; in ipr_get_ioa_dump()
3205 #define ipr_get_ioa_dump(ioa_cfg, dump) do { } while (0)
3219 unsigned long lock_flags = 0; in ipr_release_dump()
3228 for (i = 0; i < dump->ioa_dump.next_page_index; i++) in ipr_release_dump()
3251 did_work = 0; in ipr_add_remove_thread()
3265 res->del_from_ml = 0; in ipr_add_remove_thread()
3281 res->add_to_ml = 0; in ipr_add_remove_thread()
3335 ioa_cfg->scsi_unblock = 0; in ipr_worker_thread()
3336 ioa_cfg->scsi_blocked = 0; in ipr_worker_thread()
3375 unsigned long lock_flags = 0; in ipr_read_trace()
3391 .size = 0,
3411 unsigned long lock_flags = 0; in ipr_show_fw_version()
3417 ucode_vpd->minor_release[0], in ipr_show_fw_version()
3445 unsigned long lock_flags = 0; in ipr_show_log_level()
3470 unsigned long lock_flags = 0; in ipr_store_log_level()
3506 unsigned long lock_flags = 0; in ipr_store_diagnostics()
3519 ioa_cfg->errors_logged = 0; in ipr_store_diagnostics()
3563 unsigned long lock_flags = 0; in ipr_show_adapter_state()
3602 for (i = 0; i < ioa_cfg->hrrq_num; i++) { in ipr_store_adapter_state()
3604 ioa_cfg->hrrq[i].ioa_is_dead = 0; in ipr_store_adapter_state()
3608 ioa_cfg->reset_retries = 0; in ipr_store_adapter_state()
3609 ioa_cfg->in_ioa_bringdown = 0; in ipr_store_adapter_state()
3683 unsigned long lock_flags = 0; in ipr_show_iopoll_weight()
3710 unsigned long lock_flags = 0; in ipr_store_iopoll_weight()
3821 * 0 on success / other on failure
3826 int bsize_elem, i, result = 0; in ipr_copy_ucode_buffer()
3834 for (i = 0; i < (len / bsize_elem); i++, sg = sg_next(sg), in ipr_copy_ucode_buffer()
3838 memcpy_to_page(page, 0, buffer, bsize_elem); in ipr_copy_ucode_buffer()
3842 if (result != 0) { in ipr_copy_ucode_buffer()
3851 memcpy_to_page(page, 0, buffer, len % bsize_elem); in ipr_copy_ucode_buffer()
3935 * 0 on success / -EIO on failure
3975 return 0; in ipr_update_ioa_ucode()
4011 *endline = '\0'; in ipr_store_update_fw()
4072 unsigned long lock_flags = 0; in ipr_show_fw_type()
4097 unsigned long lock_flags = 0; in ipr_read_async_err_log()
4105 return 0; in ipr_read_async_err_log()
4121 unsigned long lock_flags = 0; in ipr_next_async_err_log()
4142 .size = 0,
4182 unsigned long lock_flags = 0; in ipr_read_dump()
4195 return 0; in ipr_read_dump()
4202 return 0; in ipr_read_dump()
4268 * 0 on success / other on failure
4274 unsigned long lock_flags = 0; in ipr_alloc_dump()
4307 return 0; in ipr_alloc_dump()
4318 return 0; in ipr_alloc_dump()
4326 * 0 on success / other on failure
4331 unsigned long lock_flags = 0; in ipr_free_dump()
4339 return 0; in ipr_free_dump()
4348 return 0; in ipr_free_dump()
4375 if (buf[0] == '1') in ipr_write_dump()
4377 else if (buf[0] == '0') in ipr_write_dump()
4393 .size = 0,
4398 static int ipr_free_dump(struct ipr_ioa_cfg *ioa_cfg) { return 0; }; in ipr_free_dump()
4429 unsigned long lock_flags = 0; in ipr_show_adapter_handle()
4463 unsigned long lock_flags = 0; in ipr_show_resource_path()
4503 unsigned long lock_flags = 0; in ipr_show_device_id()
4509 len = snprintf(buf, PAGE_SIZE, "0x%llx\n", be64_to_cpu(res->dev_id)); in ipr_show_device_id()
4511 len = snprintf(buf, PAGE_SIZE, "0x%llx\n", res->lun_wwn); in ipr_show_device_id()
4539 unsigned long lock_flags = 0; in ipr_show_resource_type()
4575 unsigned long lock_flags = 0; in ipr_show_raw_mode()
4605 unsigned long lock_flags = 0; in ipr_store_raw_mode()
4657 * 0 on success
4673 parm[0] = heads; in ipr_biosparam()
4677 return 0; in ipr_biosparam()
4719 else if (starget->channel == 0) in ipr_target_destroy()
4758 unsigned long lock_flags = 0; in ipr_sdev_destroy()
4779 * 0 on success
4786 unsigned long lock_flags = 0; in ipr_sdev_configure()
4811 return 0; in ipr_sdev_configure()
4814 return 0; in ipr_sdev_configure()
4827 * 0 on success / -ENXIO if device does not exist
4843 res->add_to_ml = 0; in ipr_sdev_init()
4844 res->in_erp = 0; in ipr_sdev_init()
4848 rc = 0; in ipr_sdev_init()
4868 * 1 if command matches sdev / 0 if command does not match sdev
4874 return 0; in ipr_match_lun()
4917 wait = 0; in ipr_wait_for_ops()
4937 wait = 0; in ipr_wait_for_ops()
4968 unsigned long lock_flags = 0; in ipr_eh_host_reset()
5011 * 0 on success / non-zero on failure
5031 cmd_pkt->cdb[0] = IPR_RESET_DEVICE; in ipr_device_reset()
5038 return IPR_IOASC_SENSE_KEY(ioasc) ? -EIO : 0; in ipr_device_reset()
5056 int rc = 0; in __ipr_eh_dev_reset()
5076 res->resetting_device = 0; in __ipr_eh_dev_reset()
5158 unsigned long lock_flags = 0; in ipr_abort_timeout()
5174 cmd_pkt->cdb[0] = IPR_RESET_DEVICE; in ipr_abort_timeout()
5198 int i, op_found = 0; in ipr_cancel_op()
5245 cmd_pkt->cdb[0] = IPR_CANCEL_ALL_REQUESTS; in ipr_cancel_op()
5249 scsi_cmd->cmnd[0]); in ipr_cancel_op()
5258 ioasc = 0; in ipr_cancel_op()
5276 * 0 if scan in progress / 1 if scan is complete
5282 int rc = 0; in ipr_scan_finished()
5340 if ((int_reg & IPR_PCII_OPER_INTERRUPTS) == 0) { in ipr_handle_other_interrupt()
5371 "Spurious interrupt detected. 0x%08X\n", int_reg); in ipr_handle_other_interrupt()
5381 "No Host RRQ. 0x%08X\n", int_reg); in ipr_handle_other_interrupt()
5384 "Permanent IOA failure. 0x%08X\n", int_reg); in ipr_handle_other_interrupt()
5389 ipr_mask_and_clear_interrupts(ioa_cfg, ~0); in ipr_handle_other_interrupt()
5423 int num_hrrq = 0; in ipr_process_hrrq()
5427 return 0; in ipr_process_hrrq()
5458 if (budget > 0 && num_hrrq >= budget) in ipr_process_hrrq()
5503 unsigned long hrrq_flags = 0; in ipr_isr()
5504 u32 int_reg = 0; in ipr_isr()
5505 int num_hrrq = 0; in ipr_isr()
5506 int irq_none = 0; in ipr_isr()
5526 num_hrrq = 0; in ipr_isr()
5534 } else if (rc == IRQ_NONE && irq_none == 0) { in ipr_isr()
5571 unsigned long hrrq_flags = 0; in ipr_isr_mhrrq()
5615 * 0 on success / -1 on failure
5623 u32 ioadl_flags = 0; in ipr_build_ioadl64()
5630 return 0; in ipr_build_ioadl64()
5633 if (nseg < 0) { in ipr_build_ioadl64()
5658 return 0; in ipr_build_ioadl64()
5667 * 0 on success / -1 on failure
5675 u32 ioadl_flags = 0; in ipr_build_ioadl()
5682 return 0; in ipr_build_ioadl()
5685 if (nseg < 0) { in ipr_build_ioadl()
5719 return 0; in ipr_build_ioadl()
5738 if (IPR_IOASC_SENSE_KEY(ioasc) > 0) { in __ipr_erp_done()
5741 "Request Sense failed with IOASC: 0x%08X\n", ioasc); in __ipr_erp_done()
5750 res->in_erp = 0; in __ipr_erp_done()
5792 memset(&ioarcb->cmd_pkt, 0, sizeof(struct ipr_cmd_pkt)); in ipr_reinit_ipr_cmnd_for_erp()
5793 ioarcb->data_transfer_length = 0; in ipr_reinit_ipr_cmnd_for_erp()
5794 ioarcb->read_data_transfer_length = 0; in ipr_reinit_ipr_cmnd_for_erp()
5795 ioarcb->ioadl_len = 0; in ipr_reinit_ipr_cmnd_for_erp()
5796 ioarcb->read_ioadl_len = 0; in ipr_reinit_ipr_cmnd_for_erp()
5797 ioasa->hdr.ioasc = 0; in ipr_reinit_ipr_cmnd_for_erp()
5798 ioasa->hdr.residual_data_len = 0; in ipr_reinit_ipr_cmnd_for_erp()
5825 if (IPR_IOASC_SENSE_KEY(ioasc) > 0) { in __ipr_erp_request_sense()
5833 cmd_pkt->cdb[0] = REQUEST_SENSE; in __ipr_erp_request_sense()
5895 cmd_pkt->cdb[0] = IPR_CANCEL_ALL_REQUESTS; in ipr_erp_cancel_all()
5927 if (0 == ioasc) in ipr_dump_ioasa()
5940 if (ioasa->hdr.ilid != 0) in ipr_dump_ioasa()
5946 if (ipr_error_table[error_index].log_ioasa == 0) in ipr_dump_ioasa()
5960 for (i = 0; i < data_len / 4; i += 4) { in ipr_dump_ioasa()
5984 memset(sense_buf, 0, SCSI_SENSE_BUFFERSIZE); in ipr_gen_sense()
5993 ioasa->u.vset.failing_lba_hi != 0) { in ipr_gen_sense()
5994 sense_buf[0] = 0x72; in ipr_gen_sense()
6000 sense_buf[8] = 0; in ipr_gen_sense()
6001 sense_buf[9] = 0x0A; in ipr_gen_sense()
6002 sense_buf[10] = 0x80; in ipr_gen_sense()
6006 sense_buf[12] = (failing_lba & 0xff000000) >> 24; in ipr_gen_sense()
6007 sense_buf[13] = (failing_lba & 0x00ff0000) >> 16; in ipr_gen_sense()
6008 sense_buf[14] = (failing_lba & 0x0000ff00) >> 8; in ipr_gen_sense()
6009 sense_buf[15] = failing_lba & 0x000000ff; in ipr_gen_sense()
6013 sense_buf[16] = (failing_lba & 0xff000000) >> 24; in ipr_gen_sense()
6014 sense_buf[17] = (failing_lba & 0x00ff0000) >> 16; in ipr_gen_sense()
6015 sense_buf[18] = (failing_lba & 0x0000ff00) >> 8; in ipr_gen_sense()
6016 sense_buf[19] = failing_lba & 0x000000ff; in ipr_gen_sense()
6018 sense_buf[0] = 0x70; in ipr_gen_sense()
6024 if ((IPR_IOASC_SENSE_KEY(ioasc) == 0x05) && in ipr_gen_sense()
6029 if (IPR_IOASC_SENSE_CODE(ioasc) == 0x24) in ipr_gen_sense()
6030 sense_buf[15] = 0xC0; in ipr_gen_sense()
6032 sense_buf[15] = 0x80; in ipr_gen_sense()
6036 be32_to_cpu(ioasa->hdr.ioasc_specific)) >> 8) & 0xff; in ipr_gen_sense()
6039 be32_to_cpu(ioasa->hdr.ioasc_specific)) & 0xff; in ipr_gen_sense()
6047 sense_buf[0] |= 0x80; /* Or in the Valid bit */ in ipr_gen_sense()
6048 sense_buf[3] = (failing_lba & 0xff000000) >> 24; in ipr_gen_sense()
6049 sense_buf[4] = (failing_lba & 0x00ff0000) >> 16; in ipr_gen_sense()
6050 sense_buf[5] = (failing_lba & 0x0000ff00) >> 8; in ipr_gen_sense()
6051 sense_buf[6] = failing_lba & 0x000000ff; in ipr_gen_sense()
6067 * 1 if autosense was available / 0 if not
6074 if ((be32_to_cpu(ioasa->hdr.ioasc_specific) & IPR_AUTOSENSE_VALID) == 0) in ipr_get_autosense()
6075 return 0; in ipr_get_autosense()
6176 res->raw_mode = 0; in ipr_erp_start()
6215 if (likely(IPR_IOASC_SENSE_KEY(ioasc) == 0)) { in ipr_scsi_done()
6241 * 0 on success
6300 if (scsi_cmd->underflow == 0) in ipr_queuecommand()
6304 res->reset_occurred = 0; in ipr_queuecommand()
6319 if (scsi_cmd->cmnd[0] >= 0xC0 && in ipr_queuecommand()
6320 (!ipr_is_gscsi(res) || scsi_cmd->cmnd[0] == IPR_QUERY_RSRC_STATE)) { in ipr_queuecommand()
6326 if (scsi_cmd->underflow == 0) in ipr_queuecommand()
6354 res->needs_sync_complete = 0; in ipr_queuecommand()
6360 return 0; in ipr_queuecommand()
6364 memset(scsi_cmd->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE); in ipr_queuecommand()
6368 return 0; in ipr_queuecommand()
6382 unsigned long lock_flags = 0; in ipr_ioa_info()
6440 ioa_cfg->in_reset_reload = 0; in ipr_ioa_bringdown_done()
6441 ioa_cfg->reset_retries = 0; in ipr_ioa_bringdown_done()
6442 for (i = 0; i < ioa_cfg->hrrq_num; i++) { in ipr_ioa_bringdown_done()
6474 ioa_cfg->in_reset_reload = 0; in ipr_ioa_reset_done()
6475 for (j = 0; j < ioa_cfg->hrrq_num; j++) { in ipr_ioa_reset_done()
6492 for (j = 0; j < IPR_NUM_HCAMS; j++) { in ipr_ioa_reset_done()
6507 ioa_cfg->reset_retries = 0; in ipr_ioa_reset_done()
6528 memset(supported_dev, 0, sizeof(struct ipr_supported_device)); in ipr_set_sup_dev_dflt()
6533 supported_dev->reserved = 0; in ipr_set_sup_dev_dflt()
6565 ioarcb->cmd_pkt.cdb[0] = IPR_SET_SUPPORTED_DEVICES; in ipr_set_supported_devs()
6567 ioarcb->cmd_pkt.cdb[7] = (sizeof(struct ipr_supported_device) >> 8) & 0xff; in ipr_set_supported_devs()
6568 ioarcb->cmd_pkt.cdb[8] = sizeof(struct ipr_supported_device) & 0xff; in ipr_set_supported_devs()
6605 if (!mode_pages || (mode_pages->hdr.length == 0)) in ipr_get_mode_page()
6646 mode_page = ipr_get_mode_page(mode_pages, 0x28, in ipr_check_term_power()
6653 for (i = 0; i < mode_page->num_entries; i++) { in ipr_check_term_power()
6680 for (i = 0; i < IPR_MAX_NUM_BUSES; i++) { in ipr_scsi_bus_speed_limit()
6707 mode_page = ipr_get_mode_page(mode_pages, 0x28, in ipr_modify_ioafp_mode_page_28()
6713 for (i = 0, bus = mode_page->bus; in ipr_modify_ioafp_mode_page_28()
6718 "Invalid resource address reported: 0x%08X\n", in ipr_modify_ioafp_mode_page_28()
6755 ioarcb->cmd_pkt.cdb[0] = MODE_SELECT; in ipr_build_mode_select()
6783 mode_pages->hdr.length = 0; in ipr_ioafp_mode_select_page28()
6785 ipr_build_mode_select(ipr_cmd, cpu_to_be32(IPR_IOA_RES_HANDLE), 0x11, in ipr_ioafp_mode_select_page28()
6816 ioarcb->cmd_pkt.cdb[0] = MODE_SENSE; in ipr_build_mode_sense()
6839 "0x%02X failed with IOASC: 0x%08X\n", in ipr_reset_cmd_failed()
6840 ipr_cmd->ioarcb.cmd_pkt.cdb[0], ioasc); in ipr_reset_cmd_failed()
6888 0x28, ioa_cfg->vpd_cbs_dma + in ipr_ioafp_mode_sense_page28()
6918 mode_page = ipr_get_mode_page(mode_pages, 0x24, in ipr_ioafp_mode_select_page24()
6925 mode_pages->hdr.length = 0; in ipr_ioafp_mode_select_page24()
6927 ipr_build_mode_select(ipr_cmd, cpu_to_be32(IPR_IOA_RES_HANDLE), 0x11, in ipr_ioafp_mode_select_page24()
6976 0x24, ioa_cfg->vpd_cbs_dma + in ipr_ioafp_mode_sense_page24()
7026 for (i = 0; i < entries; i++) { in ipr_init_res_table()
7031 found = 0; in ipr_init_res_table()
7104 ucode_vpd->minor_release[0], ucode_vpd->minor_release[1]); in ipr_ioafp_query_ioa_cfg()
7108 ioarcb->cmd_pkt.cdb[0] = IPR_QUERY_IOA_CONFIG; in ipr_ioafp_query_ioa_cfg()
7109 ioarcb->cmd_pkt.cdb[6] = (ioa_cfg->cfg_table_size >> 16) & 0xff; in ipr_ioafp_query_ioa_cfg()
7110 ioarcb->cmd_pkt.cdb[7] = (ioa_cfg->cfg_table_size >> 8) & 0xff; in ipr_ioafp_query_ioa_cfg()
7111 ioarcb->cmd_pkt.cdb[8] = ioa_cfg->cfg_table_size & 0xff; in ipr_ioafp_query_ioa_cfg()
7140 ioarcb->cmd_pkt.cdb[0] = IPR_IOA_SERVICE_ACTION; in ipr_build_ioa_service_action()
7163 if (pageC4->cache_cap[0] & IPR_CAP_SYNC_CACHE) { in ipr_ioafp_set_caching_parameters()
7168 ioarcb->cmd_pkt.cdb[2] = 0x40; in ipr_ioafp_set_caching_parameters()
7204 ioarcb->cmd_pkt.cdb[0] = INQUIRY; in ipr_ioafp_inquiry()
7217 * @page0: inquiry page 0 buffer
7223 * 1 if page is supported / 0 if not
7229 for (i = 0; i < min_t(u8, page0->len, IPR_INQUIRY_PAGE0_ENTRIES); i++) in ipr_inquiry_page_supported()
7233 return 0; in ipr_inquiry_page_supported()
7237 * ipr_ioafp_pageC4_inquiry - Send a Page 0xC4 Inquiry to the adapter.
7240 * This function sends a Page 0xC4 inquiry to the adapter
7254 memset(pageC4, 0, sizeof(*pageC4)); in ipr_ioafp_pageC4_inquiry()
7256 if (ipr_inquiry_page_supported(page0, 0xC4)) { in ipr_ioafp_pageC4_inquiry()
7257 ipr_ioafp_inquiry(ipr_cmd, 1, 0xC4, in ipr_ioafp_pageC4_inquiry()
7270 * ipr_ioafp_cap_inquiry - Send a Page 0xD0 Inquiry to the adapter.
7273 * This function sends a Page 0xD0 inquiry to the adapter
7287 memset(cap, 0, sizeof(*cap)); in ipr_ioafp_cap_inquiry()
7289 if (ipr_inquiry_page_supported(page0, 0xD0)) { in ipr_ioafp_cap_inquiry()
7290 ipr_ioafp_inquiry(ipr_cmd, 1, 0xD0, in ipr_ioafp_cap_inquiry()
7327 * ipr_ioafp_page0_inquiry - Send a Page 0 Inquiry to the adapter.
7330 * This function sends a Page 0 inquiry to the adapter
7345 type[4] = '\0'; in ipr_ioafp_page0_inquiry()
7350 ipr_ioafp_inquiry(ipr_cmd, 1, 0, in ipr_ioafp_page0_inquiry()
7374 ipr_ioafp_inquiry(ipr_cmd, 0, 0, in ipr_ioafp_std_inquiry()
7400 if (ioa_cfg->identify_hrrq_index == 0) in ipr_ioafp_identify_hrrq()
7406 ioarcb->cmd_pkt.cdb[0] = IPR_ID_HOST_RR_Q; in ipr_ioafp_identify_hrrq()
7411 ioarcb->cmd_pkt.cdb[1] = 0x1; in ipr_ioafp_identify_hrrq()
7419 ((u64) hrrq->host_rrq_dma >> 24) & 0xff; in ipr_ioafp_identify_hrrq()
7421 ((u64) hrrq->host_rrq_dma >> 16) & 0xff; in ipr_ioafp_identify_hrrq()
7423 ((u64) hrrq->host_rrq_dma >> 8) & 0xff; in ipr_ioafp_identify_hrrq()
7425 ((u64) hrrq->host_rrq_dma) & 0xff; in ipr_ioafp_identify_hrrq()
7427 ((sizeof(u32) * hrrq->size) >> 8) & 0xff; in ipr_ioafp_identify_hrrq()
7429 (sizeof(u32) * hrrq->size) & 0xff; in ipr_ioafp_identify_hrrq()
7437 ((u64) hrrq->host_rrq_dma >> 56) & 0xff; in ipr_ioafp_identify_hrrq()
7439 ((u64) hrrq->host_rrq_dma >> 48) & 0xff; in ipr_ioafp_identify_hrrq()
7441 ((u64) hrrq->host_rrq_dma >> 40) & 0xff; in ipr_ioafp_identify_hrrq()
7443 ((u64) hrrq->host_rrq_dma >> 32) & 0xff; in ipr_ioafp_identify_hrrq()
7481 unsigned long lock_flags = 0; in ipr_reset_timer_done()
7533 memset(hrrq->host_rrq, 0, sizeof(u32) * hrrq->size); in ipr_init_ioa_mem()
7544 ioa_cfg->identify_hrrq_index = 0; in ipr_init_ioa_mem()
7546 atomic_set(&ioa_cfg->hrrq_index, 0); in ipr_init_ioa_mem()
7551 memset(ioa_cfg->u.cfg_table, 0, ioa_cfg->cfg_table_size); in ipr_init_ioa_mem()
7567 u64 maskval = 0; in ipr_reset_next_stage()
7573 ipr_dbg("IPL stage = 0x%lx, IPL stage time = %ld\n", stage, stage_time); in ipr_reset_next_stage()
7576 if (stage_time == 0) in ipr_reset_next_stage()
7631 for (i = 0; i < ioa_cfg->hrrq_num; i++) { in ipr_reset_enable_ioa()
7746 memset(&sdt, 0, sizeof(struct ipr_uc_sdt)); in ipr_get_unit_check_buffer()
7750 if (rc || !(sdt.entry[0].flags & IPR_SDT_VALID_ENTRY) || in ipr_get_unit_check_buffer()
7759 length = be32_to_cpu(sdt.entry[0].end_token); in ipr_get_unit_check_buffer()
7761 length = (be32_to_cpu(sdt.entry[0].end_token) - in ipr_get_unit_check_buffer()
7762 be32_to_cpu(sdt.entry[0].start_token)) & in ipr_get_unit_check_buffer()
7768 memset(&hostrcb->hcam, 0, sizeof(hostrcb->hcam)); in ipr_get_unit_check_buffer()
7771 be32_to_cpu(sdt.entry[0].start_token), in ipr_get_unit_check_buffer()
7801 ioa_cfg->ioa_unit_checked = 0; in ipr_reset_get_unit_check_job()
7804 ipr_reset_start_timer(ipr_cmd, 0); in ipr_reset_get_unit_check_job()
7828 ioa_cfg->dump_timeout = 0; in ipr_dump_mailbox_wait()
7884 ioa_cfg->ioa_unit_checked = 0; in ipr_reset_restore_cfg_space()
7887 ipr_reset_start_timer(ipr_cmd, 0); in ipr_reset_restore_cfg_space()
7921 ioa_cfg->cfg_locked = 0; in ipr_reset_bist_done()
7955 ioa_cfg->cfg_locked = 0; in ipr_reset_start_bist()
7994 unsigned long lock_flags = 0; in ipr_reset_reset_work()
8073 ipr_cmd->ioa_cfg->cfg_locked = 0; in ipr_reset_block_config_access()
8084 * 0 if reset not allowed / non-zero if reset is allowed
8091 return ((temp_reg & IPR_PCII_CRITICAL_OPERATION) == 0); in ipr_reset_allowed()
8147 ipr_mask_and_clear_interrupts(ioa_cfg, ~0); in ipr_reset_alert()
8197 int count = 0; in ipr_reset_cancel_hcam_done()
8244 if (hcam_cmd->ioarcb.cmd_pkt.cdb[0] != IPR_HOST_CONTROLLED_ASYNC) in ipr_reset_cancel_hcam()
8251 cmd_pkt->cdb[0] = IPR_CANCEL_REQUEST; in ipr_reset_cancel_hcam()
8253 cmd_pkt->cdb[10] = ((u64) hcam_cmd->dma_addr >> 56) & 0xff; in ipr_reset_cancel_hcam()
8254 cmd_pkt->cdb[11] = ((u64) hcam_cmd->dma_addr >> 48) & 0xff; in ipr_reset_cancel_hcam()
8255 cmd_pkt->cdb[12] = ((u64) hcam_cmd->dma_addr >> 40) & 0xff; in ipr_reset_cancel_hcam()
8256 cmd_pkt->cdb[13] = ((u64) hcam_cmd->dma_addr >> 32) & 0xff; in ipr_reset_cancel_hcam()
8257 cmd_pkt->cdb[2] = ((u64) hcam_cmd->dma_addr >> 24) & 0xff; in ipr_reset_cancel_hcam()
8258 cmd_pkt->cdb[3] = ((u64) hcam_cmd->dma_addr >> 16) & 0xff; in ipr_reset_cancel_hcam()
8259 cmd_pkt->cdb[4] = ((u64) hcam_cmd->dma_addr >> 8) & 0xff; in ipr_reset_cancel_hcam()
8260 cmd_pkt->cdb[5] = ((u64) hcam_cmd->dma_addr) & 0xff; in ipr_reset_cancel_hcam()
8321 ipr_cmd->ioarcb.cmd_pkt.cdb[0] = WRITE_BUFFER; in ipr_reset_ucode_download()
8323 ipr_cmd->ioarcb.cmd_pkt.cdb[6] = (sglist->buffer_len & 0xff0000) >> 16; in ipr_reset_ucode_download()
8324 ipr_cmd->ioarcb.cmd_pkt.cdb[7] = (sglist->buffer_len & 0x00ff00) >> 8; in ipr_reset_ucode_download()
8325 ipr_cmd->ioarcb.cmd_pkt.cdb[8] = sglist->buffer_len & 0x0000ff; in ipr_reset_ucode_download()
8365 ipr_cmd->ioarcb.cmd_pkt.cdb[0] = IPR_IOA_SHUTDOWN; in ipr_reset_shutdown_ioa()
8449 for (i = 0; i < ioa_cfg->hrrq_num; i++) { in _ipr_initiate_ioa_reset()
8451 ioa_cfg->hrrq[i].allow_cmds = 0; in _ipr_initiate_ioa_reset()
8456 ioa_cfg->scsi_unblock = 0; in _ipr_initiate_ioa_reset()
8500 ioa_cfg->reset_retries = 0; in ipr_initiate_ioa_reset()
8501 for (i = 0; i < ioa_cfg->hrrq_num; i++) { in ipr_initiate_ioa_reset()
8510 ioa_cfg->in_reset_reload = 0; in ipr_initiate_ioa_reset()
8543 for (i = 0; i < ioa_cfg->hrrq_num; i++) { in ipr_reset_freeze()
8545 ioa_cfg->hrrq[i].allow_interrupts = 0; in ipr_reset_freeze()
8563 unsigned long flags = 0; in ipr_pci_mmio_enabled()
8583 unsigned long flags = 0; in ipr_pci_frozen()
8602 unsigned long flags = 0; in ipr_pci_slot_reset()
8627 unsigned long flags = 0; in ipr_pci_perm_failure()
8637 for (i = 0; i < ioa_cfg->hrrq_num; i++) { in ipr_pci_perm_failure()
8639 ioa_cfg->hrrq[i].allow_cmds = 0; in ipr_pci_perm_failure()
8687 unsigned long host_lock_flags = 0; in ipr_probe_ioa_part2()
8691 dev_dbg(&ioa_cfg->pdev->dev, "ioa_cfg adx: 0x%p\n", ioa_cfg); in ipr_probe_ioa_part2()
8694 ioa_cfg->needs_hard_reset = 0; in ipr_probe_ioa_part2()
8716 for (i = 0; i < IPR_NUM_CMD_BLKS; i++) { in ipr_free_cmd_blks()
8751 for (i = 0; i < ioa_cfg->hrrq_num; i++) in ipr_free_mem()
8760 for (i = 0; i < IPR_MAX_HCAMS; i++) { in ipr_free_mem()
8786 for (i = 0; i < ioa_cfg->nvectors; i++) in ipr_free_irqs()
8822 * 0 on success / -ENOMEM on allocation failure
8829 int i, entries_each_hrrq, hrrq_id = 0; in ipr_alloc_cmd_blks()
8832 sizeof(struct ipr_cmnd), 512, 0); in ipr_alloc_cmd_blks()
8845 for (i = 0; i < ioa_cfg->hrrq_num; i++) { in ipr_alloc_cmd_blks()
8847 if (i == 0) { in ipr_alloc_cmd_blks()
8849 ioa_cfg->hrrq[i].min_cmd_id = 0; in ipr_alloc_cmd_blks()
8865 ioa_cfg->hrrq[i].min_cmd_id = 0; in ipr_alloc_cmd_blks()
8871 BUG_ON(ioa_cfg->hrrq_num == 0); in ipr_alloc_cmd_blks()
8875 if (i > 0) { in ipr_alloc_cmd_blks()
8880 for (i = 0; i < IPR_NUM_CMD_BLKS; i++) { in ipr_alloc_cmd_blks()
8925 return 0; in ipr_alloc_cmd_blks()
8933 * 0 on success / non-zero for error
8948 for (i = 0; i < ioa_cfg->max_devs_supported; i++) { in ipr_alloc_mem()
8964 for (i = 0; i < ioa_cfg->hrrq_num; i++) { in ipr_alloc_mem()
8971 while (--i >= 0) in ipr_alloc_mem()
8989 for (i = 0; i < IPR_MAX_HCAMS; i++) { in ipr_alloc_mem()
9011 rc = 0; in ipr_alloc_mem()
9017 while (i-- > 0) { in ipr_alloc_mem()
9025 for (i = 0; i < ioa_cfg->hrrq_num; i++) { in ipr_alloc_mem()
9052 for (i = 0; i < IPR_MAX_NUM_BUSES; i++) { in ipr_initialize_bus_attr()
9054 ioa_cfg->bus_attr[i].qas_enabled = 0; in ipr_initialize_bus_attr()
9170 for (i = 0; i < ARRAY_SIZE(ioa_cfg->hrrq); i++) { in ipr_init_ioa_cfg()
9174 if (i == 0) in ipr_init_ioa_cfg()
9193 for (i = 0; i < ARRAY_SIZE(ipr_chip); i++) in ipr_get_chip_info()
9222 int vec_idx, n = sizeof(ioa_cfg->vectors_info[0].desc) - 1; in name_msi_vectors()
9224 for (vec_idx = 0; vec_idx < ioa_cfg->nvectors; vec_idx++) { in name_msi_vectors()
9228 desc[strlen(ioa_cfg->vectors_info[vec_idx].desc)] = 0; in name_msi_vectors()
9240 0, in ipr_request_other_msi_irqs()
9244 while (--i > 0) in ipr_request_other_msi_irqs()
9250 return 0; in ipr_request_other_msi_irqs()
9262 * 0 on success / non-zero on failure
9267 unsigned long lock_flags = 0; in ipr_test_intr()
9289 * 0 on success / non-zero on failure
9294 unsigned long lock_flags = 0; in ipr_test_msi()
9295 int irq = pci_irq_vector(pdev, 0); in ipr_test_msi()
9301 ioa_cfg->msi_received = 0; in ipr_test_msi()
9307 rc = request_irq(irq, ipr_test_intr, 0, IPR_NAME, ioa_cfg); in ipr_test_msi()
9341 * 0 on success / non-zero on failure
9367 memset(ioa_cfg, 0, sizeof(struct ipr_ioa_cfg)); in ipr_probe_ioa()
9372 dev_err(&pdev->dev, "Unknown adapter chipset 0x%04X 0x%04X\n", in ipr_probe_ioa()
9378 ioa_cfg->sis64 = ioa_cfg->ipr_chip->sis_type == IPR_SIS64 ? 1 : 0; in ipr_probe_ioa()
9394 ipr_regs_pci = pci_resource_start(pdev, 0); in ipr_probe_ioa()
9397 if (rc < 0) { in ipr_probe_ioa()
9418 ipr_regs = pci_ioremap_bar(pdev, 0); in ipr_probe_ioa()
9435 if (rc < 0) { in ipr_probe_ioa()
9443 if (rc < 0) { in ipr_probe_ioa()
9472 if (rc < 0) { in ipr_probe_ioa()
9495 case 0: in ipr_probe_ioa()
9523 if (rc < 0) { in ipr_probe_ioa()
9545 if ((mask & IPR_PCII_HRRQ_UPDATED) == 0 || (uproc & IPR_UPROCI_RESET_ALERT)) in ipr_probe_ioa()
9558 rc = request_irq(pci_irq_vector(pdev, 0), ipr_isr, 0, in ipr_probe_ioa()
9559 ioa_cfg->vectors_info[0].desc, in ipr_probe_ioa()
9560 &ioa_cfg->hrrq[0]); in ipr_probe_ioa()
9566 IPR_NAME, &ioa_cfg->hrrq[0]); in ipr_probe_ioa()
9636 ioa_cfg->reset_retries = 0; in ipr_initiate_ioa_bringdown()
9653 unsigned long host_lock_flags = 0; in __ipr_remove()
9666 for (i = 0; i < ioa_cfg->hrrq_num; i++) { in __ipr_remove()
9729 * 0 on success / non-zero on failure
9802 return 0; in ipr_probe()
9818 unsigned long lock_flags = 0; in ipr_shutdown()
9824 ioa_cfg->iopoll_weight = 0; in ipr_shutdown()
9849 PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_5702, 0, 0, 0 },
9851 PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_5703, 0, 0, 0 },
9853 PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_573D, 0, 0, 0 },
9855 PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_573E, 0, 0, 0 },
9857 PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_571B, 0, 0, 0 },
9859 PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_572E, 0, 0, 0 },
9861 PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_571A, 0, 0, 0 },
9863 PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_575B, 0, 0,
9866 PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_572A, 0, 0, 0 },
9868 PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_572B, 0, 0,
9871 PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_575C, 0, 0,
9874 PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_572A, 0, 0, 0 },
9876 PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_572B, 0, 0,
9879 PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_575C, 0, 0,
9882 PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_574E, 0, 0,
9885 PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B3, 0, 0, 0 },
9887 PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57CC, 0, 0, 0 },
9889 PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B7, 0, 0,
9892 PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_2780, 0, 0, 0 },
9894 PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_571E, 0, 0, 0 },
9896 PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_571F, 0, 0,
9899 PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_572F, 0, 0,
9902 PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B5, 0, 0, 0 },
9904 PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_574D, 0, 0, 0 },
9906 PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B2, 0, 0, 0 },
9908 PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57C0, 0, 0, 0 },
9910 PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57C3, 0, 0, 0 },
9912 PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57C4, 0, 0, 0 },
9914 PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B4, 0, 0, 0 },
9916 PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B1, 0, 0, 0 },
9918 PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57C6, 0, 0, 0 },
9920 PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57C8, 0, 0, 0 },
9922 PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57CE, 0, 0, 0 },
9924 PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57D5, 0, 0, 0 },
9926 PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57D6, 0, 0, 0 },
9928 PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57D7, 0, 0, 0 },
9930 PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57D8, 0, 0, 0 },
9932 PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57D9, 0, 0, 0 },
9934 PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57DA, 0, 0, 0 },
9936 PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57EB, 0, 0, 0 },
9938 PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57EC, 0, 0, 0 },
9940 PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57ED, 0, 0, 0 },
9942 PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57EE, 0, 0, 0 },
9944 PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57EF, 0, 0, 0 },
9946 PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57F0, 0, 0, 0 },
9948 PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_2CCA, 0, 0, 0 },
9950 PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_2CD2, 0, 0, 0 },
9952 PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_2CCD, 0, 0, 0 },
9954 PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_580A, 0, 0, 0 },
9956 PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_580B, 0, 0, 0 },
10001 unsigned long flags = 0, driver_lock_flags; in ipr_halt()
10019 ipr_cmd->ioarcb.cmd_pkt.cdb[0] = IPR_IOA_SHUTDOWN; in ipr_halt()
10031 ipr_halt, NULL, 0
10038 * 0 on success / negative value on failure
10054 return 0; in ipr_init()