Lines Matching +full:5 +full:d
122 {"OOB_BFLTR" ,0x100, 8, MD(5)},
123 {"OOB_INIT_MIN" ,0x102,16, MD(5)},
124 {"OOB_INIT_MAX" ,0x104,16, MD(5)},
125 {"OOB_INIT_NEG" ,0x106,16, MD(5)},
126 {"OOB_SAS_MIN" ,0x108,16, MD(5)},
127 {"OOB_SAS_MAX" ,0x10A,16, MD(5)},
128 {"OOB_SAS_NEG" ,0x10C,16, MD(5)},
129 {"OOB_WAKE_MIN" ,0x10E,16, MD(5)},
130 {"OOB_WAKE_MAX" ,0x110,16, MD(5)},
131 {"OOB_WAKE_NEG" ,0x112,16, MD(5)},
132 {"OOB_IDLE_MAX" ,0x114,16, MD(5)},
133 {"OOB_BURST_MAX" ,0x116,16, MD(5)},
134 {"OOB_XMIT_BURST" ,0x118, 8, MD(5)},
135 {"OOB_SEND_PAIRS" ,0x119, 8, MD(5)},
136 {"OOB_INIT_IDLE" ,0x11A, 8, MD(5)},
137 {"OOB_INIT_NEGO" ,0x11C, 8, MD(5)},
138 {"OOB_SAS_IDLE" ,0x11E, 8, MD(5)},
139 {"OOB_SAS_NEGO" ,0x120, 8, MD(5)},
140 {"OOB_WAKE_IDLE" ,0x122, 8, MD(5)},
141 {"OOB_WAKE_NEGO" ,0x124, 8, MD(5)},
142 {"OOB_DATA_KBITS" ,0x126, 8, MD(5)},
143 {"OOB_BURST_DATA" ,0x128,32, MD(5)},
144 {"OOB_ALIGN_0_DATA" ,0x12C,32, MD(5)},
145 {"OOB_ALIGN_1_DATA" ,0x130,32, MD(5)},
146 {"OOB_SYNC_DATA" ,0x134,32, MD(5)},
147 {"OOB_D10_2_DATA" ,0x138,32, MD(5)},
148 {"OOB_PHY_RST_CNT" ,0x13C,32, MD(5)},
149 {"OOB_SIG_GEN" ,0x140, 8, MD(5)},
150 {"OOB_XMIT" ,0x141, 8, MD(5)},
151 {"FUNCTION_MAKS" ,0x142, 8, MD(5)},
152 {"OOB_MODE" ,0x143, 8, MD(5)},
153 {"CURRENT_STATUS" ,0x144, 8, MD(5)},
154 {"SPEED_MASK" ,0x145, 8, MD(5)},
155 {"PRIM_COUNT" ,0x146, 8, MD(5)},
156 {"OOB_SIGNALS" ,0x148, 8, MD(5)},
157 {"OOB_DATA_DET" ,0x149, 8, MD(5)},
158 {"OOB_TIME_OUT" ,0x14C, 8, MD(5)},
159 {"OOB_TIMER_ENABLE" ,0x14D, 8, MD(5)},
160 {"OOB_STATUS" ,0x14E, 8, MD(5)},
161 {"HOT_PLUG_DELAY" ,0x150, 8, MD(5)},
162 {"RCD_DELAY" ,0x151, 8, MD(5)},
163 {"COMSAS_TIMER" ,0x152, 8, MD(5)},
164 {"SNTT_DELAY" ,0x153, 8, MD(5)},
165 {"SPD_CHNG_DELAY" ,0x154, 8, MD(5)},
166 {"SNLT_DELAY" ,0x155, 8, MD(5)},
167 {"SNWT_DELAY" ,0x156, 8, MD(5)},
168 {"ALIGN_DELAY" ,0x157, 8, MD(5)},
169 {"INT_ENABLE_0" ,0x158, 8, MD(5)},
170 {"INT_ENABLE_1" ,0x159, 8, MD(5)},
171 {"INT_ENABLE_2" ,0x15A, 8, MD(5)},
172 {"INT_ENABLE_3" ,0x15B, 8, MD(5)},
173 {"OOB_TEST_REG" ,0x15C, 8, MD(5)},
174 {"PHY_CONTROL_0" ,0x160, 8, MD(5)},
175 {"PHY_CONTROL_1" ,0x161, 8, MD(5)},
176 {"PHY_CONTROL_2" ,0x162, 8, MD(5)},
177 {"PHY_CONTROL_3" ,0x163, 8, MD(5)},
178 {"PHY_OOB_CAL_TX" ,0x164, 8, MD(5)},
179 {"PHY_OOB_CAL_RX" ,0x165, 8, MD(5)},
180 {"OOB_PHY_CAL_TX" ,0x166, 8, MD(5)},
181 {"OOB_PHY_CAL_RX" ,0x167, 8, MD(5)},
182 {"PHY_CONTROL_4" ,0x168, 8, MD(5)},
183 {"PHY_TEST" ,0x169, 8, MD(5)},
184 {"PHY_PWR_CTL" ,0x16A, 8, MD(5)},
185 {"PHY_PWR_DELAY" ,0x16B, 8, MD(5)},
186 {"OOB_SM_CON" ,0x16C, 8, MD(5)},
187 {"ADDR_TRAP_1" ,0x16D, 8, MD(5)},
188 {"ADDR_NEXT_1" ,0x16E, 8, MD(5)},
189 {"NEXT_ST_1" ,0x16F, 8, MD(5)},
190 {"OOB_SM_STATE" ,0x170, 8, MD(5)},
191 {"ADDR_TRAP_2" ,0x171, 8, MD(5)},
192 {"ADDR_NEXT_2" ,0x172, 8, MD(5)},
193 {"NEXT_ST_2" ,0x173, 8, MD(5)},
216 #define MSTR_8BIT " Mode:%02d %30s[0x%04x]:0x%02x\n"
217 #define MSTR_16BIT " Mode:%02d %30s[0x%04x]:0x%04x\n"
218 #define MSTR_32BIT " Mode:%02d %30s[0x%04x]:0x%08x\n"
249 asd_read_reg_word(_ha, CMDP_REG(_n, 5)), \
261 asd_read_reg_byte(_ha, CMDP_REG(_n, 5)), \
349 asd_printk("MIP 5 >>>>\n"); in asd_dump_cseq_state()
389 "Mode: ", "0", "1", "2", "3", "4", "5", "6", "7"); in asd_dump_cseq_state()
478 asd_printk("LSEQ %d STATE\n", lseq); in asd_dump_lseq_state()
480 asd_printk("LSEQ%d: ARP2 REGISTERS\n", lseq); in asd_dump_lseq_state()
501 asd_printk("LSEQ%d: IOP REGISTERS\n", lseq); in asd_dump_lseq_state()
509 asd_printk("LSEQ%d: CIO REGISTERS\n", lseq); in asd_dump_lseq_state()
526 asd_printk("Mode %d\n", mode); in asd_dump_lseq_state()
536 asd_printk("LSEQ%d MIP 0 >>>>\n", lseq); in asd_dump_lseq_state()
550 asd_printk("LSEQ%d MIP 1 >>>>\n", lseq); in asd_dump_lseq_state()
566 asd_printk("LSEQ%d MIP 2 >>>>\n", lseq); in asd_dump_lseq_state()
579 asd_printk("LSEQ%d MIP 3 >>>>\n", lseq); in asd_dump_lseq_state()
589 asd_printk("LSEQ%d MDP 0 MODE %d >>>>\n", lseq, mode); in asd_dump_lseq_state()
615 asd_printk("LSEQ%d MDP 0 MODE 5 >>>>\n", lseq); in asd_dump_lseq_state()
632 asd_printk("LSEQ%d MDP 0 MODE 0 >>>>\n", lseq); in asd_dump_lseq_state()
644 asd_printk("LSEQ%d MDP 0 MODE 1 >>>>\n", lseq); in asd_dump_lseq_state()
654 asd_printk("LSEQ%d MDP 0 MODE 2 >>>>\n", lseq); in asd_dump_lseq_state()
662 asd_printk("LSEQ%d MDP 0 MODE 4/5 >>>>\n", lseq); in asd_dump_lseq_state()
675 asd_printk("LSEQ%d MDP 1 MODE 0 >>>>\n", lseq); in asd_dump_lseq_state()
679 asd_printk("LSEQ%d MDP 1 MODE 1 >>>>\n", lseq); in asd_dump_lseq_state()
683 asd_printk("LSEQ%d MDP 1 MODE 2 >>>>\n", lseq); in asd_dump_lseq_state()
688 asd_printk("LSEQ%d MDP 1 MODE 4/5 >>>>\n", lseq); in asd_dump_lseq_state()
696 asd_printk("LSEQ%d MDP 2 MODE 0 >>>>\n", lseq); in asd_dump_lseq_state()
703 asd_printk("LSEQ%d MDP 2 MODE 1 >>>>\n", lseq); in asd_dump_lseq_state()
709 asd_printk("LSEQ%d MDP 2 MODE 2 >>>>\n", lseq); in asd_dump_lseq_state()
716 asd_printk("LSEQ%d MDP 2 MODE 4/5 >>>>\n", lseq); in asd_dump_lseq_state()