Lines Matching +full:hardware +full:- +full:fifo
4 * Copyright (c) 1994-2001, 2004 Justin T. Gibbs.
5 * Copyright (c) 2000-2002 Adaptec Inc.
19 * 3. Neither the names of the above-listed copyright holders nor the names
51 if ((ahd->bugs & AHD_INTCOLLISION_BUG) != 0) {
58 if ((ahd->bugs & AHD_INTCOLLISION_BUG) != 0) {
62 * interrupt collision on the hardware
100 cmp SCB_NEXT_COMPLETE[1], SCB_LIST_NULL jne . - 1;
124 if ((ahd->bugs & AHD_FAINT_LED_BUG) != 0) {
126 * On Rev A. hardware, the busy LED is only
128 * and re-selections. Make the LED status
159 * pending select-outs.
169 * Since this status did not consume a FIFO, we have to
171 * to this transaction. There are two states that a FIFO still
174 * 1) Configured and draining to the host, with a FIFO handler.
175 * 2) Pending cfg4data, fifo not empty.
177 * Case 1 can be detected by noticing a non-zero FIFO active
179 * the FIFO to complete the SCB.
182 * pointers for this same context in the other FIFO. So, if
224 * wait until any select-out activity has halted, and
262 /* Add -1 so that jnc means <= not just < */
263 add A, -1, INT_COALESCING_MINCMDS;
298 if ((ahd->bugs & AHD_PKT_LUN_BUG) != 0) {
308 * The FIFO use count field is shared with the
358 * at the head of their per-target queue so that
365 * our batching and round-robin selection scheme
419 * if select-outs are currently frozen or we have
446 add CMDS_PENDING, -1;
447 adc CMDS_PENDING[1], -1;
455 * in the data-stream should the target force a retry on
457 * PCI-X mode, we do this to avoid split transactions since
520 if ((ahd->bugs & AHD_SET_MODE_BUG) != 0) {
528 if ((ahd->bugs & AHD_INTCOLLISION_BUG) != 0) {
539 if ((ahd->bugs & AHD_SENT_SCB_UPDATE_BUG) != 0) {
542 * Rev A hardware fails to update LAST/CURR/NEXTSCB
583 * Allocate a FIFO for a non-packetized transaction.
584 * In RevA hardware, both FIFOs must be free before we
585 * can allocate a FIFO for a non-packetized transaction.
589 * Do whatever work is required to free a FIFO.
594 if ((ahd->bugs & AHD_NONPACKFIFO_BUG) != 0) {
618 if ((ahd->bugs & AHD_FAINT_LED_BUG) != 0) {
620 * On Rev A. hardware, the busy LED is only
622 * and re-selections. Make the LED status
626 * are busy. This handles the non-packetized
633 if ((ahd->bugs & AHD_BUSFREEREV_BUG) != 0) {
664 * In Non-Packetize Mode:
671 if ((ahd->bugs & AHD_FAINT_LED_BUG) != 0) {
673 * On Rev A. hardware, the busy LED is only
675 * and re-selections. Make the LED status
677 * the point of re-selection until our idle
679 * are busy. This handles the non-packetized
687 if ((ahd->bugs & AHD_SENT_SCB_UPDATE_BUG) != 0) {
690 * the assertion of SELDO. If we are non-packetized,
713 * If the hardware has traversed the whole list, NEXTSCB
746 * that the per-target selection queue is now empty.
752 * We know that neither the per-TID list nor the list of
801 if ((ahd->bugs & AHD_LQO_ATNO_BUG) != 0) {
805 * REQs in a non-packet phase.
819 if ((ahd->bugs & AHD_BUSFREEREV_BUG) != 0) {
874 * Command retry. Free our current FIFO and
875 * re-allocate a FIFO so transfer state is
887 add NONE, -17, SCB_CDB_LEN;
900 if ((ahd->features & AHD_FAST_CDB_DELIVERY) != 0) {
909 * the target goes to data-in, but if the acks go
921 test DFCNTRL, SCSIEN jnz . - 1;
1092 * Determine whether a target is using tagged or non-tagged
1094 * the per-device, disconnected array. If there is no untagged
1114 if ((ahd->flags & AHD_SEQUENCER_DEBUG) != 0) {
1119 if ((ahd->flags & AHD_SEQUENCER_DEBUG) != 0) {
1123 if ((ahd->flags & AHD_SEQUENCER_DEBUG) != 0) {
1146 if ((ahd->flags & AHD_SEQUENCER_DEBUG) != 0) {
1221 /* Cancel any pending select-out. */
1233 * Complete the current FIFO's SCB if data for this same
1234 * SCB is not transferring in the other FIFO.
1293 * XXX - Wait for more testing.
1309 if ((ahd->bugs & AHD_BUSFREEREV_BUG) == 0) {
1379 * code do the rest. We also reset/reallocate the FIFO to make
1392 if ((ahd->bugs & AHD_EARLY_REQ_BUG) != 0) {
1471 * Can this FIFO have access to the S/G cache yet?
1482 * Should the other FIFO get the S/G cache first? If
1484 * any FIFO, it is important that we service a FIFO
1486 * that a FIFO will be freed to handle snapshot requests for
1487 * any FIFO that is still on the bus. Chips with RTI do not
1490 if ((ahd->features & AHD_RTI) == 0) {
1494 * this FIFO.
1499 * Switch to the other FIFO. Non-RTI chips
1507 * If the other FIFO needs loading, then it
1510 * the original FIFO mode and we test this above).
1512 * FIFO not currently on the bus first.
1524 * so we don't end up referencing a non-existent page.
1531 if ((ahd->bugs & AHD_REG_SLOW_SETTLE_BUG) != 0) {
1543 * request in the other FIFO.
1550 /* Does the hardware have space for another SG entry? */
1555 * first segment in the S/G FIFO. Wait until it is
1558 if ((ahd->features & AHD_NEW_DFCNTRL_OPTS) == 0) {
1561 if ((ahd->flags & AHD_64BIT_ADDRESSING) != 0) {
1568 if ((ahd->flags & AHD_39BIT_ADDRESSING) != 0) {
1571 if ((ahd->flags & AHD_64BIT_ADDRESSING) != 0) {
1586 if ((ahd->features & AHD_NEW_DFCNTRL_OPTS) != 0) {
1638 * If we re-enter the data phase after going through another
1640 * corrupted by the interveining, non-data, transfers. Ask
1657 * Ensure that any FIFO contents are cleared out and the
1658 * FIFO free'd prior to starting the BITBUCKET. BITBUCKET
1659 * doesn't discard data already in the FIFO.
1665 /* Wait for non-data phase. */
1700 * as possible while the data fifo drains on a read
1712 if ((ahd->bugs & AHD_AUTOFLUSH_BUG) != 0) {
1716 * We have enabled the auto-ack feature. This means
1718 * some overrun bytes into the data FIFO and acked them
1721 * transfer and then test to see if the data FIFO is
1722 * non-empty. We know there is more data yet to transfer
1737 if ((ahd->flags & AHD_TARGETROLE) != 0) {
1740 if ((ahd->flags & AHD_INITIATORROLE) != 0) {
1750 if ((ahd->flags & AHD_TARGETROLE) != 0) {
1754 * For data-in phases, wait for any pending acks from the
1756 * send Ignore Wide Residue messages for data-in phases.
1797 * hardware will only interrupt us once SHVALID or
1824 add SCB_RESIDUAL_SGPTR[1], -1;
1825 adc SCB_RESIDUAL_SGPTR[2], -1;
1826 adc SCB_RESIDUAL_SGPTR[3], -1;
1835 if ((ahd->bugs & AHD_SET_MODE_BUG) != 0) {
1850 if ((ahd->features & AHD_RTI) == 0) {
1852 * On RevA Silicon, if the target returns us to data-out
1853 * after we have already trained for data-out, it is
1855 * data-valid before the required 100ns P1 setup time (8 P1
1856 * assertions in fast-160 mode). This will only happen if
1857 * this L-Q is a continuation of a data transfer for which
1858 * we have already prefetched data into our FIFO (LQ/Data
1864 * a continuation of a transfer already setup in our FIFO
1879 * Switch to the active FIFO after clearing the snapshot
1880 * savepointer in the current FIFO. We do this so that
1882 * FIFO. This status is the only way we can detect if we
1910 * The first is a snapshot save pointers where the current FIFO is not
1918 * The second case is a save pointers on an active FIFO which occurs
1925 if ((ahd->features & AHD_RTI) == 0) {
1942 add NONE, -13, SCB_CDB_LEN;
1982 * overrun condition. For the write case, the hardware cannot
1986 * situation. For the read case, the hardware will continue to
1987 * ack bytes into the FIFO, and may even ack the last overrun packet
1988 * into the FIFO. If the FIFO should become non-empty, we are in
2005 * can be sure it pertains to this FIFO. SAVEPTRS
2008 * shadow is not valid, keep running this FIFO until we
2026 * Either a SAVEPTRS interrupt condition is pending for this FIFO
2027 * or we have a pending NONPACKREQ for this FIFO. We differentiate
2034 if ((ahd->bugs & AHD_AUTOFLUSH_BUG) != 0) {
2046 * Keep a handler around for this FIFO until it drains
2061 * LAST_SEG_DONE status has been seen in the current FIFO.
2095 * the check to see if another FIFO is active because
2097 * the FIFO anyway since it costs us only one extra
2119 * None-the-less, we must still catch and report overruns to
2120 * the host. Additionally, properly catch unexpected non-packet
2130 if ((ahd->bugs & AHD_AUTOFLUSH_BUG) != 0) {
2147 * a NONPACKREQ phase change have occurred and the FIFO is
2173 * data channel use will have a FIFO reference count. It
2195 * in a FIFO or an outgoing LQ. Only treat it as an I_T only
2215 if ((ahd->bugs & AHD_BUSFREEREV_BUG) != 0) {
2237 * BITBUCKET, flip that on and let the hardware eat any overrun
2246 if ((ahd->bugs & AHD_PKT_BITBUCKET_BUG) == 0) {
2255 if ((ahd->bugs & AHD_PKT_BITBUCKET_BUG) != 0) {
2273 if ((ahd->bugs & AHD_PKT_BITBUCKET_BUG) != 0) {