Lines Matching +full:led +full:- +full:7 +full:seg
4 * Copyright (c) 1994-2002 Justin T. Gibbs.
5 * Copyright (c) 2000-2002 Adaptec Inc.
19 * 3. Neither the names of the above-listed copyright holders nor the names
78 SCSIID_OUR_ID((scb)->hscb->scsiid)
80 SCSIID_TARGET((ahd), (scb)->hscb->scsiid)
82 SCSIID_CHANNEL(ahd, (scb)->hscb->scsiid)
84 ((scb)->hscb->lun)
92 && (((scb)->flags & SCB_SILENT) != 0))
95 (((scb)->flags & SCB_SILENT) != 0)
103 (tcl & (AHD_NUM_LUNS - 1))
110 ahd_le16toh(scb->hscb->tag)
125 (scb)->hscb->scsiid = ((col_idx) << TID_SHIFT) & TID; \
126 (scb)->hscb->lun = ((col_idx) >> 4) & (AHD_NUM_LUNS_NONPKT-1); \
131 dst->hscb->scsiid = src->hscb->scsiid; \
132 dst->hscb->lun = src->hscb->lun; \
145 * The identify message only supports 64 luns in non-packetized transfers.
166 * Sequencer Control Blocks (SCBs) store per-transaction information.
177 #define AHD_QIN_WRAP(x) ((x) & (AHD_QIN_SIZE-1))
216 AHD_MULTI_FUNC = 0x00100,/* Multi-Function/Channel Device */
223 AHD_REMOVABLE = 0x00000,/* Hot-Swap supported - None so far*/
245 /* The Non-LQ CRC error status is delayed until phase change. */
251 /* MMAPIO is not functional in PCI-X mode. */
255 /* Bug workarounds that can be disabled on non-PCIX busses. */
261 * to perform non-packetized message delivery.
264 /* FIFO auto-flush does not always trigger. */
266 /* The CLRLQO registers are not self-clearing. */
273 * Only the FIFO allocated to the non-packetized connection may
274 * be in use during a non-packetzied connection.
282 * occur in non-packetized connections.
293 /* Non-packetized busfree revision does not work. */
296 * Paced transfers are indicated with a non-standard PPR
319 * The LED does not stay on long enough in packetized modes.
396 uint32_t residual_datacnt; /* Residual in the current S/G seg */
402 uint32_t residual_datacnt; /* Residual in the current S/G seg */
406 uint8_t data_phase; /* Data-In or Data-Out */
419 #define MAX_CDB_LEN_WITH_SENSE_ADDR (MAX_CDB_LEN - sizeof(sense_addr_t))
439 uint8_t data_phase; /* Data-In or Data-Out */
469 * there is non-zero status, it will set the SG_STATUS_VALID flag in
494 * Our Id (bits 0-3) Their ID (bits 4-7)
634 * Per-device lists of SCBs whose tag ID would collide
672 * Connection descriptor for select-in requests in target mode.
693 uint8_t pad[7];
753 * Per-initiator current, goal and user transfer negotiation information. */
763 * for each initiator<->target mapping. For the initiator role we pretend
799 * factor 8 and 160MHz for the period factor 7. The 120MHz
809 * Phase -> name and message out response
824 uint16_t device_flags[16]; /* words 0-15 */
847 #define CFCTRL_A 0x0020 /* BIOS displays Ctrl-A message */
850 #define CFBOOTCD 0x0100 /* Support Bootable CD-ROM */
888 uint16_t res_1[10]; /* words 20-29 */
1221 /* Per-Unit descriptive information */
1252 (AHD_ANNEXCOL_PRECOMP_SLEW - AHD_ANNEXCOL_PER_DEV0)
1255 (AHD_ANNEXCOL_AMPLITUDE - AHD_ANNEXCOL_PER_DEV0)
1259 (ahd)->iocell_opts[AHD_PRECOMP_SLEW_INDEX] &= ~AHD_SLEWRATE_MASK; \
1260 (ahd)->iocell_opts[AHD_PRECOMP_SLEW_INDEX] |= \
1266 (ahd)->iocell_opts[AHD_PRECOMP_SLEW_INDEX] &= ~AHD_PRECOMP_MASK; \
1267 (ahd)->iocell_opts[AHD_PRECOMP_SLEW_INDEX] |= \
1273 (ahd)->iocell_opts[AHD_AMPLITUDE_INDEX] &= ~AHD_AMPLITUDE_MASK; \
1274 (ahd)->iocell_opts[AHD_AMPLITUDE_INDEX] |= \
1396 AHD_NEG_IF_NON_ASYNC, /* Renegotiate so long as goal is non-async. */