1 // SPDX-License-Identifier: GPL-2.0+
64  * stmp3xxx_wdt_set_timeout - configure the watchdog inside the STMP3xxx RTC
82 		writel(timeout, rtc_data->io + STMP3XXX_RTC_WATCHDOG);  in stmp3xxx_wdt_set_timeout()
84 		       rtc_data->io + STMP3XXX_RTC_CTRL + STMP_OFFSET_REG_SET);  in stmp3xxx_wdt_set_timeout()
86 		       rtc_data->io + STMP3XXX_RTC_PERSISTENT1 + STMP_OFFSET_REG_SET);  in stmp3xxx_wdt_set_timeout()
89 		       rtc_data->io + STMP3XXX_RTC_CTRL + STMP_OFFSET_REG_CLR);  in stmp3xxx_wdt_set_timeout()
91 		       rtc_data->io + STMP3XXX_RTC_PERSISTENT1 + STMP_OFFSET_REG_CLR);  in stmp3xxx_wdt_set_timeout()
101 	int rc = -1;  in stmp3xxx_wdt_register()
103 		platform_device_alloc("stmp3xxx_rtc_wdt", rtc_pdev->id);  in stmp3xxx_wdt_register()
106 		wdt_pdev->dev.parent = &rtc_pdev->dev;  in stmp3xxx_wdt_register()
107 		wdt_pdev->dev.platform_data = &wdt_pdata;  in stmp3xxx_wdt_register()
114 		dev_err(&rtc_pdev->dev,  in stmp3xxx_wdt_register()
137 		if (!(readl(rtc_data->io + STMP3XXX_RTC_STAT) &  in stmp3xxx_wait_time()
141 	} while (--timeout > 0);  in stmp3xxx_wait_time()
142 	return (readl(rtc_data->io + STMP3XXX_RTC_STAT) &  in stmp3xxx_wait_time()
143 		(0x80 << STMP3XXX_RTC_STAT_STALE_SHIFT)) ? -ETIME : 0;  in stmp3xxx_wait_time()
156 	rtc_time64_to_tm(readl(rtc_data->io + STMP3XXX_RTC_SECONDS), rtc_tm);  in stmp3xxx_rtc_gettime()
164 	writel(rtc_tm_to_time64(rtc_tm), rtc_data->io + STMP3XXX_RTC_SECONDS);  in stmp3xxx_rtc_settime()
172 	u32 status = readl(rtc_data->io + STMP3XXX_RTC_CTRL);  in stmp3xxx_rtc_interrupt()
176 			rtc_data->io + STMP3XXX_RTC_CTRL + STMP_OFFSET_REG_CLR);  in stmp3xxx_rtc_interrupt()
177 		rtc_update_irq(rtc_data->rtc, 1, RTC_AF | RTC_IRQF);  in stmp3xxx_rtc_interrupt()
191 			rtc_data->io + STMP3XXX_RTC_PERSISTENT0 +  in stmp3xxx_alarm_irq_enable()
194 			rtc_data->io + STMP3XXX_RTC_CTRL + STMP_OFFSET_REG_SET);  in stmp3xxx_alarm_irq_enable()
198 			rtc_data->io + STMP3XXX_RTC_PERSISTENT0 +  in stmp3xxx_alarm_irq_enable()
201 			rtc_data->io + STMP3XXX_RTC_CTRL + STMP_OFFSET_REG_CLR);  in stmp3xxx_alarm_irq_enable()
210 	rtc_time64_to_tm(readl(rtc_data->io + STMP3XXX_RTC_ALARM), &alm->time);  in stmp3xxx_rtc_read_alarm()
218 	writel(rtc_tm_to_time64(&alm->time), rtc_data->io + STMP3XXX_RTC_ALARM);  in stmp3xxx_rtc_set_alarm()
220 	stmp3xxx_alarm_irq_enable(dev, alm->enabled);  in stmp3xxx_rtc_set_alarm()
242 		rtc_data->io + STMP3XXX_RTC_CTRL + STMP_OFFSET_REG_CLR);  in stmp3xxx_rtc_remove()
254 	rtc_data = devm_kzalloc(&pdev->dev, sizeof(*rtc_data), GFP_KERNEL);  in stmp3xxx_rtc_probe()
256 		return -ENOMEM;  in stmp3xxx_rtc_probe()
260 		dev_err(&pdev->dev, "failed to get resource\n");  in stmp3xxx_rtc_probe()
261 		return -ENXIO;  in stmp3xxx_rtc_probe()
264 	rtc_data->io = devm_ioremap(&pdev->dev, r->start, resource_size(r));  in stmp3xxx_rtc_probe()
265 	if (!rtc_data->io) {  in stmp3xxx_rtc_probe()
266 		dev_err(&pdev->dev, "ioremap failed\n");  in stmp3xxx_rtc_probe()
267 		return -EIO;  in stmp3xxx_rtc_probe()
270 	rtc_data->irq_alarm = platform_get_irq(pdev, 0);  in stmp3xxx_rtc_probe()
272 	rtc_stat = readl(rtc_data->io + STMP3XXX_RTC_STAT);  in stmp3xxx_rtc_probe()
274 		dev_err(&pdev->dev, "no device onboard\n");  in stmp3xxx_rtc_probe()
275 		return -ENODEV;  in stmp3xxx_rtc_probe()
285 	if (readl(rtc_data->io + STMP3XXX_RTC_CTRL) &  in stmp3xxx_rtc_probe()
287 		dev_info(&pdev->dev,  in stmp3xxx_rtc_probe()
290 		err = stmp_reset_block(rtc_data->io);  in stmp3xxx_rtc_probe()
292 			dev_err(&pdev->dev, "stmp_reset_block failed: %d\n",  in stmp3xxx_rtc_probe()
300 	 * This clock can be provided by an external 32k crystal. If that one is  in stmp3xxx_rtc_probe()
312 	of_property_read_u32(pdev->dev.of_node, "stmp,crystal-freq",  in stmp3xxx_rtc_probe()
317 		/* keep 32kHz crystal running in low-power mode */  in stmp3xxx_rtc_probe()
324 		/* keep 32.768kHz crystal running in low-power mode */  in stmp3xxx_rtc_probe()
331 		dev_warn(&pdev->dev,  in stmp3xxx_rtc_probe()
332 			 "invalid crystal-freq specified in device-tree. Assuming no crystal\n");  in stmp3xxx_rtc_probe()
335 		/* keep XTAL on in low-power mode */  in stmp3xxx_rtc_probe()
341 	writel(pers0_set, rtc_data->io + STMP3XXX_RTC_PERSISTENT0 +  in stmp3xxx_rtc_probe()
347 		rtc_data->io + STMP3XXX_RTC_PERSISTENT0 + STMP_OFFSET_REG_CLR);  in stmp3xxx_rtc_probe()
351 		rtc_data->io + STMP3XXX_RTC_CTRL + STMP_OFFSET_REG_CLR);  in stmp3xxx_rtc_probe()
353 	rtc_data->rtc = devm_rtc_allocate_device(&pdev->dev);  in stmp3xxx_rtc_probe()
354 	if (IS_ERR(rtc_data->rtc))  in stmp3xxx_rtc_probe()
355 		return PTR_ERR(rtc_data->rtc);  in stmp3xxx_rtc_probe()
357 	err = devm_request_irq(&pdev->dev, rtc_data->irq_alarm,  in stmp3xxx_rtc_probe()
358 			stmp3xxx_rtc_interrupt, 0, "RTC alarm", &pdev->dev);  in stmp3xxx_rtc_probe()
360 		dev_err(&pdev->dev, "Cannot claim IRQ%d\n",  in stmp3xxx_rtc_probe()
361 			rtc_data->irq_alarm);  in stmp3xxx_rtc_probe()
365 	rtc_data->rtc->ops = &stmp3xxx_rtc_ops;  in stmp3xxx_rtc_probe()
366 	rtc_data->rtc->range_max = U32_MAX;  in stmp3xxx_rtc_probe()
368 	err = devm_rtc_register_device(rtc_data->rtc);  in stmp3xxx_rtc_probe()
386 	stmp_reset_block(rtc_data->io);  in stmp3xxx_rtc_resume()
390 		rtc_data->io + STMP3XXX_RTC_PERSISTENT0 + STMP_OFFSET_REG_CLR);  in stmp3xxx_rtc_resume()
399 	{ .compatible = "fsl,stmp3xxx-rtc", },
408 		.name	= "stmp3xxx-rtc",