23 #define RS5C372_REG_SECS	0
31 #	define RS5C372_TRIM_XSL		0x80		/* only if RS5C372[a|b] */
32 #	define RS5C372_TRIM_MASK	0x7F
49 #	define RS5C_CTRL1_CT_MASK	(7 << 0)
50 #	define RS5C_CTRL1_CT0		(0 << 0)	/* no periodic irq */
51 #	define RS5C_CTRL1_CT4		(4 << 0)	/* 1 Hz level irq */
60 #	define RS5C_CTRL2_BAFG		(1 << 0)	/* or DAFG */
64 #define RS5C_ADDR(R)		(((R) << 4) | 0)
68 	rtc_undef = 0,
147 	 * to 0x0f ... so we read extra registers, and skip the first one.  in rs5c_get_regs()
174 		rs5c->regs + 0, rs5c->regs[3],  in rs5c_get_regs()
179 	return 0;  in rs5c_get_regs()
187 		return bcd2bin(reg & 0x3f);  in rs5c_reg2hr()
189 	hour = bcd2bin(reg & 0x1f);  in rs5c_reg2hr()
191 		hour = 0;  in rs5c_reg2hr()
192 	if (reg & 0x20)  in rs5c_reg2hr()
203 		return 0x20 | bin2bcd(hour - 12);  in rs5c_hr2reg()
205 		return 0x20 | bin2bcd(12);  in rs5c_hr2reg()
206 	if (hour == 0)  in rs5c_hr2reg()
218 	if (status < 0)  in rs5c372_rtc_read_time()
237 	tm->tm_sec = bcd2bin(rs5c->regs[RS5C372_REG_SECS] & 0x7f);  in rs5c372_rtc_read_time()
238 	tm->tm_min = bcd2bin(rs5c->regs[RS5C372_REG_MINS] & 0x7f);  in rs5c372_rtc_read_time()
241 	tm->tm_wday = bcd2bin(rs5c->regs[RS5C372_REG_WDAY] & 0x07);  in rs5c372_rtc_read_time()
242 	tm->tm_mday = bcd2bin(rs5c->regs[RS5C372_REG_DAY] & 0x3f);  in rs5c372_rtc_read_time()
245 	tm->tm_mon = bcd2bin(rs5c->regs[RS5C372_REG_MONTH] & 0x1f) - 1;  in rs5c372_rtc_read_time()
256 	return 0;  in rs5c372_rtc_read_time()
274 	buf[0] = bin2bcd(tm->tm_sec);  in rs5c372_rtc_set_time()
282 	if (i2c_smbus_write_i2c_block_data(client, addr, sizeof(buf), buf) < 0) {  in rs5c372_rtc_set_time()
306 	if (i2c_smbus_write_byte_data(client, addr, ctrl2) < 0) {  in rs5c372_rtc_set_time()
312 	return 0;  in rs5c372_rtc_set_time()
339 		if (tmp & 0x3e) {  in rs5c372_get_trim()
340 			int t = tmp & 0x3f;  in rs5c372_get_trim()
342 			if (tmp & 0x40)  in rs5c372_get_trim()
343 				t = (~t | (s8)0xc0) + 1;  in rs5c372_get_trim()
349 			tmp = 0;  in rs5c372_get_trim()
353 	return 0;  in rs5c372_get_trim()
370 	if (status < 0)  in rs5c_rtc_alarm_irq_enable()
379 	if (i2c_smbus_write_byte_data(client, addr, buf) < 0) {  in rs5c_rtc_alarm_irq_enable()
405 	if (status < 0)  in rs5c_read_alarm()
409 	t->time.tm_sec = 0;  in rs5c_read_alarm()
410 	t->time.tm_min = bcd2bin(rs5c->regs[RS5C_REG_ALARM_A_MIN] & 0x7f);  in rs5c_read_alarm()
417 	return 0;  in rs5c_read_alarm()
437 	if (status < 0)  in rs5c_set_alarm()
441 		buf[0] = rs5c->regs[RS5C_REG_CTRL1] & ~RS5C_CTRL1_AALE;  in rs5c_set_alarm()
442 		if (i2c_smbus_write_byte_data(client, addr, buf[0]) < 0) {  in rs5c_set_alarm()
446 		rs5c->regs[RS5C_REG_CTRL1] = buf[0];  in rs5c_set_alarm()
450 	buf[0] = bin2bcd(t->time.tm_min);  in rs5c_set_alarm()
452 	buf[2] = 0x7f;	/* any/all days */  in rs5c_set_alarm()
454 	for (i = 0; i < sizeof(buf); i++) {  in rs5c_set_alarm()
456 		if (i2c_smbus_write_byte_data(client, addr, buf[i]) < 0) {  in rs5c_set_alarm()
465 		buf[0] = rs5c->regs[RS5C_REG_CTRL1] | RS5C_CTRL1_AALE;  in rs5c_set_alarm()
466 		if (i2c_smbus_write_byte_data(client, addr, buf[0]) < 0)  in rs5c_set_alarm()
468 		rs5c->regs[RS5C_REG_CTRL1] = buf[0];  in rs5c_set_alarm()
471 	return 0;  in rs5c_set_alarm()
481 	if (err == 0) {  in rs5c372_rtc_proc()
487 	return 0;  in rs5c372_rtc_proc()
509 		flags = 0;  in rs5c372_ioctl()
532 			if (i2c_smbus_write_byte_data(rs5c->client, addr, ctrl2) < 0) {  in rs5c372_ioctl()
538 		return 0;  in rs5c372_ioctl()
542 	return 0;  in rs5c372_ioctl()
552 	long ppb_per_step = 0;  in rs5c372_read_offset()
568 	/* Only bits[0:5] repsents the time counts */  in rs5c372_read_offset()
569 	val &= 0x3F;  in rs5c372_read_offset()
571 	/* If bits[1:5] are all 0, it means no increment or decrement */  in rs5c372_read_offset()
572 	if (!(val & 0x3E)) {  in rs5c372_read_offset()
573 		*offset = 0;  in rs5c372_read_offset()
576 			*offset = -(((~val) & 0x3F) + 1) * ppb_per_step;  in rs5c372_read_offset()
581 	return 0;  in rs5c372_read_offset()
588 	u8 val = 0;  in rs5c372_set_offset()
589 	u8 tmp = 0;  in rs5c372_set_offset()
609 		if (steps >= -0x3E && steps <= 0x3E) {  in rs5c372_set_offset()
615 			 * Try to use low resolution mode (DEV=0). In this mode,  in rs5c372_set_offset()
628 		if (steps > 0x3E || steps < -0x3E)  in rs5c372_set_offset()
632 	if (steps > 0) {  in rs5c372_set_offset()
636 		val |= (~(-steps - 1)) & 0x3F;  in rs5c372_set_offset()
639 	if (!steps || !(val & 0x3E)) {  in rs5c372_set_offset()
649 			val = 0;  in rs5c372_set_offset()
652 	dev_dbg(&rs5c->client->dev, "write 0x%x for offset %ld\n", val, offset);  in rs5c372_set_offset()
654 	if (i2c_smbus_write_byte_data(rs5c->client, addr, val) < 0) {  in rs5c372_set_offset()
655 		dev_err(&rs5c->client->dev, "failed to write 0x%x to reg %d\n", val, addr);  in rs5c372_set_offset()
661 	return 0;  in rs5c372_set_offset()
727 	return 0;  in rs5c_sysfs_register()
741 	int addr, i, ret = 0;  in rs5c_oscillator_setup()
744 	buf[0] = rs5c372->regs[RS5C_REG_CTRL1];  in rs5c_oscillator_setup()
773 		buf[0] |= RV5C387_CTRL1_24;  in rs5c_oscillator_setup()
781 	for (i = 0; i < sizeof(buf); i++) {  in rs5c_oscillator_setup()
784 		if (unlikely(ret < 0))  in rs5c_oscillator_setup()
788 	rs5c372->regs[RS5C_REG_CTRL1] = buf[0];  in rs5c_oscillator_setup()
791 	return 0;  in rs5c_oscillator_setup()
796 	int err = 0;  in rs5c372_probe()
797 	int smbus_mode = 0;  in rs5c372_probe()
835 	/* we read registers 0x0f then 0x00-0x0f; skip the first one */  in rs5c372_probe()
840 	if (err < 0)  in rs5c372_probe()
875 	if (unlikely(err < 0)) {  in rs5c372_probe()
907 	return 0;  in rs5c372_probe()