26 #define PM8xxx_RTC_ALARM_CLEAR		BIT(0)
29 #define NUM_8_BIT_RTC_REGS		0x4
89 #define QCOM_UEFI_GUID	EFI_GUID(0x882f8c2b, 0x9646, 0x435f, \
90 				 0x8d, 0xe5, 0xf2, 0x08, 0xff, 0x80, 0xc1, 0xbd)
128 	return 0;  in pm8xxx_rtc_read_uefi_offset()
153 	return 0;  in pm8xxx_rtc_write_uefi_offset()
193 	return 0;  in pm8xxx_rtc_read_nvmem_offset()
204 	if (rc < 0) {  in pm8xxx_rtc_write_nvmem_offset()
209 	return 0;  in pm8xxx_rtc_write_nvmem_offset()
228 	if (rc < 0)  in pm8xxx_rtc_read_raw()
231 	if (reg < value[0]) {  in pm8xxx_rtc_read_raw()
240 	return 0;  in pm8xxx_rtc_read_raw()
259 		return 0;  in pm8xxx_rtc_update_offset()
282 	return 0;  in pm8xxx_rtc_update_offset()
289  * 3. Write 0x00 to LSB.
290  * 4. Write Byte[1], Byte[2], Byte[3] then Byte[0].
304 				      regs->alarm_en, 0, &alarm_enabled);  in __pm8xxx_rtc_set_time()
309 	rc = regmap_update_bits(rtc_dd->regmap, regs->ctrl, PM8xxx_RTC_ENABLE, 0);  in __pm8xxx_rtc_set_time()
313 	/* Write 0 to Byte[0] */  in __pm8xxx_rtc_set_time()
314 	rc = regmap_write(rtc_dd->regmap, regs->write, 0);  in __pm8xxx_rtc_set_time()
324 	/* Write Byte[0] */  in __pm8xxx_rtc_set_time()
325 	rc = regmap_write(rtc_dd->regmap, regs->write, value[0]);  in __pm8xxx_rtc_set_time()
342 	return 0;  in __pm8xxx_rtc_set_time()
363 	return 0;  in pm8xxx_rtc_set_time()
381 	return 0;  in pm8xxx_rtc_read_time()
397 				regs->alarm_en, 0);  in pm8xxx_rtc_set_alarm()
415 	return 0;  in pm8xxx_rtc_set_alarm()
444 	return 0;  in pm8xxx_rtc_read_alarm()
451 	u8 value[NUM_8_BIT_RTC_REGS] = {0};  in pm8xxx_rtc_alarm_irq_enable()
458 		val = 0;  in pm8xxx_rtc_alarm_irq_enable()
473 	return 0;  in pm8xxx_rtc_alarm_irq_enable()
494 				regs->alarm_en, 0);  in pm8xxx_alarm_trigger()
500 				PM8xxx_RTC_ALARM_CLEAR, 0);  in pm8xxx_alarm_trigger()
516 	.ctrl		= 0x11d,
517 	.write		= 0x11f,
518 	.read		= 0x123,
519 	.alarm_rw	= 0x127,
520 	.alarm_ctrl	= 0x11d,
521 	.alarm_ctrl2	= 0x11e,
526 	.ctrl		= 0x1e8,
527 	.write		= 0x1ea,
528 	.read		= 0x1ee,
529 	.alarm_rw	= 0x1f2,
530 	.alarm_ctrl	= 0x1e8,
531 	.alarm_ctrl2	= 0x1e9,
536 	.ctrl		= 0x6046,
537 	.write		= 0x6040,
538 	.read		= 0x6048,
539 	.alarm_rw	= 0x6140,
540 	.alarm_ctrl	= 0x6146,
541 	.alarm_ctrl2	= 0x6148,
546 	.ctrl		= 0x6146,
547 	.write		= 0x6140,
548 	.read		= 0x6148,
549 	.alarm_rw	= 0x6240,
550 	.alarm_ctrl	= 0x6246,
551 	.alarm_ctrl2	= 0x6248,
582 		return 0;  in pm8xxx_rtc_probe_offset()
617 		rtc_dd->alarm_irq = platform_get_irq(pdev, 0);  in pm8xxx_rtc_probe()
618 		if (rtc_dd->alarm_irq < 0)  in pm8xxx_rtc_probe()
648 		if (rc < 0)  in pm8xxx_rtc_probe()