Lines Matching full:alarm

4  *                  I2C RTC / Alarm chip
29 #define ABB5ZES3_REG_CTRL1_AIE BIT(1) /* Alarm interrupt enable */
40 #define ABB5ZES3_REG_CTRL2_AF BIT(3) /* Alarm interrupt status */
70 /* Alarm section (enable bits are all active low) */
71 #define ABB5ZES3_REG_ALRM_MN 0x0A /* Alarm - minute register */
73 #define ABB5ZES3_REG_ALRM_HR 0x0B /* Alarm - hours register */
75 #define ABB5ZES3_REG_ALRM_DT 0x0C /* Alarm - date register */
77 #define ABB5ZES3_REG_ALRM_DW 0x0D /* Alarm - day of the week reg. */
126 bool timer_alarm; /* current alarm is via timer A */
155 /* Clear alarm status bit. */
164 dev_err(dev, "%s: clearing alarm failed (%d)\n", __func__, ret); in _abb5zes3_rtc_clear_alarm()
169 /* Enable or disable alarm (i.e. alarm interrupt generation) */
179 dev_err(dev, "%s: writing alarm INT failed (%d)\n", in _abb5zes3_rtc_update_alarm()
294 * Read alarm currently configured via a watchdog timer using timer A. This
298 struct rtc_wkalrm *alarm) in _abb5zes3_rtc_read_timer() argument
301 struct rtc_time rtc_tm, *alarm_tm = &alarm->time; in _abb5zes3_rtc_read_timer()
344 alarm->enabled = !!(reg & ABB5ZES3_REG_CTRL2_WTAIE); in _abb5zes3_rtc_read_timer()
349 /* Read alarm currently configured via a RTC alarm registers. */
351 struct rtc_wkalrm *alarm) in _abb5zes3_rtc_read_alarm() argument
354 struct rtc_time rtc_tm, *alarm_tm = &alarm->time; in _abb5zes3_rtc_read_alarm()
363 dev_err(dev, "%s: reading alarm section failed (%d)\n", in _abb5zes3_rtc_read_alarm()
375 * The alarm section does not store year/month. We use the ones in rtc in _abb5zes3_rtc_read_alarm()
377 * alarm after current time. in _abb5zes3_rtc_read_alarm()
405 alarm->enabled = !!(reg & ABB5ZES3_REG_CTRL1_AIE); in _abb5zes3_rtc_read_alarm()
411 * As the Alarm mechanism supported by the chip is only accurate to the
413 * (up to 256 seconds w/ a second accuracy) for low alarm values (below
414 * 4 minutes). Otherwise, we use the common alarm mechanism provided
419 static int abb5zes3_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm) in abb5zes3_rtc_read_alarm() argument
425 ret = _abb5zes3_rtc_read_timer(dev, alarm); in abb5zes3_rtc_read_alarm()
427 ret = _abb5zes3_rtc_read_alarm(dev, alarm); in abb5zes3_rtc_read_alarm()
433 * Set alarm using chip alarm mechanism. It is only accurate to the
434 * minute (not the second). The function expects alarm interrupt to
437 static int _abb5zes3_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm) in _abb5zes3_rtc_set_alarm() argument
440 struct rtc_time *alarm_tm = &alarm->time; in _abb5zes3_rtc_set_alarm()
445 if (!alarm->enabled) { in _abb5zes3_rtc_set_alarm()
454 * and checking alarm value is still below. in _abb5zes3_rtc_set_alarm()
471 dev_err(dev, "%s: alarm maximum is one month in the future (%d)\n", in _abb5zes3_rtc_set_alarm()
478 * Program all alarm registers but DW one. For each register, setting in _abb5zes3_rtc_set_alarm()
479 * MSB to 0 enables associated alarm. in _abb5zes3_rtc_set_alarm()
489 dev_err(dev, "%s: writing ALARM section failed (%d)\n", in _abb5zes3_rtc_set_alarm()
494 /* Record currently configured alarm is not a timer */ in _abb5zes3_rtc_set_alarm()
497 /* Enable or disable alarm interrupt generation */ in _abb5zes3_rtc_set_alarm()
502 * Set alarm using timer watchdog (via timer A) mechanism. The function expects
505 static int _abb5zes3_rtc_set_timer(struct device *dev, struct rtc_wkalrm *alarm, in _abb5zes3_rtc_set_timer() argument
528 /* Record currently configured alarm is a timer */ in _abb5zes3_rtc_set_timer()
532 return _abb5zes3_rtc_update_timer(dev, alarm->enabled); in _abb5zes3_rtc_set_timer()
536 * The chip has an alarm which is only accurate to the minute. In order to
541 static int abb5zes3_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm) in abb5zes3_rtc_set_alarm() argument
544 struct rtc_time *alarm_tm = &alarm->time; in abb5zes3_rtc_set_alarm()
556 /* Let's first disable both the alarm and the timer interrupts */ in abb5zes3_rtc_set_alarm()
559 dev_err(dev, "%s: unable to disable alarm (%d)\n", __func__, in abb5zes3_rtc_set_alarm()
573 * Let's now configure the alarm; if we are expected to ring in in abb5zes3_rtc_set_alarm()
574 * more than 240s, then we setup an alarm. Otherwise, a timer. in abb5zes3_rtc_set_alarm()
577 ret = _abb5zes3_rtc_set_timer(dev, alarm, in abb5zes3_rtc_set_alarm()
580 ret = _abb5zes3_rtc_set_alarm(dev, alarm); in abb5zes3_rtc_set_alarm()
583 dev_err(dev, "%s: unable to configure alarm (%d)\n", __func__, in abb5zes3_rtc_set_alarm()
613 * uselessly triggering the IRQ handler we install for alarm and battery in abb5zes3_rtc_check_setup()
634 * Each component of the alarm (MN, HR, DT, DW) can be enabled/disabled in abb5zes3_rtc_check_setup()
636 * we set all alarm enable bits to disable current alarm setting. in abb5zes3_rtc_check_setup()
642 dev_err(dev, "%s: unable to disable alarm setting (%d)\n", in abb5zes3_rtc_check_setup()
659 * Set Control 2 register (timer int. disabled, alarm status cleared). in abb5zes3_rtc_check_setup()
774 /* Check alarm flag */ in _abb5zes3_rtc_interrupt()
776 dev_dbg(dev, "RTC alarm!\n"); in _abb5zes3_rtc_interrupt()
780 /* Acknowledge and disable the alarm */ in _abb5zes3_rtc_interrupt()
794 * Acknowledge and disable the alarm. Note: WTAF in _abb5zes3_rtc_interrupt()
953 MODULE_DESCRIPTION("Abracon AB-RTCMC-32.768kHz-B5ZE-S3 RTC/Alarm driver");