Lines Matching +full:10 +full:us
131 [RST_I2C4] = { 0x24, RST_TYPE_SW_DONE, 0, BIT(10) },
182 reg & rmap->done, 10, 1000); in k230_rst_wait_and_clear_done()
231 * RST_TYPE_CPU1 and RST_TYPE_SW_DONE can be set up to 3.75us. Delay in k230_rst_assert()
232 * 10us to ensure proper reset timing. in k230_rst_assert()
234 udelay(10); in k230_rst_assert()
262 * RST_TYPE_CPU1 and RST_TYPE_SW_DONE can be set up to 3.75us. Delay in k230_rst_deassert()
263 * 10us to ensure proper reset timing. in k230_rst_deassert()
265 udelay(10); in k230_rst_deassert()
285 * clock is stopped for RST_TYPE_CPU0 can be set up to 7.5us. in k230_rst_reset()
286 * Delay 10us to ensure proper reset timing. in k230_rst_reset()
288 udelay(10); in k230_rst_reset()
296 !(reg & rmap->reset), 10, 1000); in k230_rst_reset()
309 * 127.5us. Delay 200us to ensure proper reset timing. in k230_rst_reset()