Lines Matching +full:48 +full:bit
25 #define CLEAR_BOOT_FLAG_BIT BIT(0)
47 u32 bit; member
56 #define EIC7700_RESET(id, reg, bit)[id] = \ argument
57 { SYSCRG_RESET_OFFSET + (reg) * sizeof(u32), BIT(bit) }
59 /* mapping table for reset ID to register offset and reset bit */
272 EIC7700_RESET(EIC7700_RESET_TIMER0_0, 48, 0),
273 EIC7700_RESET(EIC7700_RESET_TIMER0_1, 48, 1),
274 EIC7700_RESET(EIC7700_RESET_TIMER0_2, 48, 2),
275 EIC7700_RESET(EIC7700_RESET_TIMER0_3, 48, 3),
276 EIC7700_RESET(EIC7700_RESET_TIMER0_4, 48, 4),
277 EIC7700_RESET(EIC7700_RESET_TIMER0_5, 48, 5),
278 EIC7700_RESET(EIC7700_RESET_TIMER0_6, 48, 6),
279 EIC7700_RESET(EIC7700_RESET_TIMER0_7, 48, 7),
280 EIC7700_RESET(EIC7700_RESET_TIMER0_N, 48, 8),
350 eic7700_reset[id].bit); in eic7700_reset_assert()
359 eic7700_reset[id].bit); in eic7700_reset_deassert()