Lines Matching +full:0 +full:x007fffff
67 .mV = { 0, 0x00000FFF, 0 },
68 .ip = { 0, 0x00FFF000, 12 },
69 .fm = { 0, 0x03000000, 24 },
70 .pc = { 0, 0x3C000000, 26 },
71 .pf = { 0, 0xC0000000, 30 },
72 .pd = { 1, 0x00000001, 0 },
73 .ia = { 1, 0x00001FFE, 1 },
78 .mV = { 0, 0x00000FFF, 0 },
79 .ip = { 0, 0x00FFF000, 12 },
80 .fm = { 0, 0x03000000, 24 },
81 .pc = { 0, 0x3C000000, 26 },
82 .pf = { 0, 0xC0000000, 30 },
83 .pd = { 1, 0x00000001, 0 },
84 .ia = { 1, 0x00001FFE, 1 },
85 .freq = { 1, 0x001FE000, 13 },
86 .freq_clk_src = { 1, 0x00600000, 21 },
91 .enable_state = { 0, 0x00000001, 0 },
92 .pd = { 0, 0x00000002, 1 },
93 .pc = { 0, 0x0000003C, 2 },
94 .pf = { 0, 0x000000C0, 6 },
95 .hpm = { 0, 0x00000300, 8 },
100 .mV = { 0, 0x00000FFF, 0 },
101 .enable_state = { 0, 0x00001000, 12 },
102 .comp_mode = { 0, 0x00002000, 13 },
103 .freq = { 0, 0x003FC000, 14 },
108 .uV = { 0, 0x007FFFFF, 0 },
109 .pd = { 0, 0x00800000, 23 },
110 .pc = { 0, 0x0F000000, 24 },
111 .pf = { 0, 0xF0000000, 28 },
112 .ip = { 1, 0x000003FF, 0 },
113 .ia = { 1, 0x000FFC00, 10 },
114 .fm = { 1, 0x00700000, 20 },
119 .uV = { 0, 0x007FFFFF, 0 },
120 .pd = { 0, 0x00800000, 23 },
121 .pc = { 0, 0x0F000000, 24 },
122 .pf = { 0, 0xF0000000, 28 },
123 .ip = { 1, 0x000003FF, 0 },
124 .ia = { 1, 0x000FFC00, 10 },
125 .fm = { 1, 0x00700000, 20 },
126 .pm = { 1, 0x00800000, 23 },
127 .freq = { 1, 0x1F000000, 24 },
128 .freq_clk_src = { 1, 0x60000000, 29 },
133 .enable_state = { 0, 0x00000001, 0 },
134 .pd = { 0, 0x00000002, 1 },
135 .pc = { 0, 0x0000003C, 2 },
136 .pf = { 0, 0x000003C0, 6 },
137 .hpm = { 0, 0x00000C00, 10 },
142 .uV = { 0, 0x007FFFFF, 0 },
143 .enable_state = { 0, 0x00800000, 23 },
144 .comp_mode = { 0, 0x01000000, 24 },
145 .freq = { 0, 0x3E000000, 25 },
152 REGULATOR_LINEAR_RANGE( 750000, 0, 59, 12500),
158 REGULATOR_LINEAR_RANGE( 750000, 0, 63, 12500),
162 REGULATOR_LINEAR_RANGE( 375000, 0, 59, 6250),
167 REGULATOR_LINEAR_RANGE( 375000, 0, 29, 12500),
173 REGULATOR_LINEAR_RANGE( 350000, 0, 6, 50000),
179 REGULATOR_LINEAR_RANGE( 375000, 0, 29, 12500),
186 REGULATOR_LINEAR_RANGE(1500000, 0, 31, 50000),
212 int ret = 0; in rpm_reg_set_mV_sel()
215 if (req->mask == 0) in rpm_reg_set_mV_sel()
219 if (uV < 0) in rpm_reg_set_mV_sel()
239 int ret = 0; in rpm_reg_set_uV_sel()
242 if (req->mask == 0) in rpm_reg_set_uV_sel()
246 if (uV < 0) in rpm_reg_set_uV_sel()
274 if (req->mask == 0) in rpm_reg_mV_enable()
293 if (req->mask == 0) in rpm_reg_uV_enable()
312 if (req->mask == 0) in rpm_reg_switch_enable()
331 if (req->mask == 0) in rpm_reg_mV_disable()
335 ret = rpm_reg_write(vreg, req, 0); in rpm_reg_mV_disable()
337 vreg->is_enabled = 0; in rpm_reg_mV_disable()
350 if (req->mask == 0) in rpm_reg_uV_disable()
354 ret = rpm_reg_write(vreg, req, 0); in rpm_reg_uV_disable()
356 vreg->is_enabled = 0; in rpm_reg_uV_disable()
369 if (req->mask == 0) in rpm_reg_switch_disable()
373 ret = rpm_reg_write(vreg, req, 0); in rpm_reg_switch_disable()
375 vreg->is_enabled = 0; in rpm_reg_switch_disable()
397 if (req->mask == 0) in rpm_reg_set_load()
634 if (req->mask == 0 || (value << req->shift) & ~req->mask) in rpm_reg_set()
640 return 0; in rpm_reg_set()
665 for (i = 0; i < ARRAY_SIZE(freq_table); i++) { in rpm_reg_of_parse_freq()
668 return 0; in rpm_reg_of_parse_freq()
699 if (ret < 0) in rpm_reg_of_parse()
721 } else if (ret < 0) { in rpm_reg_of_parse()
735 force_mode = 0; in rpm_reg_of_parse()
768 return 0; in rpm_reg_of_parse()
985 return 0; in rpm_reg_probe()