Lines Matching +full:anatop +full:- +full:vol +full:- +full:bit +full:- +full:shift

1 // SPDX-License-Identifier: GPL-2.0+
43 if (anatop_reg->delay_bit_width && new_sel > old_sel) { in anatop_regmap_set_voltage_time_sel()
50 regmap_read(reg->regmap, anatop_reg->delay_reg, &val); in anatop_regmap_set_voltage_time_sel()
51 val = (val >> anatop_reg->delay_bit_shift) & in anatop_regmap_set_voltage_time_sel()
52 ((1 << anatop_reg->delay_bit_width) - 1); in anatop_regmap_set_voltage_time_sel()
53 ret = (new_sel - old_sel) * (LDO_RAMP_UP_UNIT_IN_CYCLES << in anatop_regmap_set_voltage_time_sel()
65 sel = anatop_reg->bypass ? LDO_FET_FULL_ON : anatop_reg->sel; in anatop_regmap_enable()
85 if (anatop_reg->bypass || !anatop_regmap_is_enabled(reg)) { in anatop_regmap_core_set_voltage_sel()
86 anatop_reg->sel = selector; in anatop_regmap_core_set_voltage_sel()
92 anatop_reg->sel = selector; in anatop_regmap_core_set_voltage_sel()
100 if (anatop_reg->bypass || !anatop_regmap_is_enabled(reg)) in anatop_regmap_core_get_voltage_sel()
101 return anatop_reg->sel; in anatop_regmap_core_get_voltage_sel()
113 WARN_ON(!anatop_reg->bypass); in anatop_regmap_get_bypass()
115 WARN_ON(anatop_reg->bypass); in anatop_regmap_get_bypass()
117 *enable = anatop_reg->bypass; in anatop_regmap_get_bypass()
126 if (enable == anatop_reg->bypass) in anatop_regmap_set_bypass()
129 sel = enable ? LDO_FET_FULL_ON : anatop_reg->sel; in anatop_regmap_set_bypass()
130 anatop_reg->bypass = enable; in anatop_regmap_set_bypass()
157 struct device *dev = &pdev->dev; in anatop_regulator_probe()
158 struct device_node *np = dev->of_node; in anatop_regulator_probe()
177 return -ENOMEM; in anatop_regulator_probe()
179 rdesc = &sreg->rdesc; in anatop_regulator_probe()
180 rdesc->type = REGULATOR_VOLTAGE; in anatop_regulator_probe()
181 rdesc->owner = THIS_MODULE; in anatop_regulator_probe()
183 of_property_read_string(np, "regulator-name", &rdesc->name); in anatop_regulator_probe()
184 if (!rdesc->name) { in anatop_regulator_probe()
185 dev_err(dev, "failed to get a regulator-name\n"); in anatop_regulator_probe()
186 return -EINVAL; in anatop_regulator_probe()
191 return -ENOMEM; in anatop_regulator_probe()
193 initdata->supply_regulator = "vin"; in anatop_regulator_probe()
197 return -ENODEV; in anatop_regulator_probe()
203 ret = of_property_read_u32(np, "anatop-reg-offset", &control_reg); in anatop_regulator_probe()
205 dev_err(dev, "no anatop-reg-offset property set\n"); in anatop_regulator_probe()
208 ret = of_property_read_u32(np, "anatop-vol-bit-width", &vol_bit_width); in anatop_regulator_probe()
210 dev_err(dev, "no anatop-vol-bit-width property set\n"); in anatop_regulator_probe()
213 ret = of_property_read_u32(np, "anatop-vol-bit-shift", &vol_bit_shift); in anatop_regulator_probe()
215 dev_err(dev, "no anatop-vol-bit-shift property set\n"); in anatop_regulator_probe()
218 ret = of_property_read_u32(np, "anatop-min-bit-val", &min_bit_val); in anatop_regulator_probe()
220 dev_err(dev, "no anatop-min-bit-val property set\n"); in anatop_regulator_probe()
223 ret = of_property_read_u32(np, "anatop-min-voltage", &min_voltage); in anatop_regulator_probe()
225 dev_err(dev, "no anatop-min-voltage property set\n"); in anatop_regulator_probe()
228 ret = of_property_read_u32(np, "anatop-max-voltage", &max_voltage); in anatop_regulator_probe()
230 dev_err(dev, "no anatop-max-voltage property set\n"); in anatop_regulator_probe()
235 of_property_read_u32(np, "anatop-delay-reg-offset", in anatop_regulator_probe()
236 &sreg->delay_reg); in anatop_regulator_probe()
237 of_property_read_u32(np, "anatop-delay-bit-width", in anatop_regulator_probe()
238 &sreg->delay_bit_width); in anatop_regulator_probe()
239 of_property_read_u32(np, "anatop-delay-bit-shift", in anatop_regulator_probe()
240 &sreg->delay_bit_shift); in anatop_regulator_probe()
242 rdesc->n_voltages = (max_voltage - min_voltage) / 25000 + 1 in anatop_regulator_probe()
244 rdesc->min_uV = min_voltage; in anatop_regulator_probe()
245 rdesc->uV_step = 25000; in anatop_regulator_probe()
246 rdesc->linear_min_sel = min_bit_val; in anatop_regulator_probe()
247 rdesc->vsel_reg = control_reg; in anatop_regulator_probe()
248 rdesc->vsel_mask = ((1 << vol_bit_width) - 1) << vol_bit_shift; in anatop_regulator_probe()
249 rdesc->min_dropout_uV = 125000; in anatop_regulator_probe()
251 config.dev = &pdev->dev; in anatop_regulator_probe()
254 config.of_node = pdev->dev.of_node; in anatop_regulator_probe()
258 if (control_reg && sreg->delay_bit_width) { in anatop_regulator_probe()
259 rdesc->ops = &anatop_core_rops; in anatop_regulator_probe()
261 ret = regmap_read(config.regmap, rdesc->vsel_reg, &val); in anatop_regulator_probe()
267 sreg->sel = (val & rdesc->vsel_mask) >> vol_bit_shift; in anatop_regulator_probe()
268 if (sreg->sel == LDO_FET_FULL_ON) { in anatop_regulator_probe()
269 sreg->sel = 0; in anatop_regulator_probe()
270 sreg->bypass = true; in anatop_regulator_probe()
275 * a sane default until imx6-cpufreq was probed and changes the in anatop_regulator_probe()
278 if (!sreg->sel && !strcmp(rdesc->name, "vddpu")) in anatop_regulator_probe()
279 sreg->sel = 22; in anatop_regulator_probe()
282 if (!sreg->sel && !strcmp(rdesc->name, "vddpcie")) in anatop_regulator_probe()
283 sreg->sel = 0x10; in anatop_regulator_probe()
285 if (!sreg->bypass && !sreg->sel) { in anatop_regulator_probe()
286 dev_err(&pdev->dev, "Failed to read a valid default voltage selector.\n"); in anatop_regulator_probe()
287 return -EINVAL; in anatop_regulator_probe()
292 rdesc->ops = &anatop_rops; in anatop_regulator_probe()
294 if (!of_property_read_u32(np, "anatop-enable-bit", in anatop_regulator_probe()
300 rdesc->enable_reg = control_reg; in anatop_regulator_probe()
301 rdesc->enable_mask = BIT(enable_bit); in anatop_regulator_probe()
309 if (ret == -EPROBE_DEFER) in anatop_regulator_probe()
311 rdesc->name); in anatop_regulator_probe()
313 dev_err(dev, "failed to register %s\n", rdesc->name); in anatop_regulator_probe()
323 { .compatible = "fsl,anatop-regulator", },
350 MODULE_AUTHOR("Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>");
351 MODULE_DESCRIPTION("ANATOP Regulator driver");