Lines Matching refs:GENMASK
37 #define DF2_COH_ST_FABRIC_ID GENMASK(19, 8)
38 #define DF4p5_COH_ST_FABRIC_ID GENMASK(15, 8)
60 #define DF3_COMPONENT_ID_MASK GENMASK(9, 0)
61 #define DF4_COMPONENT_ID_MASK GENMASK(15, 0)
82 #define DF2_DST_FABRIC_ID GENMASK(7, 0)
83 #define DF3_DST_FABRIC_ID GENMASK(9, 0)
84 #define DF3p5_DST_FABRIC_ID GENMASK(11, 0)
85 #define DF4_DST_FABRIC_ID GENMASK(27, 16)
86 #define DF4p5_DST_FABRIC_ID GENMASK(23, 16)
109 #define DF2_DIE_ID_MASK GENMASK(15, 8)
110 #define DF3_DIE_ID_MASK GENMASK(18, 16)
111 #define DF4_DIE_ID_MASK GENMASK(15, 0)
129 #define DF2_DIE_ID_SHIFT GENMASK(27, 24)
171 #define DF2_BASE_ADDR GENMASK(31, 12)
172 #define DF4_BASE_ADDR GENMASK(27, 0)
191 #define DF_DRAM_HOLE_BASE_MASK GENMASK(31, 24)
212 #define DF2_DRAM_LIMIT_ADDR GENMASK(31, 12)
213 #define DF4_DRAM_LIMIT_ADDR GENMASK(27, 0)
273 #define DF2_HI_ADDR_OFFSET GENMASK(31, 20)
274 #define DF3_HI_ADDR_OFFSET GENMASK(31, 12)
277 #define DF4_HI_ADDR_OFFSET GENMASK(31, 1)
317 #define DF2_INTLV_ADDR_SEL GENMASK(10, 8)
318 #define DF3_INTLV_ADDR_SEL GENMASK(11, 9)
319 #define DF4_INTLV_ADDR_SEL GENMASK(2, 0)
340 #define DF2_INTLV_NUM_CHAN GENMASK(7, 4)
341 #define DF3_INTLV_NUM_CHAN GENMASK(5, 2)
342 #define DF3p5_INTLV_NUM_CHAN GENMASK(6, 2)
343 #define DF4_INTLV_NUM_CHAN GENMASK(8, 4)
344 #define DF4p5_INTLV_NUM_CHAN GENMASK(9, 4)
367 #define DF2_INTLV_NUM_DIES GENMASK(11, 10)
368 #define DF3_INTLV_NUM_DIES GENMASK(7, 6)
370 #define DF4_INTLV_NUM_DIES GENMASK(13, 12)
434 #define DF_LOG2_ADDR_64K_SPACE0 GENMASK(5, 0)
452 #define DF_MAJOR_REVISION GENMASK(27, 24)
470 #define DF_MINOR_REVISION GENMASK(23, 16)
492 #define DF3_NODE_ID_MASK GENMASK(25, 16)
493 #define DF4_NODE_ID_MASK GENMASK(31, 16)
515 #define DF3_NODE_ID_SHIFT GENMASK(3, 0)
555 #define DF4_REMAP_SEL GENMASK(7, 5)
556 #define DF4p5_REMAP_SEL GENMASK(6, 5)
579 #define DF2_SOCKET_ID_MASK GENMASK(23, 16)
580 #define DF3_SOCKET_ID_MASK GENMASK(26, 24)
581 #define DF4_SOCKET_ID_MASK GENMASK(31, 16)
604 #define DF2_SOCKET_ID_SHIFT GENMASK(31, 28)
605 #define DF3_SOCKET_ID_SHIFT GENMASK(9, 8)
606 #define DF4_SOCKET_ID_SHIFT GENMASK(11, 8)