76 	u16 period;  member
182 	tpu_pwm_write(tpd, TPU_TGRBn, tpd->period);  in tpu_pwm_timer_start()
185 		tpd->channel, tpd->duty, tpd->period);  in tpu_pwm_timer_start()
226 	tpd->period = 0;  in tpu_pwm_request()
250 	u64 period;  in tpu_pwm_config()  local
265 	period = mul_u64_u64_div_u64(clk_rate, period_ns, NSEC_PER_SEC);  in tpu_pwm_config()
279 	switch (period) {  in tpu_pwm_config()
300 	period >>= 2 * prescaler;  in tpu_pwm_config()
310 		clk_rate, 1 << (2 * prescaler), (u32)period, duty);  in tpu_pwm_config()
312 	if (tpd->prescaler == prescaler && tpd->period == period)  in tpu_pwm_config()
316 	tpd->period = period;  in tpu_pwm_config()
339 	if (duty == 0 || duty == period) {  in tpu_pwm_config()
376 	if (tpd->duty == 0 || tpd->duty == tpd->period) {  in tpu_pwm_enable()
421 			     state->duty_cycle, state->period, enabled);  in tpu_pwm_apply()