3  * R-Mobile TPU PWM driver
71 	struct tpu_device *tpu;  member
72 	unsigned int channel;		/* Channel number in the TPU */
96 	void __iomem *base = tpd->tpu->base + TPU_CHANNEL_OFFSET  in tpu_pwm_write()
107 	dev_dbg(&tpd->tpu->pdev->dev, "%u: configuring pin as %s\n",  in tpu_pwm_set_pin()
134 	spin_lock_irqsave(&tpd->tpu->lock, flags);  in tpu_pwm_start_stop()
135 	value = ioread16(tpd->tpu->base + TPU_TSTR);  in tpu_pwm_start_stop()
142 	iowrite16(value, tpd->tpu->base + TPU_TSTR);  in tpu_pwm_start_stop()
143 	spin_unlock_irqrestore(&tpd->tpu->lock, flags);  in tpu_pwm_start_stop()
152 		pm_runtime_get_sync(&tpd->tpu->pdev->dev);  in tpu_pwm_timer_start()
153 		ret = clk_prepare_enable(tpd->tpu->clk);  in tpu_pwm_timer_start()
155 			dev_err(&tpd->tpu->pdev->dev, "cannot enable clock\n");  in tpu_pwm_timer_start()
184 	dev_dbg(&tpd->tpu->pdev->dev, "%u: TGRA 0x%04x TGRB 0x%04x\n",  in tpu_pwm_timer_start()
202 	clk_disable_unprepare(tpd->tpu->clk);  in tpu_pwm_timer_stop()
203 	pm_runtime_put(&tpd->tpu->pdev->dev);  in tpu_pwm_timer_stop()
214 	struct tpu_device *tpu = to_tpu_device(chip);  in tpu_pwm_request()  local
220 	tpd = &tpu->tpd[pwm->hwpwm];  in tpu_pwm_request()
222 	tpd->tpu = tpu;  in tpu_pwm_request()
236 	struct tpu_device *tpu = to_tpu_device(chip);  in tpu_pwm_free()  local
237 	struct tpu_pwm_device *tpd = &tpu->tpd[pwm->hwpwm];  in tpu_pwm_free()
245 	struct tpu_device *tpu = to_tpu_device(chip);  in tpu_pwm_config()  local
246 	struct tpu_pwm_device *tpd = &tpu->tpd[pwm->hwpwm];  in tpu_pwm_config()
254 	clk_rate = clk_get_rate(tpu->clk);  in tpu_pwm_config()
308 	dev_dbg(&tpu->pdev->dev,  in tpu_pwm_config()
330 		dev_dbg(&tpu->pdev->dev, "%u: TGRA 0x%04x\n", tpd->channel,  in tpu_pwm_config()
354 	struct tpu_device *tpu = to_tpu_device(chip);  in tpu_pwm_set_polarity()  local
355 	struct tpu_pwm_device *tpd = &tpu->tpd[pwm->hwpwm];  in tpu_pwm_set_polarity()
364 	struct tpu_device *tpu = to_tpu_device(chip);  in tpu_pwm_enable()  local
365 	struct tpu_pwm_device *tpd = &tpu->tpd[pwm->hwpwm];  in tpu_pwm_enable()
387 	struct tpu_device *tpu = to_tpu_device(chip);  in tpu_pwm_disable()  local
388 	struct tpu_pwm_device *tpd = &tpu->tpd[pwm->hwpwm];  in tpu_pwm_disable()
444 	struct tpu_device *tpu;  in tpu_probe()  local
447 	chip = devm_pwmchip_alloc(&pdev->dev, TPU_CHANNEL_MAX, sizeof(*tpu));  in tpu_probe()
450 	tpu = to_tpu_device(chip);  in tpu_probe()
452 	spin_lock_init(&tpu->lock);  in tpu_probe()
453 	tpu->pdev = pdev;  in tpu_probe()
456 	tpu->base = devm_platform_ioremap_resource(pdev, 0);  in tpu_probe()
457 	if (IS_ERR(tpu->base))  in tpu_probe()
458 		return PTR_ERR(tpu->base);  in tpu_probe()
460 	tpu->clk = devm_clk_get(&pdev->dev, NULL);  in tpu_probe()
461 	if (IS_ERR(tpu->clk))  in tpu_probe()
462 		return dev_err_probe(&pdev->dev, PTR_ERR(tpu->clk), "Failed to get clock\n");  in tpu_probe()
465 	platform_set_drvdata(pdev, tpu);  in tpu_probe()
482 	{ .compatible = "renesas,tpu-r8a73a4", },
483 	{ .compatible = "renesas,tpu-r8a7740", },
484 	{ .compatible = "renesas,tpu-r8a7790", },
485 	{ .compatible = "renesas,tpu", },
495 		.name	= "renesas-tpu-pwm",
503 MODULE_DESCRIPTION("Renesas TPU PWM Driver");
505 MODULE_ALIAS("platform:renesas-tpu-pwm");