50 static void rcar_pwm_write(struct rcar_pwm_chip *rp, u32 data,  in rcar_pwm_write()  argument
53 	writel(data, rp->base + offset);  in rcar_pwm_write()
56 static u32 rcar_pwm_read(struct rcar_pwm_chip *rp, unsigned int offset)  in rcar_pwm_read()  argument
58 	return readl(rp->base + offset);  in rcar_pwm_read()
61 static void rcar_pwm_update(struct rcar_pwm_chip *rp, u32 mask, u32 data,  in rcar_pwm_update()  argument
66 	value = rcar_pwm_read(rp, offset);  in rcar_pwm_update()
69 	rcar_pwm_write(rp, value, offset);  in rcar_pwm_update()
72 static int rcar_pwm_get_clock_division(struct rcar_pwm_chip *rp, int period_ns)  in rcar_pwm_get_clock_division()  argument
74 	unsigned long clk_rate = clk_get_rate(rp->clk);  in rcar_pwm_get_clock_division()
88 static void rcar_pwm_set_clock_control(struct rcar_pwm_chip *rp,  in rcar_pwm_set_clock_control()  argument
93 	value = rcar_pwm_read(rp, RCAR_PWMCR);  in rcar_pwm_set_clock_control()
102 	rcar_pwm_write(rp, value, RCAR_PWMCR);  in rcar_pwm_set_clock_control()
105 static int rcar_pwm_set_counter(struct rcar_pwm_chip *rp, int div, int duty_ns,  in rcar_pwm_set_counter()  argument
109 	unsigned long clk_rate = clk_get_rate(rp->clk);  in rcar_pwm_set_counter()
127 	rcar_pwm_write(rp, cyc | ph, RCAR_PWMCNT);  in rcar_pwm_set_counter()
142 static int rcar_pwm_enable(struct rcar_pwm_chip *rp)  in rcar_pwm_enable()  argument
147 	value = rcar_pwm_read(rp, RCAR_PWMCNT);  in rcar_pwm_enable()
152 	rcar_pwm_update(rp, RCAR_PWMCR_EN0, RCAR_PWMCR_EN0, RCAR_PWMCR);  in rcar_pwm_enable()
157 static void rcar_pwm_disable(struct rcar_pwm_chip *rp)  in rcar_pwm_disable()  argument
159 	rcar_pwm_update(rp, RCAR_PWMCR_EN0, 0, RCAR_PWMCR);  in rcar_pwm_disable()
165 	struct rcar_pwm_chip *rp = to_rcar_pwm_chip(chip);  in rcar_pwm_apply()  local
173 		rcar_pwm_disable(rp);  in rcar_pwm_apply()
177 	div = rcar_pwm_get_clock_division(rp, state->period);  in rcar_pwm_apply()
181 	rcar_pwm_update(rp, RCAR_PWMCR_SYNC, RCAR_PWMCR_SYNC, RCAR_PWMCR);  in rcar_pwm_apply()
183 	ret = rcar_pwm_set_counter(rp, div, state->duty_cycle, state->period);  in rcar_pwm_apply()
185 		rcar_pwm_set_clock_control(rp, div);  in rcar_pwm_apply()
188 	rcar_pwm_update(rp, RCAR_PWMCR_SYNC, 0, RCAR_PWMCR);  in rcar_pwm_apply()
191 		ret = rcar_pwm_enable(rp);  in rcar_pwm_apply()