Lines Matching refs:clk_rate_hz
49 unsigned long clk_rate_hz; member
88 mul_u64_u32_div(wf->period_length_ns, ddata->clk_rate_hz, NSEC_PER_SEC), in axi_pwmgen_round_waveform_tohw()
102 mul_u64_u32_div(wf->duty_length_ns, ddata->clk_rate_hz, NSEC_PER_SEC), in axi_pwmgen_round_waveform_tohw()
105 mul_u64_u32_div(wf->duty_offset_ns, ddata->clk_rate_hz, NSEC_PER_SEC), in axi_pwmgen_round_waveform_tohw()
112 ddata->clk_rate_hz, wfhw->period_cnt, wfhw->duty_cycle_cnt, wfhw->duty_offset_cnt); in axi_pwmgen_round_waveform_tohw()
124 ddata->clk_rate_hz); in axi_pwmgen_round_waveform_fromhw()
127 ddata->clk_rate_hz); in axi_pwmgen_round_waveform_fromhw()
130 ddata->clk_rate_hz); in axi_pwmgen_round_waveform_fromhw()
287 ddata->clk_rate_hz = clk_get_rate(clk); in axi_pwmgen_probe()
288 if (!ddata->clk_rate_hz || ddata->clk_rate_hz > NSEC_PER_SEC) in axi_pwmgen_probe()
290 "Invalid clock rate: %lu\n", ddata->clk_rate_hz); in axi_pwmgen_probe()