Lines Matching +full:gnss +full:- +full:receiver
1 // SPDX-License-Identifier: GPL-2.0-only
13 #include <linux/clk-provider.h>
15 #include <linux/platform_data/i2c-xiic.h>
16 #include <linux/platform_data/i2c-ocores.h>
24 #include <linux/nvmem-consumer.h>
441 (void *)((uintptr_t)(bp) + (map)->bp_offset); \
457 uintptr_t addr = (uintptr_t)(bp) + (res)->bp_offset; \
497 --
500 * 11: Orolia TS0 (GNSS)
654 .name = "xiic-i2c",
704 .modalias = "spi-nor",
763 /* Timestamp associated with GNSS1 receiver PPS */
829 .modalias = "spi-nor",
838 .name = "ocores-i2c",
994 .modalias = "spi-nor",
1003 .name = "ocores-i2c",
1009 .reg_io_width = 4, // 32-bit/4-byte
1010 .reg_shift = 2, // 32-bit addressing
1110 { .name = "GNSS", .value = 0x0004, .frequency = 1 },
1150 return bp->sma_op->init(bp); in ptp_ocp_sma_init()
1156 return bp->sma_op->get(bp, sma_nr); in ptp_ocp_sma_get()
1162 return bp->sma_op->set_inputs(bp, sma_nr, val); in ptp_ocp_sma_set_inputs()
1168 return bp->sma_op->set_output(bp, sma_nr, val); in ptp_ocp_sma_set_output()
1193 return -EINVAL; in ptp_ocp_select_val_from_name()
1206 count--; in ptp_ocp_select_table_show()
1221 iowrite32(ctrl, &bp->reg->ctrl); in __ptp_ocp_gettime_locked()
1224 ctrl = ioread32(&bp->reg->ctrl); in __ptp_ocp_gettime_locked()
1230 if (sts && bp->ts_window_adjust) { in __ptp_ocp_gettime_locked()
1231 s64 ns = timespec64_to_ns(&sts->post_ts); in __ptp_ocp_gettime_locked()
1233 sts->post_ts = ns_to_timespec64(ns - bp->ts_window_adjust); in __ptp_ocp_gettime_locked()
1236 time_ns = ioread32(&bp->reg->time_ns); in __ptp_ocp_gettime_locked()
1237 time_sec = ioread32(&bp->reg->time_sec); in __ptp_ocp_gettime_locked()
1239 ts->tv_sec = time_sec; in __ptp_ocp_gettime_locked()
1240 ts->tv_nsec = time_ns; in __ptp_ocp_gettime_locked()
1242 return ctrl & OCP_CTRL_READ_TIME_DONE ? 0 : -ETIMEDOUT; in __ptp_ocp_gettime_locked()
1253 spin_lock_irqsave(&bp->lock, flags); in ptp_ocp_gettimex()
1255 spin_unlock_irqrestore(&bp->lock, flags); in ptp_ocp_gettimex()
1266 time_ns = ts->tv_nsec; in __ptp_ocp_settime_locked()
1267 time_sec = ts->tv_sec; in __ptp_ocp_settime_locked()
1269 select = ioread32(&bp->reg->select); in __ptp_ocp_settime_locked()
1270 iowrite32(OCP_SELECT_CLK_REG, &bp->reg->select); in __ptp_ocp_settime_locked()
1272 iowrite32(time_ns, &bp->reg->adjust_ns); in __ptp_ocp_settime_locked()
1273 iowrite32(time_sec, &bp->reg->adjust_sec); in __ptp_ocp_settime_locked()
1276 iowrite32(ctrl, &bp->reg->ctrl); in __ptp_ocp_settime_locked()
1279 iowrite32(select >> 16, &bp->reg->select); in __ptp_ocp_settime_locked()
1288 spin_lock_irqsave(&bp->lock, flags); in ptp_ocp_settime()
1290 spin_unlock_irqrestore(&bp->lock, flags); in ptp_ocp_settime()
1300 select = ioread32(&bp->reg->select); in __ptp_ocp_adjtime_locked()
1301 iowrite32(OCP_SELECT_CLK_REG, &bp->reg->select); in __ptp_ocp_adjtime_locked()
1303 iowrite32(adj_val, &bp->reg->offset_ns); in __ptp_ocp_adjtime_locked()
1304 iowrite32(NSEC_PER_SEC, &bp->reg->offset_window_ns); in __ptp_ocp_adjtime_locked()
1307 iowrite32(ctrl, &bp->reg->ctrl); in __ptp_ocp_adjtime_locked()
1310 iowrite32(select >> 16, &bp->reg->select); in __ptp_ocp_adjtime_locked()
1320 spin_lock_irqsave(&bp->lock, flags); in ptp_ocp_adjtime_coarse()
1327 spin_unlock_irqrestore(&bp->lock, flags); in ptp_ocp_adjtime_coarse()
1337 if (delta_ns > NSEC_PER_SEC || -delta_ns > NSEC_PER_SEC) { in ptp_ocp_adjtime()
1343 adj_ns = sign ? -delta_ns : delta_ns; in ptp_ocp_adjtime()
1345 spin_lock_irqsave(&bp->lock, flags); in ptp_ocp_adjtime()
1347 spin_unlock_irqrestore(&bp->lock, flags); in ptp_ocp_adjtime()
1358 return -EOPNOTSUPP; in ptp_ocp_null_adjfine()
1370 return -EOPNOTSUPP; in ptp_ocp_null_adjphase()
1382 switch (rq->type) { in ptp_ocp_enable()
1385 switch (rq->extts.index) { in ptp_ocp_enable()
1387 ext = bp->ts0; in ptp_ocp_enable()
1390 ext = bp->ts1; in ptp_ocp_enable()
1393 ext = bp->ts2; in ptp_ocp_enable()
1396 ext = bp->ts3; in ptp_ocp_enable()
1399 ext = bp->ts4; in ptp_ocp_enable()
1402 ext = bp->pps; in ptp_ocp_enable()
1408 ext = bp->pps; in ptp_ocp_enable()
1411 switch (rq->perout.index) { in ptp_ocp_enable()
1416 if (on && (rq->perout.period.sec != 1 || in ptp_ocp_enable()
1417 rq->perout.period.nsec != 0)) in ptp_ocp_enable()
1418 return -EINVAL; in ptp_ocp_enable()
1424 req = rq->perout.index - 1; in ptp_ocp_enable()
1425 ext = bp->signal_out[req]; in ptp_ocp_enable()
1426 err = ptp_ocp_signal_from_perout(bp, req, &rq->perout); in ptp_ocp_enable()
1433 return -EOPNOTSUPP; in ptp_ocp_enable()
1436 err = -ENXIO; in ptp_ocp_enable()
1438 err = ext->info->enable(ext, req, on); in ptp_ocp_enable()
1467 return -EOPNOTSUPP; in ptp_ocp_verify()
1497 select = ioread32(&bp->reg->select); in __ptp_ocp_clear_drift_locked()
1498 iowrite32(OCP_SELECT_CLK_REG, &bp->reg->select); in __ptp_ocp_clear_drift_locked()
1500 iowrite32(0, &bp->reg->drift_ns); in __ptp_ocp_clear_drift_locked()
1503 iowrite32(ctrl, &bp->reg->ctrl); in __ptp_ocp_clear_drift_locked()
1506 iowrite32(select >> 16, &bp->reg->select); in __ptp_ocp_clear_drift_locked()
1514 spin_lock_irqsave(&bp->lock, flags); in ptp_ocp_utc_distribute()
1516 bp->utc_tai_offset = val; in ptp_ocp_utc_distribute()
1518 if (bp->irig_out) in ptp_ocp_utc_distribute()
1519 iowrite32(val, &bp->irig_out->adj_sec); in ptp_ocp_utc_distribute()
1520 if (bp->dcf_out) in ptp_ocp_utc_distribute()
1521 iowrite32(val, &bp->dcf_out->adj_sec); in ptp_ocp_utc_distribute()
1522 if (bp->nmea_out) in ptp_ocp_utc_distribute()
1523 iowrite32(val, &bp->nmea_out->adj_sec); in ptp_ocp_utc_distribute()
1525 spin_unlock_irqrestore(&bp->lock, flags); in ptp_ocp_utc_distribute()
1535 status = ioread32(&bp->pps_to_clk->status); in ptp_ocp_watchdog()
1538 iowrite32(status, &bp->pps_to_clk->status); in ptp_ocp_watchdog()
1539 if (!bp->gnss_lost) { in ptp_ocp_watchdog()
1540 spin_lock_irqsave(&bp->lock, flags); in ptp_ocp_watchdog()
1542 spin_unlock_irqrestore(&bp->lock, flags); in ptp_ocp_watchdog()
1543 bp->gnss_lost = ktime_get_real_seconds(); in ptp_ocp_watchdog()
1546 } else if (bp->gnss_lost) { in ptp_ocp_watchdog()
1547 bp->gnss_lost = 0; in ptp_ocp_watchdog()
1550 /* if GNSS provides correct data we can rely on in ptp_ocp_watchdog()
1553 if (bp->tod) { in ptp_ocp_watchdog()
1554 status = ioread32(&bp->tod->utc_status); in ptp_ocp_watchdog()
1557 utc_offset != bp->utc_tai_offset) in ptp_ocp_watchdog()
1561 mod_timer(&bp->watchdog, jiffies + HZ); in ptp_ocp_watchdog()
1572 ctrl = ioread32(&bp->reg->ctrl); in ptp_ocp_estimate_pci_timing()
1575 iowrite32(ctrl, &bp->reg->ctrl); in ptp_ocp_estimate_pci_timing()
1579 ctrl = ioread32(&bp->reg->ctrl); in ptp_ocp_estimate_pci_timing()
1583 delay = min(delay, end - start); in ptp_ocp_estimate_pci_timing()
1585 bp->ts_window_adjust = (delay >> 5) * 3; in ptp_ocp_estimate_pci_timing()
1595 iowrite32(ctrl, &bp->reg->ctrl); in ptp_ocp_init_clock()
1598 iowrite32(servo_conf->servo_offset_p, &bp->reg->servo_offset_p); in ptp_ocp_init_clock()
1599 iowrite32(servo_conf->servo_offset_i, &bp->reg->servo_offset_i); in ptp_ocp_init_clock()
1600 iowrite32(servo_conf->servo_drift_p, &bp->reg->servo_drift_p); in ptp_ocp_init_clock()
1601 iowrite32(servo_conf->servo_drift_p, &bp->reg->servo_drift_i); in ptp_ocp_init_clock()
1605 iowrite32(ctrl, &bp->reg->ctrl); in ptp_ocp_init_clock()
1607 if ((ioread32(&bp->reg->ctrl) & OCP_CTRL_ENABLE) == 0) { in ptp_ocp_init_clock()
1608 dev_err(&bp->pdev->dev, "clock not enabled\n"); in ptp_ocp_init_clock()
1609 return -ENODEV; in ptp_ocp_init_clock()
1614 bp->sync = ioread32(&bp->reg->status) & OCP_STATUS_IN_SYNC; in ptp_ocp_init_clock()
1615 if (!bp->sync) { in ptp_ocp_init_clock()
1617 ptp_ocp_settime(&bp->ptp_info, &ts); in ptp_ocp_init_clock()
1621 if (bp->pps_to_clk) { in ptp_ocp_init_clock()
1622 timer_setup(&bp->watchdog, ptp_ocp_watchdog, 0); in ptp_ocp_init_clock()
1623 mod_timer(&bp->watchdog, jiffies + HZ); in ptp_ocp_init_clock()
1634 ctrl = ioread32(&bp->tod->ctrl); in ptp_ocp_tod_init()
1637 iowrite32(ctrl, &bp->tod->ctrl); in ptp_ocp_tod_init()
1639 reg = ioread32(&bp->tod->utc_status); in ptp_ocp_tod_init()
1662 idx = ARRAY_SIZE(gnss_name) - 1; in ptp_ocp_tod_gnss_name()
1670 "GNSS", "GNSS2", "MAC", "NMEA" in ptp_ocp_tty_port_name()
1685 dev = dev->parent; in ptp_ocp_nvmem_match()
1686 if (!i2c_verify_client(dev) || info->tag != dev->platform_data) in ptp_ocp_nvmem_match()
1689 while ((dev = dev->parent)) in ptp_ocp_nvmem_match()
1690 if (dev->driver && !strcmp(dev->driver->name, KBUILD_MODNAME)) in ptp_ocp_nvmem_match()
1691 return info->bp == dev_get_drvdata(dev); in ptp_ocp_nvmem_match()
1719 if (!bp->i2c_ctrl) in ptp_ocp_read_eeprom()
1725 for (map = bp->eeprom_map; map->len; map++) { in ptp_ocp_read_eeprom()
1726 if (map->tag != tag) { in ptp_ocp_read_eeprom()
1727 tag = map->tag; in ptp_ocp_read_eeprom()
1737 ret = nvmem_device_read(nvmem, map->off, map->len, in ptp_ocp_read_eeprom()
1739 if (ret != map->len) in ptp_ocp_read_eeprom()
1743 bp->has_eeprom_data = true; in ptp_ocp_read_eeprom()
1750 dev_err(&bp->pdev->dev, "could not read eeprom: %d\n", ret); in ptp_ocp_read_eeprom()
1760 dev = &bp->spi_flash->dev; in ptp_ocp_find_flash()
1782 hdr = (const struct ptp_ocp_firmware_header *)fw->data; in ptp_ocp_devlink_fw_image()
1783 if (memcmp(hdr->magic, OCP_FIRMWARE_MAGIC_HEADER, 4)) { in ptp_ocp_devlink_fw_image()
1787 return -EINVAL; in ptp_ocp_devlink_fw_image()
1790 if (be16_to_cpu(hdr->pci_vendor_id) != bp->pdev->vendor || in ptp_ocp_devlink_fw_image()
1791 be16_to_cpu(hdr->pci_device_id) != bp->pdev->device) { in ptp_ocp_devlink_fw_image()
1795 return -EINVAL; in ptp_ocp_devlink_fw_image()
1799 length = be32_to_cpu(hdr->image_size); in ptp_ocp_devlink_fw_image()
1800 if (length != (fw->size - offset)) { in ptp_ocp_devlink_fw_image()
1804 return -EINVAL; in ptp_ocp_devlink_fw_image()
1807 crc = crc16(0xffff, &fw->data[offset], length); in ptp_ocp_devlink_fw_image()
1808 if (be16_to_cpu(hdr->crc) != crc) { in ptp_ocp_devlink_fw_image()
1812 return -EINVAL; in ptp_ocp_devlink_fw_image()
1815 *data = &fw->data[offset]; in ptp_ocp_devlink_fw_image()
1838 base = bp->flash_start; in ptp_ocp_devlink_flash()
1859 resid -= len; in ptp_ocp_devlink_flash()
1877 dev_err(&bp->pdev->dev, "Can't find Flash SPI adapter\n"); in ptp_ocp_devlink_flash_update()
1878 return -ENODEV; in ptp_ocp_devlink_flash_update()
1884 err = ptp_ocp_devlink_flash(devlink, dev, params->fw); in ptp_ocp_devlink_flash_update()
1902 fw_image = bp->fw_loader ? "loader" : "fw"; in ptp_ocp_devlink_info_get()
1903 sprintf(buf, "%d.%d", bp->fw_tag, bp->fw_version); in ptp_ocp_devlink_info_get()
1908 if (!bp->has_eeprom_data) { in ptp_ocp_devlink_info_get()
1910 if (!bp->has_eeprom_data) in ptp_ocp_devlink_info_get()
1914 sprintf(buf, "%pM", bp->serial); in ptp_ocp_devlink_info_get()
1921 bp->board_id); in ptp_ocp_devlink_info_get()
1938 return devm_ioremap_resource(&bp->pdev->dev, &res); in __ptp_ocp_get_mem()
1946 start = pci_resource_start(bp->pdev, 0) + r->offset; in ptp_ocp_get_mem()
1947 return __ptp_ocp_get_mem(bp, start, r->size); in ptp_ocp_get_mem()
1954 struct pci_dev *pdev = bp->pdev; in ptp_ocp_register_spi()
1960 start = pci_resource_start(pdev, 0) + r->offset; in ptp_ocp_register_spi()
1961 res[0] = DEFINE_RES_MEM(start, r->size); in ptp_ocp_register_spi()
1962 res[1] = DEFINE_RES_IRQ(pci_irq_vector(pdev, r->irq_vec)); in ptp_ocp_register_spi()
1964 info = r->extra; in ptp_ocp_register_spi()
1966 id += info->pci_offset; in ptp_ocp_register_spi()
1968 p = platform_device_register_resndata(&pdev->dev, info->name, id, in ptp_ocp_register_spi()
1969 res, ARRAY_SIZE(res), info->data, in ptp_ocp_register_spi()
1970 info->data_size); in ptp_ocp_register_spi()
1986 info = r->extra; in ptp_ocp_i2c_bus()
1987 start = pci_resource_start(pdev, 0) + r->offset; in ptp_ocp_i2c_bus()
1988 res[0] = DEFINE_RES_MEM(start, r->size); in ptp_ocp_i2c_bus()
1989 res[1] = DEFINE_RES_IRQ(pci_irq_vector(pdev, r->irq_vec)); in ptp_ocp_i2c_bus()
1991 return platform_device_register_resndata(&pdev->dev, info->name, in ptp_ocp_i2c_bus()
1993 info->data, info->data_size); in ptp_ocp_i2c_bus()
1999 struct pci_dev *pdev = bp->pdev; in ptp_ocp_register_i2c()
2006 info = r->extra; in ptp_ocp_register_i2c()
2007 id = pci_dev_id(bp->pdev); in ptp_ocp_register_i2c()
2010 clk = clk_hw_register_fixed_rate(&pdev->dev, buf, NULL, 0, in ptp_ocp_register_i2c()
2011 info->fixed_rate); in ptp_ocp_register_i2c()
2014 bp->i2c_clk = clk; in ptp_ocp_register_i2c()
2016 sprintf(buf, "%s.%d", info->name, id); in ptp_ocp_register_i2c()
2017 devm_clk_hw_register_clkdev(&pdev->dev, clk, NULL, buf); in ptp_ocp_register_i2c()
2018 p = ptp_ocp_i2c_bus(bp->pdev, r, id); in ptp_ocp_register_i2c()
2032 struct signal_reg __iomem *reg = ext->mem; in ptp_ocp_signal_irq()
2033 struct ptp_ocp *bp = ext->bp; in ptp_ocp_signal_irq()
2037 gen = ext->info->index - 1; in ptp_ocp_signal_irq()
2039 enable = ioread32(®->enable); in ptp_ocp_signal_irq()
2040 status = ioread32(®->status); in ptp_ocp_signal_irq()
2044 iowrite32(0, ®->intr_mask); in ptp_ocp_signal_irq()
2045 iowrite32(0, ®->enable); in ptp_ocp_signal_irq()
2046 bp->signal[gen].running = false; in ptp_ocp_signal_irq()
2049 iowrite32(0, ®->intr); /* ack interrupt */ in ptp_ocp_signal_irq()
2062 if (!s->period) in ptp_ocp_signal_set()
2065 if (!s->pulse) in ptp_ocp_signal_set()
2066 s->pulse = ktime_divns(s->period * s->duty, 100); in ptp_ocp_signal_set()
2068 err = ptp_ocp_gettimex(&bp->ptp_info, &ts, &sts); in ptp_ocp_signal_set()
2073 if (!s->start) { in ptp_ocp_signal_set()
2074 /* roundup() does not work on 32-bit systems */ in ptp_ocp_signal_set()
2075 s->start = DIV64_U64_ROUND_UP(start_ns, s->period); in ptp_ocp_signal_set()
2076 s->start *= s->period; in ptp_ocp_signal_set()
2077 s->start = ktime_add(s->start, s->phase); in ptp_ocp_signal_set()
2080 if (s->duty < 1 || s->duty > 99) in ptp_ocp_signal_set()
2081 return -EINVAL; in ptp_ocp_signal_set()
2083 if (s->pulse < 1 || s->pulse > s->period) in ptp_ocp_signal_set()
2084 return -EINVAL; in ptp_ocp_signal_set()
2086 if (s->start < start_ns) in ptp_ocp_signal_set()
2087 return -EINVAL; in ptp_ocp_signal_set()
2089 bp->signal[gen] = *s; in ptp_ocp_signal_set()
2100 s.polarity = bp->signal[gen].polarity; in ptp_ocp_signal_from_perout()
2101 s.period = ktime_set(req->period.sec, req->period.nsec); in ptp_ocp_signal_from_perout()
2105 if (req->flags & PTP_PEROUT_DUTY_CYCLE) { in ptp_ocp_signal_from_perout()
2106 s.pulse = ktime_set(req->on.sec, req->on.nsec); in ptp_ocp_signal_from_perout()
2110 if (req->flags & PTP_PEROUT_PHASE) in ptp_ocp_signal_from_perout()
2111 s.phase = ktime_set(req->phase.sec, req->phase.nsec); in ptp_ocp_signal_from_perout()
2113 s.start = ktime_set(req->start.sec, req->start.nsec); in ptp_ocp_signal_from_perout()
2122 struct signal_reg __iomem *reg = ext->mem; in ptp_ocp_signal_enable()
2123 struct ptp_ocp *bp = ext->bp; in ptp_ocp_signal_enable()
2127 gen = ext->info->index - 1; in ptp_ocp_signal_enable()
2129 iowrite32(0, ®->intr_mask); in ptp_ocp_signal_enable()
2130 iowrite32(0, ®->enable); in ptp_ocp_signal_enable()
2131 bp->signal[gen].running = false; in ptp_ocp_signal_enable()
2135 ts = ktime_to_timespec64(bp->signal[gen].start); in ptp_ocp_signal_enable()
2136 iowrite32(ts.tv_sec, ®->start_sec); in ptp_ocp_signal_enable()
2137 iowrite32(ts.tv_nsec, ®->start_ns); in ptp_ocp_signal_enable()
2139 ts = ktime_to_timespec64(bp->signal[gen].period); in ptp_ocp_signal_enable()
2140 iowrite32(ts.tv_sec, ®->period_sec); in ptp_ocp_signal_enable()
2141 iowrite32(ts.tv_nsec, ®->period_ns); in ptp_ocp_signal_enable()
2143 ts = ktime_to_timespec64(bp->signal[gen].pulse); in ptp_ocp_signal_enable()
2144 iowrite32(ts.tv_sec, ®->pulse_sec); in ptp_ocp_signal_enable()
2145 iowrite32(ts.tv_nsec, ®->pulse_ns); in ptp_ocp_signal_enable()
2147 iowrite32(bp->signal[gen].polarity, ®->polarity); in ptp_ocp_signal_enable()
2148 iowrite32(0, ®->repeat_count); in ptp_ocp_signal_enable()
2150 iowrite32(0, ®->intr); /* clear interrupt state */ in ptp_ocp_signal_enable()
2151 iowrite32(1, ®->intr_mask); /* enable interrupt */ in ptp_ocp_signal_enable()
2152 iowrite32(3, ®->enable); /* valid & enable */ in ptp_ocp_signal_enable()
2154 bp->signal[gen].running = true; in ptp_ocp_signal_enable()
2163 struct ts_reg __iomem *reg = ext->mem; in ptp_ocp_ts_irq()
2167 if (ext == ext->bp->pps) { in ptp_ocp_ts_irq()
2168 if (ext->bp->pps_req_map & OCP_REQ_PPS) { in ptp_ocp_ts_irq()
2170 ptp_clock_event(ext->bp->ptp, &ev); in ptp_ocp_ts_irq()
2173 if ((ext->bp->pps_req_map & ~OCP_REQ_PPS) == 0) in ptp_ocp_ts_irq()
2177 /* XXX should fix API - this converts s/ns -> ts -> s/ns */ in ptp_ocp_ts_irq()
2178 sec = ioread32(®->time_sec); in ptp_ocp_ts_irq()
2179 nsec = ioread32(®->time_ns); in ptp_ocp_ts_irq()
2182 ev.index = ext->info->index; in ptp_ocp_ts_irq()
2185 ptp_clock_event(ext->bp->ptp, &ev); in ptp_ocp_ts_irq()
2188 iowrite32(1, ®->intr); /* write 1 to ack */ in ptp_ocp_ts_irq()
2197 struct ts_reg __iomem *reg = ext->mem; in ptp_ocp_ts_enable()
2198 struct ptp_ocp *bp = ext->bp; in ptp_ocp_ts_enable()
2200 if (ext == bp->pps) { in ptp_ocp_ts_enable()
2201 u32 old_map = bp->pps_req_map; in ptp_ocp_ts_enable()
2204 bp->pps_req_map |= req; in ptp_ocp_ts_enable()
2206 bp->pps_req_map &= ~req; in ptp_ocp_ts_enable()
2209 if ((!!old_map ^ !!bp->pps_req_map) == 0) in ptp_ocp_ts_enable()
2214 iowrite32(1, ®->enable); in ptp_ocp_ts_enable()
2215 iowrite32(1, ®->intr_mask); in ptp_ocp_ts_enable()
2216 iowrite32(1, ®->intr); in ptp_ocp_ts_enable()
2218 iowrite32(0, ®->intr_mask); in ptp_ocp_ts_enable()
2219 iowrite32(0, ®->enable); in ptp_ocp_ts_enable()
2228 ext->info->enable(ext, ~0, false); in ptp_ocp_unregister_ext()
2229 pci_free_irq(ext->bp->pdev, ext->irq_vec, ext); in ptp_ocp_unregister_ext()
2236 struct pci_dev *pdev = bp->pdev; in ptp_ocp_register_ext()
2242 return -ENOMEM; in ptp_ocp_register_ext()
2244 ext->mem = ptp_ocp_get_mem(bp, r); in ptp_ocp_register_ext()
2245 if (IS_ERR(ext->mem)) { in ptp_ocp_register_ext()
2246 err = PTR_ERR(ext->mem); in ptp_ocp_register_ext()
2250 ext->bp = bp; in ptp_ocp_register_ext()
2251 ext->info = r->extra; in ptp_ocp_register_ext()
2252 ext->irq_vec = r->irq_vec; in ptp_ocp_register_ext()
2254 err = pci_request_irq(pdev, r->irq_vec, ext->info->irq_fcn, NULL, in ptp_ocp_register_ext()
2255 ext, "ocp%d.%s", bp->id, r->name); in ptp_ocp_register_ext()
2257 dev_err(&pdev->dev, "Could not get irq %d\n", r->irq_vec); in ptp_ocp_register_ext()
2273 struct pci_dev *pdev = bp->pdev; in ptp_ocp_serial_line()
2280 uart.port.dev = &pdev->dev; in ptp_ocp_serial_line()
2283 uart.port.mapbase = pci_resource_start(pdev, 0) + r->offset; in ptp_ocp_serial_line()
2284 uart.port.irq = pci_irq_vector(pdev, r->irq_vec); in ptp_ocp_serial_line()
2295 struct ptp_ocp_serial_port *p = (struct ptp_ocp_serial_port *)r->extra; in ptp_ocp_register_serial()
2303 port.baud = p->baud; in ptp_ocp_register_serial()
2327 if (!bp->nmea_out) in ptp_ocp_nmea_out_init()
2330 iowrite32(0, &bp->nmea_out->ctrl); /* disable */ in ptp_ocp_nmea_out_init()
2331 iowrite32(7, &bp->nmea_out->uart_baud); /* 115200 */ in ptp_ocp_nmea_out_init()
2332 iowrite32(1, &bp->nmea_out->ctrl); /* enable */ in ptp_ocp_nmea_out_init()
2340 iowrite32(0, ®->enable); /* disable */ in _ptp_ocp_signal_init()
2342 val = ioread32(®->polarity); in _ptp_ocp_signal_init()
2343 s->polarity = val ? true : false; in _ptp_ocp_signal_init()
2344 s->duty = 50; in _ptp_ocp_signal_init()
2353 if (bp->signal_out[i]) in ptp_ocp_signal_init()
2354 _ptp_ocp_signal_init(&bp->signal[i], in ptp_ocp_signal_init()
2355 bp->signal_out[i]->mem); in ptp_ocp_signal_init()
2361 sysfs_remove_groups(&bp->dev.kobj, bp->attr_group); in ptp_ocp_attr_group_del()
2362 kfree(bp->attr_group); in ptp_ocp_attr_group_del()
2374 if (attr_tbl[i].cap & bp->fw_cap) in ptp_ocp_attr_group_add()
2377 bp->attr_group = kcalloc(count + 1, sizeof(*bp->attr_group), in ptp_ocp_attr_group_add()
2379 if (!bp->attr_group) in ptp_ocp_attr_group_add()
2380 return -ENOMEM; in ptp_ocp_attr_group_add()
2384 if (attr_tbl[i].cap & bp->fw_cap) in ptp_ocp_attr_group_add()
2385 bp->attr_group[count++] = attr_tbl[i].group; in ptp_ocp_attr_group_add()
2387 err = sysfs_create_groups(&bp->dev.kobj, bp->attr_group); in ptp_ocp_attr_group_add()
2389 bp->attr_group[0] = NULL; in ptp_ocp_attr_group_add()
2412 return ptp_ocp_enable_fpga(&bp->irig_out->ctrl, in ptp_ocp_irig_out()
2419 return ptp_ocp_enable_fpga(&bp->irig_in->ctrl, in ptp_ocp_irig_in()
2426 return ptp_ocp_enable_fpga(&bp->dcf_out->ctrl, in ptp_ocp_dcf_out()
2433 return ptp_ocp_enable_fpga(&bp->dcf_in->ctrl, in ptp_ocp_dcf_in()
2457 if (bp->sma[sma_nr - 1].fixed_fcn) in ptp_ocp_sma_fb_get()
2458 return (sma_nr - 1) & 1; in ptp_ocp_sma_fb_get()
2460 if (bp->sma[sma_nr - 1].mode == SMA_MODE_IN) in ptp_ocp_sma_fb_get()
2461 gpio = sma_nr > 2 ? &bp->sma_map2->gpio1 : &bp->sma_map1->gpio1; in ptp_ocp_sma_fb_get()
2463 gpio = sma_nr > 2 ? &bp->sma_map1->gpio2 : &bp->sma_map2->gpio2; in ptp_ocp_sma_fb_get()
2476 gpio = sma_nr > 2 ? &bp->sma_map1->gpio2 : &bp->sma_map2->gpio2; in ptp_ocp_sma_fb_set_output()
2479 mask = 0xffff << (16 - shift); in ptp_ocp_sma_fb_set_output()
2481 spin_lock_irqsave(&bp->lock, flags); in ptp_ocp_sma_fb_set_output()
2490 spin_unlock_irqrestore(&bp->lock, flags); in ptp_ocp_sma_fb_set_output()
2502 gpio = sma_nr > 2 ? &bp->sma_map2->gpio1 : &bp->sma_map1->gpio1; in ptp_ocp_sma_fb_set_inputs()
2505 mask = 0xffff << (16 - shift); in ptp_ocp_sma_fb_set_inputs()
2507 spin_lock_irqsave(&bp->lock, flags); in ptp_ocp_sma_fb_set_inputs()
2516 spin_unlock_irqrestore(&bp->lock, flags); in ptp_ocp_sma_fb_set_inputs()
2537 bp->sma[i].default_fcn = i & 1; in ptp_ocp_sma_fb_init()
2538 bp->sma[i].dpll_prop = prop; in ptp_ocp_sma_fb_init()
2539 bp->sma[i].dpll_prop.board_label = in ptp_ocp_sma_fb_init()
2540 bp->ptp_info.pin_config[i].name; in ptp_ocp_sma_fb_init()
2542 bp->sma[0].mode = SMA_MODE_IN; in ptp_ocp_sma_fb_init()
2543 bp->sma[1].mode = SMA_MODE_IN; in ptp_ocp_sma_fb_init()
2544 bp->sma[2].mode = SMA_MODE_OUT; in ptp_ocp_sma_fb_init()
2545 bp->sma[3].mode = SMA_MODE_OUT; in ptp_ocp_sma_fb_init()
2547 if (!bp->sma_map1) { in ptp_ocp_sma_fb_init()
2549 bp->sma[i].fixed_fcn = true; in ptp_ocp_sma_fb_init()
2550 bp->sma[i].fixed_dir = true; in ptp_ocp_sma_fb_init()
2551 bp->sma[1].dpll_prop.capabilities &= in ptp_ocp_sma_fb_init()
2560 reg = ioread32(&bp->sma_map2->gpio2); in ptp_ocp_sma_fb_init()
2563 bp->sma[i].fixed_dir = true; in ptp_ocp_sma_fb_init()
2565 reg = ioread32(&bp->sma_map1->gpio1); in ptp_ocp_sma_fb_init()
2566 bp->sma[0].mode = reg & BIT(15) ? SMA_MODE_IN : SMA_MODE_OUT; in ptp_ocp_sma_fb_init()
2567 bp->sma[1].mode = reg & BIT(31) ? SMA_MODE_IN : SMA_MODE_OUT; in ptp_ocp_sma_fb_init()
2569 reg = ioread32(&bp->sma_map1->gpio2); in ptp_ocp_sma_fb_init()
2570 bp->sma[2].mode = reg & BIT(15) ? SMA_MODE_OUT : SMA_MODE_IN; in ptp_ocp_sma_fb_init()
2571 bp->sma[3].mode = reg & BIT(31) ? SMA_MODE_OUT : SMA_MODE_IN; in ptp_ocp_sma_fb_init()
2590 gpio = sma_nr > 2 ? &bp->sma_map1->gpio2 : &bp->sma_map2->gpio2; in ptp_ocp_sma_adva_set_output()
2593 mask = 0xffff << (16 - shift); in ptp_ocp_sma_adva_set_output()
2595 spin_lock_irqsave(&bp->lock, flags); in ptp_ocp_sma_adva_set_output()
2602 spin_unlock_irqrestore(&bp->lock, flags); in ptp_ocp_sma_adva_set_output()
2614 gpio = sma_nr > 2 ? &bp->sma_map2->gpio1 : &bp->sma_map1->gpio1; in ptp_ocp_sma_adva_set_inputs()
2617 mask = 0xffff << (16 - shift); in ptp_ocp_sma_adva_set_inputs()
2619 spin_lock_irqsave(&bp->lock, flags); in ptp_ocp_sma_adva_set_inputs()
2626 spin_unlock_irqrestore(&bp->lock, flags); in ptp_ocp_sma_adva_set_inputs()
2647 return -ENOMEM; in ptp_ocp_set_pins()
2654 bp->ptp_info.n_pins = 4; in ptp_ocp_set_pins()
2655 bp->ptp_info.pin_config = config; in ptp_ocp_set_pins()
2666 version = ioread32(&bp->image->version); in ptp_ocp_fb_set_version()
2671 bp->fw_loader = true; in ptp_ocp_fb_set_version()
2674 bp->fw_tag = version >> 15; in ptp_ocp_fb_set_version()
2675 bp->fw_version = version & 0x7fff; in ptp_ocp_fb_set_version()
2677 if (bp->fw_tag) { in ptp_ocp_fb_set_version()
2689 bp->fw_cap = cap; in ptp_ocp_fb_set_version()
2698 bp->flash_start = 1024 * 4096; in ptp_ocp_fb_board_init()
2699 bp->eeprom_map = fb_eeprom_map; in ptp_ocp_fb_board_init()
2700 bp->fw_version = ioread32(&bp->image->version); in ptp_ocp_fb_board_init()
2701 bp->sma_op = &ocp_fb_sma_op; in ptp_ocp_fb_board_init()
2702 bp->signals_nr = 4; in ptp_ocp_fb_board_init()
2703 bp->freq_in_nr = 4; in ptp_ocp_fb_board_init()
2720 return ptp_ocp_init_clock(bp, r->extra); in ptp_ocp_fb_board_init()
2726 bool allow = !r->irq_vec || r->irq_vec < bp->n_irqs; in ptp_ocp_allow_irq()
2729 dev_err(&bp->pdev->dev, "irq %d out of range, skipping %s\n", in ptp_ocp_allow_irq()
2730 r->irq_vec, r->name); in ptp_ocp_allow_irq()
2741 for (r = table; r->setup; r++) { in ptp_ocp_register_resources()
2744 err = r->setup(bp, r); in ptp_ocp_register_resources()
2746 dev_err(&bp->pdev->dev, in ptp_ocp_register_resources()
2748 r->name, err); in ptp_ocp_register_resources()
2770 bp->sma[0].mode = SMA_MODE_IN; in ptp_ocp_art_sma_init()
2771 bp->sma[1].mode = SMA_MODE_IN; in ptp_ocp_art_sma_init()
2772 bp->sma[2].mode = SMA_MODE_OUT; in ptp_ocp_art_sma_init()
2773 bp->sma[3].mode = SMA_MODE_OUT; in ptp_ocp_art_sma_init()
2775 bp->sma[0].default_fcn = 0x08; /* IN: 10Mhz */ in ptp_ocp_art_sma_init()
2776 bp->sma[1].default_fcn = 0x01; /* IN: PPS1 */ in ptp_ocp_art_sma_init()
2777 bp->sma[2].default_fcn = 0x10; /* OUT: 10Mhz */ in ptp_ocp_art_sma_init()
2778 bp->sma[3].default_fcn = 0x02; /* OUT: PHC */ in ptp_ocp_art_sma_init()
2782 bp->sma[i].dpll_prop = prop; in ptp_ocp_art_sma_init()
2783 bp->sma[i].dpll_prop.board_label = in ptp_ocp_art_sma_init()
2784 bp->ptp_info.pin_config[i].name; in ptp_ocp_art_sma_init()
2785 if (!bp->art_sma) { in ptp_ocp_art_sma_init()
2786 bp->sma[i].fixed_fcn = true; in ptp_ocp_art_sma_init()
2787 bp->sma[i].fixed_dir = true; in ptp_ocp_art_sma_init()
2790 reg = ioread32(&bp->art_sma->map[i].gpio); in ptp_ocp_art_sma_init()
2794 bp->sma[i].fixed_fcn = true; in ptp_ocp_art_sma_init()
2795 bp->sma[i].fixed_dir = true; in ptp_ocp_art_sma_init()
2799 bp->sma[i].mode = SMA_MODE_IN; in ptp_ocp_art_sma_init()
2800 bp->sma[i].dpll_prop.capabilities = in ptp_ocp_art_sma_init()
2804 bp->sma[i].mode = SMA_MODE_OUT; in ptp_ocp_art_sma_init()
2805 bp->sma[i].dpll_prop.capabilities = in ptp_ocp_art_sma_init()
2815 if (bp->sma[sma_nr - 1].fixed_fcn) in ptp_ocp_art_sma_get()
2816 return bp->sma[sma_nr - 1].default_fcn; in ptp_ocp_art_sma_get()
2818 return ioread32(&bp->art_sma->map[sma_nr - 1].gpio) & 0xff; in ptp_ocp_art_sma_get()
2832 return -EINVAL; in ptp_ocp_art_sma_set()
2834 gpio = &bp->art_sma->map[sma_nr - 1].gpio; in ptp_ocp_art_sma_set()
2836 spin_lock_irqsave(&bp->lock, flags); in ptp_ocp_art_sma_set()
2839 err = -EOPNOTSUPP; in ptp_ocp_art_sma_set()
2844 spin_unlock_irqrestore(&bp->lock, flags); in ptp_ocp_art_sma_set()
2863 bp->flash_start = 0x1000000; in ptp_ocp_art_board_init()
2864 bp->eeprom_map = art_eeprom_map; in ptp_ocp_art_board_init()
2865 bp->fw_cap = OCP_CAP_BASIC; in ptp_ocp_art_board_init()
2866 bp->fw_version = ioread32(&bp->reg->version); in ptp_ocp_art_board_init()
2867 bp->fw_tag = 2; in ptp_ocp_art_board_init()
2868 bp->sma_op = &ocp_art_sma_op; in ptp_ocp_art_board_init()
2869 bp->signals_nr = 4; in ptp_ocp_art_board_init()
2870 bp->freq_in_nr = 4; in ptp_ocp_art_board_init()
2873 iowrite32(1, &bp->board_config->mro50_serial_activate); in ptp_ocp_art_board_init()
2884 return ptp_ocp_init_clock(bp, r->extra); in ptp_ocp_art_board_init()
2894 bp->flash_start = 0xA00000; in ptp_ocp_adva_board_init()
2895 bp->eeprom_map = fb_eeprom_map; in ptp_ocp_adva_board_init()
2896 bp->sma_op = &ocp_adva_sma_op; in ptp_ocp_adva_board_init()
2897 bp->signals_nr = 2; in ptp_ocp_adva_board_init()
2898 bp->freq_in_nr = 2; in ptp_ocp_adva_board_init()
2900 version = ioread32(&bp->image->version); in ptp_ocp_adva_board_init()
2904 bp->fw_loader = true; in ptp_ocp_adva_board_init()
2906 bp->fw_tag = 3; in ptp_ocp_adva_board_init()
2907 bp->fw_version = version & 0xffff; in ptp_ocp_adva_board_init()
2908 bp->fw_cap = OCP_CAP_BASIC | OCP_CAP_SIGNAL | OCP_CAP_FREQ; in ptp_ocp_adva_board_init()
2923 return ptp_ocp_init_clock(bp, r->extra); in ptp_ocp_adva_board_init()
2961 count--; in ptp_ocp_show_inputs()
2976 return -ENOMEM; in sma_parse_inputs()
2978 ret = -EINVAL; in sma_parse_inputs()
2998 ret = -EINVAL; in sma_parse_inputs()
3009 struct ptp_ocp_sma_connector *sma = &bp->sma[sma_nr - 1]; in ptp_ocp_sma_show()
3013 tbl = bp->sma_op->tbl; in ptp_ocp_sma_show()
3016 if (sma->mode == SMA_MODE_IN) { in ptp_ocp_sma_show()
3017 if (sma->disabled) in ptp_ocp_sma_show()
3038 return ptp_ocp_sma_show(bp, 2, buf, -1, 1); in sma2_show()
3046 return ptp_ocp_sma_show(bp, 3, buf, -1, 0); in sma3_show()
3054 return ptp_ocp_sma_show(bp, 4, buf, -1, 1); in sma4_show()
3060 struct ptp_ocp_sma_connector *sma = &bp->sma[sma_nr - 1]; in ptp_ocp_sma_store_val()
3062 if (sma->fixed_dir && (mode != sma->mode || val & SMA_DISABLE)) in ptp_ocp_sma_store_val()
3063 return -EOPNOTSUPP; in ptp_ocp_sma_store_val()
3065 if (sma->fixed_fcn) { in ptp_ocp_sma_store_val()
3066 if (val != sma->default_fcn) in ptp_ocp_sma_store_val()
3067 return -EOPNOTSUPP; in ptp_ocp_sma_store_val()
3071 sma->disabled = !!(val & SMA_DISABLE); in ptp_ocp_sma_store_val()
3073 if (mode != sma->mode) { in ptp_ocp_sma_store_val()
3078 sma->mode = mode; in ptp_ocp_sma_store_val()
3081 if (!sma->fixed_dir) in ptp_ocp_sma_store_val()
3084 if (sma->disabled) in ptp_ocp_sma_store_val()
3098 struct ptp_ocp_sma_connector *sma = &bp->sma[sma_nr - 1]; in ptp_ocp_sma_store()
3102 mode = sma->mode; in ptp_ocp_sma_store()
3103 val = sma_parse_inputs(bp->sma_op->tbl, buf, &mode); in ptp_ocp_sma_store()
3163 return ptp_ocp_select_table_show(bp->sma_op->tbl[0], buf); in available_sma_inputs_show()
3173 return ptp_ocp_select_table_show(bp->sma_op->tbl[1], buf); in available_sma_outputs_show()
3193 int gen = (uintptr_t)ea->var; in signal_store()
3199 return -ENOMEM; in signal_store()
3201 err = -EINVAL; in signal_store()
3202 s.duty = bp->signal[gen].duty; in signal_store()
3203 s.phase = bp->signal[gen].phase; in signal_store()
3204 s.period = bp->signal[gen].period; in signal_store()
3205 s.polarity = bp->signal[gen].polarity; in signal_store()
3209 argc--; in signal_store()
3215 argc--; in signal_store()
3221 argc--; in signal_store()
3227 argc--; in signal_store()
3240 err = ptp_ocp_signal_enable(bp->signal_out[gen], gen, s.period != 0); in signal_store()
3257 i = (uintptr_t)ea->var; in signal_show()
3258 signal = &bp->signal[i]; in signal_show()
3260 count = sysfs_emit(buf, "%llu %d %llu %d", signal->period, in signal_show()
3261 signal->duty, signal->phase, signal->polarity); in signal_show()
3263 ts = ktime_to_timespec64(signal->start); in signal_show()
3278 int i = (uintptr_t)ea->var; in duty_show()
3280 return sysfs_emit(buf, "%d\n", bp->signal[i].duty); in duty_show()
3292 int i = (uintptr_t)ea->var; in period_show()
3294 return sysfs_emit(buf, "%llu\n", bp->signal[i].period); in period_show()
3306 int i = (uintptr_t)ea->var; in phase_show()
3308 return sysfs_emit(buf, "%llu\n", bp->signal[i].phase); in phase_show()
3321 int i = (uintptr_t)ea->var; in polarity_show()
3323 return sysfs_emit(buf, "%d\n", bp->signal[i].polarity); in polarity_show()
3335 int i = (uintptr_t)ea->var; in running_show()
3337 return sysfs_emit(buf, "%d\n", bp->signal[i].running); in running_show()
3349 int i = (uintptr_t)ea->var; in start_show()
3352 ts = ktime_to_timespec64(bp->signal[i].start); in start_show()
3366 int idx = (uintptr_t)ea->var; in seconds_store()
3374 return -EINVAL; in seconds_store()
3379 iowrite32(val, &bp->freq_in[idx]->ctrl); in seconds_store()
3389 int idx = (uintptr_t)ea->var; in seconds_show()
3392 val = ioread32(&bp->freq_in[idx]->ctrl); in seconds_show()
3410 int idx = (uintptr_t)ea->var; in frequency_show()
3413 val = ioread32(&bp->freq_in[idx]->status); in frequency_show()
3433 return sysfs_emit(buf, "ttyS%d", bp->port[(uintptr_t)ea->var].line); in ptp_ocp_tty_show()
3444 if (strncmp(attr->name, "tty", 3)) in ptp_ocp_timecard_tty_is_visible()
3445 return attr->mode; in ptp_ocp_timecard_tty_is_visible()
3449 port = &bp->port[(uintptr_t)ea->var]; in ptp_ocp_timecard_tty_is_visible()
3450 return port->line == -1 ? 0 : 0444; in ptp_ocp_timecard_tty_is_visible()
3457 static EXT_TTY_ATTR_RO(GNSS, PORT_GNSS);
3480 if (!bp->has_eeprom_data) in serialnum_show()
3483 return sysfs_emit(buf, "%pM\n", bp->serial); in serialnum_show()
3493 if (bp->gnss_lost) in gnss_sync_show()
3494 ret = sysfs_emit(buf, "LOST @ %ptT\n", &bp->gnss_lost); in gnss_sync_show()
3508 return sysfs_emit(buf, "%d\n", bp->utc_tai_offset); in utc_tai_offset_show()
3536 return sysfs_emit(buf, "%d\n", bp->ts_window_adjust); in ts_window_adjust_show()
3552 bp->ts_window_adjust = val; in ts_window_adjust_store()
3564 val = ioread32(&bp->irig_out->ctrl); in irig_b_mode_show()
3584 return -EINVAL; in irig_b_mode_store()
3588 spin_lock_irqsave(&bp->lock, flags); in irig_b_mode_store()
3589 iowrite32(0, &bp->irig_out->ctrl); /* disable */ in irig_b_mode_store()
3590 iowrite32(reg, &bp->irig_out->ctrl); /* change mode */ in irig_b_mode_store()
3591 iowrite32(reg | IRIG_M_CTRL_ENABLE, &bp->irig_out->ctrl); in irig_b_mode_store()
3592 spin_unlock_irqrestore(&bp->lock, flags); in irig_b_mode_store()
3605 select = ioread32(&bp->reg->select); in clock_source_show()
3623 spin_lock_irqsave(&bp->lock, flags); in clock_source_store()
3624 iowrite32(val, &bp->reg->select); in clock_source_store()
3625 spin_unlock_irqrestore(&bp->lock, flags); in clock_source_store()
3647 val = ioread32(&bp->reg->status_drift); in clock_status_drift_show()
3648 res = (val & ~INT_MAX) ? -1 : 1; in clock_status_drift_show()
3662 val = ioread32(&bp->reg->status_offset); in clock_status_offset_show()
3663 res = (val & ~INT_MAX) ? -1 : 1; in clock_status_offset_show()
3677 val = ioread32(&bp->tod->adj_sec); in tod_correction_show()
3678 res = (val & ~INT_MAX) ? -1 : 1; in tod_correction_show()
3696 res *= -1; in tod_correction_store()
3701 spin_lock_irqsave(&bp->lock, flags); in tod_correction_store()
3702 iowrite32(val, &bp->tod->adj_sec); in tod_correction_store()
3703 spin_unlock_irqrestore(&bp->lock, flags); in tod_correction_store()
3774 count = size - off; in disciplining_config_read()
3779 err = -EFAULT; in disciplining_config_read()
3800 return -EFAULT; in disciplining_config_write()
3808 err = -EFAULT; in disciplining_config_write()
3836 count = size - off; in temperature_table_read()
3841 err = -EFAULT; in temperature_table_read()
3862 return -EFAULT; in temperature_table_write()
3870 err = -EFAULT; in temperature_table_write()
3987 if (bp->sma[i].mode != SMA_MODE_IN) in gpio_input_map()
3995 def = "----"; in gpio_input_map()
4005 strcpy(ans, "----"); in gpio_output_map()
4007 if (bp->sma[i].mode != SMA_MODE_OUT) in gpio_output_map()
4017 struct signal_reg __iomem *reg = bp->signal_out[nr]->mem; in _signal_summary_show()
4018 struct ptp_ocp_signal *signal = &bp->signal[nr]; in _signal_summary_show()
4023 on = signal->running; in _signal_summary_show()
4027 signal->period, signal->duty, signal->phase, in _signal_summary_show()
4028 signal->polarity); in _signal_summary_show()
4030 val = ioread32(®->enable); in _signal_summary_show()
4032 val = ioread32(®->status); in _signal_summary_show()
4035 seq_printf(s, " start:%llu\n", signal->start); in _signal_summary_show()
4050 val = ioread32(®->ctrl); in _frequency_summary_show()
4058 val = ioread32(®->status); in _frequency_summary_show()
4071 struct device *dev = s->private; in ptp_ocp_summary_show()
4084 return -ENOMEM; in ptp_ocp_summary_show()
4088 seq_printf(s, "%7s: /dev/ptp%d\n", "PTP", ptp_clock_index(bp->ptp)); in ptp_ocp_summary_show()
4090 if (bp->port[i].line != -1) in ptp_ocp_summary_show()
4092 bp->port[i].line); in ptp_ocp_summary_show()
4096 if (bp->sma_map1) { in ptp_ocp_summary_show()
4099 reg = ioread32(&bp->sma_map1->gpio1); in ptp_ocp_summary_show()
4103 reg = ioread32(&bp->sma_map1->gpio2); in ptp_ocp_summary_show()
4107 reg = ioread32(&bp->sma_map2->gpio1); in ptp_ocp_summary_show()
4111 reg = ioread32(&bp->sma_map2->gpio2); in ptp_ocp_summary_show()
4132 if (bp->ts0) { in ptp_ocp_summary_show()
4133 ts_reg = bp->ts0->mem; in ptp_ocp_summary_show()
4134 on = ioread32(&ts_reg->enable); in ptp_ocp_summary_show()
4140 if (bp->ts1) { in ptp_ocp_summary_show()
4141 ts_reg = bp->ts1->mem; in ptp_ocp_summary_show()
4142 on = ioread32(&ts_reg->enable); in ptp_ocp_summary_show()
4148 if (bp->ts2) { in ptp_ocp_summary_show()
4149 ts_reg = bp->ts2->mem; in ptp_ocp_summary_show()
4150 on = ioread32(&ts_reg->enable); in ptp_ocp_summary_show()
4156 if (bp->ts3) { in ptp_ocp_summary_show()
4157 ts_reg = bp->ts3->mem; in ptp_ocp_summary_show()
4158 on = ioread32(&ts_reg->enable); in ptp_ocp_summary_show()
4164 if (bp->ts4) { in ptp_ocp_summary_show()
4165 ts_reg = bp->ts4->mem; in ptp_ocp_summary_show()
4166 on = ioread32(&ts_reg->enable); in ptp_ocp_summary_show()
4172 if (bp->pps) { in ptp_ocp_summary_show()
4173 ts_reg = bp->pps->mem; in ptp_ocp_summary_show()
4175 on = ioread32(&ts_reg->enable); in ptp_ocp_summary_show()
4176 map = !!(bp->pps_req_map & OCP_REQ_TIMESTAMP); in ptp_ocp_summary_show()
4180 map = !!(bp->pps_req_map & OCP_REQ_PPS); in ptp_ocp_summary_show()
4185 if (bp->fw_cap & OCP_CAP_SIGNAL) in ptp_ocp_summary_show()
4186 for (i = 0; i < bp->signals_nr; i++) in ptp_ocp_summary_show()
4189 if (bp->fw_cap & OCP_CAP_FREQ) in ptp_ocp_summary_show()
4190 for (i = 0; i < bp->freq_in_nr; i++) in ptp_ocp_summary_show()
4191 _frequency_summary_show(s, i, bp->freq_in[i]); in ptp_ocp_summary_show()
4193 if (bp->irig_out) { in ptp_ocp_summary_show()
4194 ctrl = ioread32(&bp->irig_out->ctrl); in ptp_ocp_summary_show()
4196 val = ioread32(&bp->irig_out->status); in ptp_ocp_summary_show()
4202 if (bp->irig_in) { in ptp_ocp_summary_show()
4203 on = ioread32(&bp->irig_in->ctrl) & IRIG_S_CTRL_ENABLE; in ptp_ocp_summary_show()
4204 val = ioread32(&bp->irig_in->status); in ptp_ocp_summary_show()
4210 if (bp->dcf_out) { in ptp_ocp_summary_show()
4211 on = ioread32(&bp->dcf_out->ctrl) & DCF_M_CTRL_ENABLE; in ptp_ocp_summary_show()
4212 val = ioread32(&bp->dcf_out->status); in ptp_ocp_summary_show()
4218 if (bp->dcf_in) { in ptp_ocp_summary_show()
4219 on = ioread32(&bp->dcf_in->ctrl) & DCF_S_CTRL_ENABLE; in ptp_ocp_summary_show()
4220 val = ioread32(&bp->dcf_in->status); in ptp_ocp_summary_show()
4226 if (bp->nmea_out) { in ptp_ocp_summary_show()
4227 on = ioread32(&bp->nmea_out->ctrl) & 1; in ptp_ocp_summary_show()
4228 val = ioread32(&bp->nmea_out->status); in ptp_ocp_summary_show()
4234 if (bp->pps_select) { in ptp_ocp_summary_show()
4235 val = ioread32(&bp->pps_select->gpio1); in ptp_ocp_summary_show()
4246 src = "----"; in ptp_ocp_summary_show()
4259 val = ioread32(&bp->reg->select); in ptp_ocp_summary_show()
4262 sprintf(buf, "----"); in ptp_ocp_summary_show()
4278 bp->sync ? "sync" : "unsynced"); in ptp_ocp_summary_show()
4280 if (!ptp_ocp_gettimex(&bp->ptp_info, &ts, &sts)) { in ptp_ocp_summary_show()
4287 ns += (s64)bp->utc_tai_offset * NSEC_PER_SEC; in ptp_ocp_summary_show()
4294 bp->utc_tai_offset); in ptp_ocp_summary_show()
4296 timespec64_to_ns(&ts) - ns, in ptp_ocp_summary_show()
4297 post_ns - pre_ns); in ptp_ocp_summary_show()
4308 struct device *dev = s->private; in ptp_ocp_tod_status_show()
4315 val = ioread32(&bp->tod->ctrl); in ptp_ocp_tod_status_show()
4327 seq_printf(s, "GNSS %s\n", ptp_ocp_tod_gnss_name(idx)); in ptp_ocp_tod_status_show()
4329 val = ioread32(&bp->tod->version); in ptp_ocp_tod_status_show()
4333 val = ioread32(&bp->tod->status); in ptp_ocp_tod_status_show()
4336 val = ioread32(&bp->tod->adj_sec); in ptp_ocp_tod_status_show()
4337 idx = (val & ~INT_MAX) ? -1 : 1; in ptp_ocp_tod_status_show()
4341 val = ioread32(&bp->tod->utc_status); in ptp_ocp_tod_status_show()
4349 val = ioread32(&bp->tod->leap); in ptp_ocp_tod_status_show()
4363 d = debugfs_create_dir(dev_name(&bp->dev), ptp_ocp_debugfs_root); in ptp_ocp_debugfs_add_device()
4364 bp->debug_root = d; in ptp_ocp_debugfs_add_device()
4365 debugfs_create_file("summary", 0444, bp->debug_root, in ptp_ocp_debugfs_add_device()
4366 &bp->dev, &ptp_ocp_summary_fops); in ptp_ocp_debugfs_add_device()
4367 if (bp->tod) in ptp_ocp_debugfs_add_device()
4368 debugfs_create_file("tod_status", 0444, bp->debug_root, in ptp_ocp_debugfs_add_device()
4369 &bp->dev, &ptp_ocp_tod_status_fops); in ptp_ocp_debugfs_add_device()
4375 debugfs_remove_recursive(bp->debug_root); in ptp_ocp_debugfs_remove_device()
4396 idr_remove(&ptp_ocp_idr, bp->id); in ptp_ocp_dev_release()
4409 dev_err(&pdev->dev, "idr_alloc failed: %d\n", err); in ptp_ocp_device_init()
4412 bp->id = err; in ptp_ocp_device_init()
4414 bp->ptp_info = ptp_ocp_clock_info; in ptp_ocp_device_init()
4415 spin_lock_init(&bp->lock); in ptp_ocp_device_init()
4418 bp->port[i].line = -1; in ptp_ocp_device_init()
4420 bp->pdev = pdev; in ptp_ocp_device_init()
4422 device_initialize(&bp->dev); in ptp_ocp_device_init()
4423 dev_set_name(&bp->dev, "ocp%d", bp->id); in ptp_ocp_device_init()
4424 bp->dev.class = &timecard_class; in ptp_ocp_device_init()
4425 bp->dev.parent = &pdev->dev; in ptp_ocp_device_init()
4426 bp->dev.release = ptp_ocp_dev_release; in ptp_ocp_device_init()
4427 dev_set_drvdata(&bp->dev, bp); in ptp_ocp_device_init()
4429 err = device_add(&bp->dev); in ptp_ocp_device_init()
4431 dev_err(&bp->dev, "device add failed: %d\n", err); in ptp_ocp_device_init()
4440 put_device(&bp->dev); in ptp_ocp_device_init()
4447 struct device *dev = &bp->dev; in ptp_ocp_symlink()
4449 if (sysfs_create_link(&dev->kobj, &child->kobj, link)) in ptp_ocp_symlink()
4458 dev = &bp->pdev->dev; in ptp_ocp_link_child()
4476 sprintf(buf, "ptp%d", ptp_clock_index(bp->ptp)); in ptp_ocp_complete()
4479 pps = pps_lookup_dev(bp->ptp); in ptp_ocp_complete()
4481 ptp_ocp_symlink(bp, &pps->dev, "pps"); in ptp_ocp_complete()
4494 version = ioread32(&bp->reg->version); in ptp_ocp_phc_info()
4495 select = ioread32(&bp->reg->select); in ptp_ocp_phc_info()
4496 dev_info(&bp->pdev->dev, "Version %d.%d.%d, clock %s, device ptp%d\n", in ptp_ocp_phc_info()
4499 ptp_clock_index(bp->ptp)); in ptp_ocp_phc_info()
4501 if (!ptp_ocp_gettimex(&bp->ptp_info, &ts, NULL)) in ptp_ocp_phc_info()
4502 dev_info(&bp->pdev->dev, "Time: %lld.%ld, %s\n", in ptp_ocp_phc_info()
4504 bp->sync ? "in-sync" : "UNSYNCED"); in ptp_ocp_phc_info()
4510 if (port != -1) in ptp_ocp_serial_info()
4511 dev_info(dev, "%5s: /dev/ttyS%-2d @ %6d\n", name, port, baud); in ptp_ocp_serial_info()
4522 struct device *dev = &bp->pdev->dev; in ptp_ocp_info()
4529 if (i == PORT_NMEA && bp->nmea_out && bp->port[PORT_NMEA].line != -1) { in ptp_ocp_info()
4530 bp->port[PORT_NMEA].baud = -1; in ptp_ocp_info()
4532 reg = ioread32(&bp->nmea_out->uart_baud); in ptp_ocp_info()
4534 bp->port[PORT_NMEA].baud = nmea_baud[reg]; in ptp_ocp_info()
4536 ptp_ocp_serial_info(dev, ptp_ocp_tty_port_name(i), bp->port[i].line, in ptp_ocp_info()
4537 bp->port[i].baud); in ptp_ocp_info()
4544 struct device *dev = &bp->dev; in ptp_ocp_detach_sysfs()
4546 sysfs_remove_link(&dev->kobj, "ptp"); in ptp_ocp_detach_sysfs()
4547 sysfs_remove_link(&dev->kobj, "pps"); in ptp_ocp_detach_sysfs()
4558 timer_delete_sync(&bp->watchdog); in ptp_ocp_detach()
4559 if (bp->ts0) in ptp_ocp_detach()
4560 ptp_ocp_unregister_ext(bp->ts0); in ptp_ocp_detach()
4561 if (bp->ts1) in ptp_ocp_detach()
4562 ptp_ocp_unregister_ext(bp->ts1); in ptp_ocp_detach()
4563 if (bp->ts2) in ptp_ocp_detach()
4564 ptp_ocp_unregister_ext(bp->ts2); in ptp_ocp_detach()
4565 if (bp->ts3) in ptp_ocp_detach()
4566 ptp_ocp_unregister_ext(bp->ts3); in ptp_ocp_detach()
4567 if (bp->ts4) in ptp_ocp_detach()
4568 ptp_ocp_unregister_ext(bp->ts4); in ptp_ocp_detach()
4569 if (bp->pps) in ptp_ocp_detach()
4570 ptp_ocp_unregister_ext(bp->pps); in ptp_ocp_detach()
4572 if (bp->signal_out[i]) in ptp_ocp_detach()
4573 ptp_ocp_unregister_ext(bp->signal_out[i]); in ptp_ocp_detach()
4575 if (bp->port[i].line != -1) in ptp_ocp_detach()
4576 serial8250_unregister_port(bp->port[i].line); in ptp_ocp_detach()
4577 platform_device_unregister(bp->spi_flash); in ptp_ocp_detach()
4578 platform_device_unregister(bp->i2c_ctrl); in ptp_ocp_detach()
4579 if (bp->i2c_clk) in ptp_ocp_detach()
4580 clk_hw_unregister_fixed_rate(bp->i2c_clk); in ptp_ocp_detach()
4581 if (bp->n_irqs) in ptp_ocp_detach()
4582 pci_free_irq_vectors(bp->pdev); in ptp_ocp_detach()
4583 if (bp->ptp) in ptp_ocp_detach()
4584 ptp_clock_unregister(bp->ptp); in ptp_ocp_detach()
4585 kfree(bp->ptp_info.pin_config); in ptp_ocp_detach()
4586 device_unregister(&bp->dev); in ptp_ocp_detach()
4597 *status = bp->sync ? DPLL_LOCK_STATUS_LOCKED : DPLL_LOCK_STATUS_UNLOCKED; in ptp_ocp_dpll_lock_status_get()
4610 if (bp->pps_select) { in ptp_ocp_dpll_state_get()
4611 idx = ioread32(&bp->pps_select->gpio1); in ptp_ocp_dpll_state_get()
4612 *state = (&bp->sma[idx] == pin_priv) ? DPLL_PIN_STATE_CONNECTED : in ptp_ocp_dpll_state_get()
4617 return -EINVAL; in ptp_ocp_dpll_state_get()
4636 *direction = sma->mode == SMA_MODE_IN ? in ptp_ocp_dpll_direction_get()
4652 int sma_nr = (sma - bp->sma); in ptp_ocp_dpll_direction_set()
4654 if (sma->fixed_dir) in ptp_ocp_dpll_direction_set()
4655 return -EOPNOTSUPP; in ptp_ocp_dpll_direction_set()
4670 int sma_nr = (sma - bp->sma); in ptp_ocp_dpll_frequency_set()
4673 if (sma->fixed_fcn) in ptp_ocp_dpll_frequency_set()
4674 return -EOPNOTSUPP; in ptp_ocp_dpll_frequency_set()
4676 tbl = bp->sma_op->tbl[sma->mode]; in ptp_ocp_dpll_frequency_set()
4679 return ptp_ocp_sma_store_val(bp, i, sma->mode, sma_nr + 1); in ptp_ocp_dpll_frequency_set()
4680 return -EINVAL; in ptp_ocp_dpll_frequency_set()
4692 int sma_nr = (sma - bp->sma); in ptp_ocp_dpll_frequency_get()
4696 val = bp->sma_op->get(bp, sma_nr + 1); in ptp_ocp_dpll_frequency_get()
4697 tbl = bp->sma_op->tbl[sma->mode]; in ptp_ocp_dpll_frequency_get()
4704 return -EINVAL; in ptp_ocp_dpll_frequency_get()
4727 sync = !!(ioread32(&bp->reg->status) & OCP_STATUS_IN_SYNC); in ptp_ocp_sync_work()
4729 if (bp->sync != sync) in ptp_ocp_sync_work()
4730 dpll_device_change_ntf(bp->dpll); in ptp_ocp_sync_work()
4732 bp->sync = sync; in ptp_ocp_sync_work()
4734 queue_delayed_work(system_power_efficient_wq, &bp->sync_work, HZ); in ptp_ocp_sync_work()
4745 devlink = devlink_alloc(&ptp_ocp_devlink_ops, sizeof(*bp), &pdev->dev); in ptp_ocp_probe()
4747 dev_err(&pdev->dev, "devlink_alloc failed\n"); in ptp_ocp_probe()
4748 return -ENOMEM; in ptp_ocp_probe()
4753 dev_err(&pdev->dev, "pci_enable_device\n"); in ptp_ocp_probe()
4762 INIT_DELAYED_WORK(&bp->sync_work, ptp_ocp_sync_work); in ptp_ocp_probe()
4766 * allow this - if not all of the IRQ's are returned, skip the in ptp_ocp_probe()
4771 dev_err(&pdev->dev, "alloc_irq_vectors err: %d\n", err); in ptp_ocp_probe()
4774 bp->n_irqs = err; in ptp_ocp_probe()
4777 err = ptp_ocp_register_resources(bp, id->driver_data); in ptp_ocp_probe()
4781 bp->ptp = ptp_clock_register(&bp->ptp_info, &pdev->dev); in ptp_ocp_probe()
4782 if (IS_ERR(bp->ptp)) { in ptp_ocp_probe()
4783 err = PTR_ERR(bp->ptp); in ptp_ocp_probe()
4784 dev_err(&pdev->dev, "ptp_clock_register: %d\n", err); in ptp_ocp_probe()
4785 bp->ptp = NULL; in ptp_ocp_probe()
4797 bp->dpll = dpll_device_get(clkid, 0, THIS_MODULE); in ptp_ocp_probe()
4798 if (IS_ERR(bp->dpll)) { in ptp_ocp_probe()
4799 err = PTR_ERR(bp->dpll); in ptp_ocp_probe()
4800 dev_err(&pdev->dev, "dpll_device_alloc failed\n"); in ptp_ocp_probe()
4804 err = dpll_device_register(bp->dpll, DPLL_TYPE_PPS, &dpll_ops, bp); in ptp_ocp_probe()
4809 bp->sma[i].dpll_pin = dpll_pin_get(clkid, i, THIS_MODULE, &bp->sma[i].dpll_prop); in ptp_ocp_probe()
4810 if (IS_ERR(bp->sma[i].dpll_pin)) { in ptp_ocp_probe()
4811 err = PTR_ERR(bp->sma[i].dpll_pin); in ptp_ocp_probe()
4815 err = dpll_pin_register(bp->dpll, bp->sma[i].dpll_pin, &dpll_pins_ops, in ptp_ocp_probe()
4816 &bp->sma[i]); in ptp_ocp_probe()
4818 dpll_pin_put(bp->sma[i].dpll_pin); in ptp_ocp_probe()
4822 queue_delayed_work(system_power_efficient_wq, &bp->sync_work, HZ); in ptp_ocp_probe()
4827 --i; in ptp_ocp_probe()
4828 dpll_pin_unregister(bp->dpll, bp->sma[i].dpll_pin, &dpll_pins_ops, &bp->sma[i]); in ptp_ocp_probe()
4829 dpll_pin_put(bp->sma[i].dpll_pin); in ptp_ocp_probe()
4831 dpll_device_put(bp->dpll); in ptp_ocp_probe()
4848 cancel_delayed_work_sync(&bp->sync_work); in ptp_ocp_remove()
4850 if (bp->sma[i].dpll_pin) { in ptp_ocp_remove()
4851 dpll_pin_unregister(bp->dpll, bp->sma[i].dpll_pin, &dpll_pins_ops, &bp->sma[i]); in ptp_ocp_remove()
4852 dpll_pin_put(bp->sma[i].dpll_pin); in ptp_ocp_remove()
4855 dpll_device_unregister(bp->dpll, &dpll_ops, bp); in ptp_ocp_remove()
4856 dpll_device_put(bp->dpll); in ptp_ocp_remove()
4892 while ((dev = dev->parent)) in ptp_ocp_i2c_notifier_call()
4893 if (dev->driver && !strcmp(dev->driver->name, KBUILD_MODNAME)) in ptp_ocp_i2c_notifier_call()
4902 sysfs_remove_link(&bp->dev.kobj, "i2c"); in ptp_ocp_i2c_notifier_call()