Lines Matching +full:over +full:- +full:volt
1 // SPDX-License-Identifier: GPL-2.0
7 * Copyright (C) 2010-2011 Lars-Peter Clausen <lars@metafoo.de>
19 * https://www.ti.com/product/bq27510-g1
20 * https://www.ti.com/product/bq27510-g2
21 * https://www.ti.com/product/bq27510-g3
22 * https://www.ti.com/product/bq27520-g1
23 * https://www.ti.com/product/bq27520-g2
24 * https://www.ti.com/product/bq27520-g3
25 * https://www.ti.com/product/bq27520-g4
26 * https://www.ti.com/product/bq27530-g1
27 * https://www.ti.com/product/bq27531-g1
28 * https://www.ti.com/product/bq27541-g1
29 * https://www.ti.com/product/bq27542-g1
30 * https://www.ti.com/product/bq27546-g1
31 * https://www.ti.com/product/bq27742-g1
32 * https://www.ti.com/product/bq27545-g1
33 * https://www.ti.com/product/bq27421-g1
34 * https://www.ti.com/product/bq27425-g1
36 * https://www.ti.com/product/bq27411-g1
37 * https://www.ti.com/product/bq27441-g1
38 * https://www.ti.com/product/bq27621-g1
41 * https://www.ti.com/product/bq34z100-g1
63 #define BQ27XXX_FLAG_SOCF BIT(1) /* State-of-Charge threshold final */
64 #define BQ27XXX_FLAG_SOC1 BIT(2) /* State-of-Charge threshold 1 */
73 #define BQ27000_FLAG_EDVF BIT(0) /* Final End-of-Discharge-Voltage flag */
74 #define BQ27000_FLAG_EDV1 BIT(1) /* First End-of-Discharge-Voltage flag */
97 * bq27xxx_reg_index - Register names
109 BQ27XXX_REG_TTE, /* Time-to-Empty */
110 BQ27XXX_REG_TTF, /* Time-to-Full */
111 BQ27XXX_REG_TTES, /* Time-to-Empty Standby */
112 BQ27XXX_REG_TTECP, /* Time-to-Empty at Constant Power */
118 BQ27XXX_REG_SOC, /* State-of-Charge */
126 BQ27XXX_REG_SEDVF, /* End-of-discharge Voltage */
1069 * struct bq27xxx_dm_buf - chip data memory buffer
1086 .class = (di)->dm_regs[i].subclass_id, \
1087 .block = (di)->dm_regs[i].offset / BQ27XXX_DM_SZ, \
1093 if (buf->class == reg->subclass_id &&
1094 buf->block == reg->offset / BQ27XXX_DM_SZ)
1095 return (__be16 *) (buf->data + reg->offset % BQ27XXX_DM_SZ);
1101 [BQ27XXX_DM_DESIGN_CAPACITY] = "design-capacity",
1102 [BQ27XXX_DM_DESIGN_ENERGY] = "design-energy",
1103 [BQ27XXX_DM_TERMINATE_VOLTAGE] = "terminate-voltage",
1110 "Devicetree monitored-battery config updates data memory on NVM/flash chips.\n"
1121 unsigned int prev_val = *(unsigned int *) kp->arg;
1125 if (ret < 0 || prev_val == *(unsigned int *) kp->arg)
1130 mod_delayed_work(system_wq, &di->work, 0);
1144 "battery poll interval in seconds - 0 disables polling");
1155 if (!di || di->regs[reg_index] == INVALID_REG_ADDR)
1156 return -EINVAL;
1158 ret = di->bus.read(di, di->regs[reg_index], single);
1160 dev_dbg(di->dev, "failed to read register 0x%02x (index %d)\n",
1161 di->regs[reg_index], reg_index);
1171 if (!di || di->regs[reg_index] == INVALID_REG_ADDR)
1172 return -EINVAL;
1174 if (!di->bus.write)
1175 return -EPERM;
1177 ret = di->bus.write(di, di->regs[reg_index], value, single);
1179 dev_dbg(di->dev, "failed to write register 0x%02x (index %d)\n",
1180 di->regs[reg_index], reg_index);
1190 if (!di || di->regs[reg_index] == INVALID_REG_ADDR)
1191 return -EINVAL;
1193 if (!di->bus.read_bulk)
1194 return -EPERM;
1196 ret = di->bus.read_bulk(di, di->regs[reg_index], data, len);
1198 dev_dbg(di->dev, "failed to read_bulk register 0x%02x (index %d)\n",
1199 di->regs[reg_index], reg_index);
1209 if (!di || di->regs[reg_index] == INVALID_REG_ADDR)
1210 return -EINVAL;
1212 if (!di->bus.write_bulk)
1213 return -EPERM;
1215 ret = di->bus.write_bulk(di, di->regs[reg_index], data, len);
1217 dev_dbg(di->dev, "failed to write_bulk register 0x%02x (index %d)\n",
1218 di->regs[reg_index], reg_index);
1229 dev_err(di->dev, "bus error on seal: %d\n", ret);
1240 if (di->unseal_key == 0) {
1241 dev_err(di->dev, "unseal failed due to missing key\n");
1242 return -EINVAL;
1245 ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, (u16)(di->unseal_key >> 16), false);
1249 ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, (u16)di->unseal_key, false);
1256 dev_err(di->dev, "bus error on unseal: %d\n", ret);
1266 sum += buf->data[i];
1269 return 0xff - sum;
1277 buf->has_data = false;
1279 ret = bq27xxx_write(di, BQ27XXX_DM_CLASS, buf->class, true);
1283 ret = bq27xxx_write(di, BQ27XXX_DM_BLOCK, buf->block, true);
1289 ret = bq27xxx_read_block(di, BQ27XXX_DM_DATA, buf->data, BQ27XXX_DM_SZ);
1298 ret = -EINVAL;
1302 buf->has_data = true;
1303 buf->dirty = false;
1308 dev_err(di->dev, "bus error reading chip memory: %d\n", ret);
1317 struct bq27xxx_dm_reg *reg = &di->dm_regs[reg_id];
1322 dev_warn(di->dev, "buffer does not match %s dm spec\n", str);
1326 if (reg->bytes != 2) {
1327 dev_warn(di->dev, "%s dm spec has unsupported byte size\n", str);
1331 if (!buf->has_data)
1335 dev_info(di->dev, "%s has %u\n", str, val);
1340 if (!(di->opts & BQ27XXX_O_RAM) && !bq27xxx_dt_to_nvm) {
1342 if (!(di->opts & BQ27XXX_O_RAM)) {
1345 dev_warn(di->dev, "%s has %u; update to %u disallowed "
1355 dev_info(di->dev, "update %s to %u\n", str, val);
1358 buf->dirty = true;
1376 } while (!!(ret & BQ27XXX_FLAG_CFGUP) != active && --try);
1378 if (!try && di->chip != BQ27425) { // 425 has a bug
1379 dev_err(di->dev, "timed out waiting for cfgupdate flag %d\n", active);
1380 return -EINVAL;
1383 if (limit - try > 3)
1384 dev_warn(di->dev, "cfgupdate %d, retries %d\n", active, limit - try);
1392 if (ret < 0 && ret != -EINVAL)
1393 dev_err(di->dev, "bus error on set_cfgupdate: %d\n", ret);
1401 if (ret < 0 && ret != -EINVAL)
1402 dev_err(di->dev, "bus error on soft_reset: %d\n", ret);
1410 bool cfgup = di->opts & BQ27XXX_O_CFGUP;
1413 if (!buf->dirty)
1426 ret = bq27xxx_write(di, BQ27XXX_DM_CLASS, buf->class, true);
1430 ret = bq27xxx_write(di, BQ27XXX_DM_BLOCK, buf->block, true);
1436 ret = bq27xxx_write_block(di, BQ27XXX_DM_DATA, buf->data, BQ27XXX_DM_SZ);
1459 buf->dirty = false;
1467 dev_err(di->dev, "bus error writing chip memory: %d\n", ret);
1481 if (info->charge_full_design_uah != -EINVAL &&
1482 info->energy_full_design_uwh != -EINVAL) {
1487 info->charge_full_design_uah / 1000);
1490 info->energy_full_design_uwh / 1000);
1493 if (info->voltage_min_design_uv != -EINVAL) {
1499 info->voltage_min_design_uv / 1000);
1509 if (updated && !(di->opts & BQ27XXX_O_CFGUP)) {
1521 if (power_supply_get_battery_info(di->bat, &info) < 0)
1524 if (!di->dm_regs) {
1525 dev_warn(di->dev, "data memory update not supported for chip\n");
1529 if (info->energy_full_design_uwh != info->charge_full_design_uah) {
1530 if (info->energy_full_design_uwh == -EINVAL)
1531 dev_warn(di->dev, "missing battery:energy-full-design-microwatt-hours\n");
1532 else if (info->charge_full_design_uah == -EINVAL)
1533 dev_warn(di->dev, "missing battery:charge-full-design-microamp-hours\n");
1537 max = di->dm_regs[BQ27XXX_DM_DESIGN_ENERGY].max;
1538 if (info->energy_full_design_uwh > max * 1000) {
1539 dev_err(di->dev, "invalid battery:energy-full-design-microwatt-hours %d\n",
1540 info->energy_full_design_uwh);
1541 info->energy_full_design_uwh = -EINVAL;
1545 max = di->dm_regs[BQ27XXX_DM_DESIGN_CAPACITY].max;
1546 if (info->charge_full_design_uah > max * 1000) {
1547 dev_err(di->dev, "invalid battery:charge-full-design-microamp-hours %d\n",
1548 info->charge_full_design_uah);
1549 info->charge_full_design_uah = -EINVAL;
1552 min = di->dm_regs[BQ27XXX_DM_TERMINATE_VOLTAGE].min;
1553 max = di->dm_regs[BQ27XXX_DM_TERMINATE_VOLTAGE].max;
1554 if ((info->voltage_min_design_uv < min * 1000 ||
1555 info->voltage_min_design_uv > max * 1000) &&
1556 info->voltage_min_design_uv != -EINVAL) {
1557 dev_err(di->dev, "invalid battery:voltage-min-design-microvolt %d\n",
1558 info->voltage_min_design_uv);
1559 info->voltage_min_design_uv = -EINVAL;
1562 if ((info->energy_full_design_uwh != -EINVAL &&
1563 info->charge_full_design_uah != -EINVAL) ||
1564 info->voltage_min_design_uv != -EINVAL)
1569 * Return the battery State-of-Charge
1576 if (di->opts & BQ27XXX_O_SOC_SI)
1582 dev_dbg(di->dev, "error reading State-of-Charge\n");
1598 dev_dbg(di->dev, "error reading charge register %02x: %d\n",
1603 if (di->opts & BQ27XXX_O_ZERO)
1608 val->intval = charge;
1653 if (di->charge_design_full > 0) {
1654 val->intval = di->charge_design_full;
1658 if (di->opts & BQ27XXX_O_ZERO)
1664 dev_dbg(di->dev, "error reading design capacity\n");
1668 if (di->opts & BQ27XXX_O_ZERO)
1674 di->charge_design_full = dcap;
1676 val->intval = dcap;
1692 dev_dbg(di->dev, "error reading available energy\n");
1696 if (di->opts & BQ27XXX_O_ZERO)
1701 val->intval = ae;
1717 dev_err(di->dev, "error reading temperature\n");
1721 if (di->opts & BQ27XXX_O_ZERO)
1725 temp -= 2731;
1727 val->intval = temp;
1743 dev_err(di->dev, "error reading cycle count total\n");
1745 val->intval = cyct;
1761 dev_dbg(di->dev, "error reading time register %02x: %d\n",
1767 return -ENODATA;
1769 val->intval = tval * 60;
1775 * Returns true if a battery over temperature condition is detected
1779 if (di->opts & BQ27XXX_O_OTDC)
1781 if (di->opts & BQ27XXX_O_UTOT)
1792 if (di->opts & BQ27XXX_O_UTOT)
1803 if (di->opts & BQ27XXX_O_ZERO)
1805 else if (di->opts & BQ27Z561_O_BITS)
1817 if (di->opts & BQ27XXX_O_HAS_CI)
1829 if (unlikely(bq27xxx_battery_overtemp(di, di->cache.flags)))
1831 else if (unlikely(bq27xxx_battery_undertemp(di, di->cache.flags)))
1833 else if (unlikely(bq27xxx_battery_dead(di, di->cache.flags)))
1835 else if (unlikely(bq27xxx_battery_capacity_inaccurate(di, di->cache.flags)))
1840 val->intval = health;
1847 if (di->opts & BQ27XXX_O_ZERO)
1849 else if (di->opts & BQ27Z561_O_BITS)
1866 bool single_flags = (di->opts & BQ27XXX_O_ZERO);
1872 dev_err(di->dev, "error reading current\n");
1877 flags = cache->flags;
1881 dev_err(di->dev, "error reading flags\n");
1886 if (di->opts & BQ27XXX_O_ZERO) {
1888 dev_dbg(di->dev, "negative current!\n");
1889 curr = -curr;
1899 val_curr->intval = curr;
1903 val_status->intval = POWER_SUPPLY_STATUS_FULL;
1905 val_status->intval = POWER_SUPPLY_STATUS_CHARGING;
1907 val_status->intval = POWER_SUPPLY_STATUS_DISCHARGING;
1909 val_status->intval = POWER_SUPPLY_STATUS_NOT_CHARGING;
1917 union power_supply_propval status = di->last_status;
1919 bool has_singe_flag = di->opts & BQ27XXX_O_ZERO;
1923 cache.flags = -1; /* read error */
1929 * checked to detect charging <-> discharging status changes.
1931 if (!(di->opts & BQ27XXX_O_ZERO))
1935 if ((di->cache.capacity != cache.capacity) ||
1936 (di->cache.flags != cache.flags) ||
1937 (di->last_status.intval != status.intval)) {
1938 di->last_status.intval = status.intval;
1939 power_supply_changed(di->bat);
1942 if (memcmp(&di->cache, &cache, sizeof(cache)) != 0)
1943 di->cache = cache;
1945 di->last_update = jiffies;
1947 if (!di->removed && poll_interval > 0)
1948 mod_delayed_work(system_wq, &di->work, poll_interval * HZ);
1953 mutex_lock(&di->lock);
1955 mutex_unlock(&di->lock);
1979 dev_err(di->dev,
1985 if (di->opts & BQ27XXX_O_ZERO)
1986 val->intval = (power * BQ27XXX_POWER_CONSTANT) / BQ27XXX_RS;
1989 val->intval = (int)((s16)power) * 10000;
1999 if (di->opts & BQ27XXX_O_ZERO) {
2000 if (di->cache.flags & BQ27000_FLAG_FC)
2002 else if (di->cache.flags & BQ27000_FLAG_EDVF)
2004 else if (di->cache.flags & BQ27000_FLAG_EDV1)
2008 } else if (di->opts & BQ27Z561_O_BITS) {
2009 if (di->cache.flags & BQ27Z561_FLAG_FC)
2011 else if (di->cache.flags & BQ27Z561_FLAG_FDC)
2016 if (di->cache.flags & BQ27XXX_FLAG_FC)
2018 else if (di->cache.flags & BQ27XXX_FLAG_SOCF)
2020 else if (di->cache.flags & BQ27XXX_FLAG_SOC1)
2026 val->intval = level;
2038 int volt;
2040 volt = bq27xxx_read(di, BQ27XXX_REG_VOLT, false);
2041 if (volt < 0) {
2042 dev_err(di->dev, "error reading voltage\n");
2043 return volt;
2046 val->intval = volt * 1000;
2061 if (di->voltage_max_design > 0) {
2062 val->intval = di->voltage_max_design;
2068 dev_err(di->dev, "error reading design max voltage\n");
2073 val->intval = 3968000 + 48000 * qv;
2075 di->voltage_max_design = val->intval;
2087 int volt;
2090 if (di->voltage_min_design > 0) {
2091 val->intval = di->voltage_min_design;
2095 volt = bq27xxx_read(di, BQ27XXX_REG_SEDVF, true);
2096 if (volt < 0) {
2097 dev_err(di->dev, "error reading design min voltage\n");
2098 return volt;
2101 /* SEDVF = Design EDVF / 8 - 256 */
2102 val->intval = volt * 8000 + 2048000;
2105 di->voltage_min_design = val->intval;
2116 val->intval = value;
2128 mutex_lock(&di->lock);
2129 if (time_is_before_jiffies(di->last_update + 5 * HZ))
2131 mutex_unlock(&di->lock);
2133 if (psp != POWER_SUPPLY_PROP_PRESENT && di->cache.flags < 0)
2134 return -ENODEV;
2144 val->intval = di->cache.flags < 0 ? 0 : 1;
2150 ret = bq27xxx_simple_value(di->cache.capacity, val);
2168 if (di->opts & BQ27XXX_O_MUL_CHEM)
2169 val->intval = POWER_SUPPLY_TECHNOLOGY_UNKNOWN;
2171 val->intval = POWER_SUPPLY_TECHNOLOGY_LION;
2174 if (di->regs[BQ27XXX_REG_NAC] != INVALID_REG_ADDR)
2190 return -EINVAL;
2210 val->strval = BQ27XXX_MANUFACTURER;
2213 return -EINVAL;
2224 mod_delayed_work(system_wq, &di->work, HZ / 2);
2238 .fwnode = dev_fwnode(di->dev),
2244 INIT_DELAYED_WORK(&di->work, bq27xxx_battery_poll);
2245 mutex_init(&di->lock);
2246 ret = devm_add_action_or_reset(di->dev, bq27xxx_battery_mutex_destroy,
2247 &di->lock);
2251 di->regs = bq27xxx_chip_data[di->chip].regs;
2252 di->unseal_key = bq27xxx_chip_data[di->chip].unseal_key;
2253 di->dm_regs = bq27xxx_chip_data[di->chip].dm_regs;
2254 di->opts = bq27xxx_chip_data[di->chip].opts;
2256 psy_desc = devm_kzalloc(di->dev, sizeof(*psy_desc), GFP_KERNEL);
2258 return -ENOMEM;
2260 psy_desc->name = di->name;
2261 psy_desc->type = POWER_SUPPLY_TYPE_BATTERY;
2262 psy_desc->properties = bq27xxx_chip_data[di->chip].props;
2263 psy_desc->num_properties = bq27xxx_chip_data[di->chip].props_size;
2264 psy_desc->get_property = bq27xxx_battery_get_property;
2265 psy_desc->external_power_changed = bq27xxx_external_power_changed;
2267 di->bat = devm_power_supply_register(di->dev, psy_desc, &psy_cfg);
2268 if (IS_ERR(di->bat))
2269 return dev_err_probe(di->dev, PTR_ERR(di->bat),
2276 list_add(&di->list, &bq27xxx_battery_devices);
2286 list_del(&di->list);
2289 /* Set removed to avoid bq27xxx_battery_update() re-queuing the work */
2290 mutex_lock(&di->lock);
2291 di->removed = true;
2292 mutex_unlock(&di->lock);
2294 cancel_delayed_work_sync(&di->work);
2303 cancel_delayed_work(&di->work);
2311 schedule_delayed_work(&di->work, 0);