Lines Matching +full:15 +full:- +full:9
1 /* SPDX-License-Identifier: GPL-2.0-only */
484 [F_VBAT_VSYS_STATUS] = REG_FIELD(VBAT_VSYS_STATUS, 0, 15),
490 [F_THERMWDT_VAL] = REG_FIELD(WDT_STATUS, 8, 15),
497 [F_OTG_BOTH_EN] = REG_FIELD(VIN_CTRL_SET, 15, 15),
507 [F_DCP_2500_SEL] = REG_FIELD(CHGOP_SET1, 15, 15),
512 [F_SDP_CHG_TRIG_EN] = REG_FIELD(CHGOP_SET1, 9, 9),
530 [F_WDT_FST] = REG_FIELD(CHGWDT_SET, 8, 15),
532 [F_WDT_IBAT_SHORT] = REG_FIELD(BATTWDT_SET, 8, 15),
549 [F_PROCHOT_DG_SET] = REG_FIELD(PROCHOT_CTRL_SET, 14, 15),
551 [F_PROCHOT_IDCHG_DG_SET] = REG_FIELD(PROCHOT_CTRL_SET, 8, 9),
557 [F_IMON_INSEL] = REG_FIELD(PMON_IOUT_CTRL_SET, 9, 9),
564 [F_PMON_DACIN_VAL] = REG_FIELD(PMON_DACIN_VAL, 0, 9),
575 [F_VCC_DCDFAIL] = REG_FIELD(VCC_UCD_STATUS, 15, 15),
586 [F_VCC_RREF_EN] = REG_FIELD(VCC_UCD_FCTRL_SET, 9, 9),
596 [F_VCC_EXTCLKENBL] = REG_FIELD(VCC_UCD_FCTRL_EN, 15, 15),
599 [F_VCC_RREF_EN_TSTENB] = REG_FIELD(VCC_UCD_FCTRL_EN, 9, 9),
619 [F_VBUS_DCDFAIL] = REG_FIELD(VBUS_UCD_STATUS, 15, 15),
630 [F_VBUS_RREF_EN] = REG_FIELD(VCC_UCD_FCTRL_SET, 9, 9),
641 [F_VBUS_EXTCLKENBL] = REG_FIELD(VBUS_UCD_FCTRL_EN, 15, 15),
644 [F_VBUS_RREF_EN_TSTENB] = REG_FIELD(VBUS_UCD_FCTRL_EN, 9, 9),
655 [F_CHIP_ID] = REG_FIELD(CHIP_ID, 0, 15),
656 [F_CHIP_REV] = REG_FIELD(CHIP_REV, 0, 15),
659 [F_VACP_AUTO_DISCHG] = REG_FIELD(IC_SET1, 9, 9),
670 [F_PROTECT_SET] = REG_FIELD(PROTECT_SET, 0, 15),
671 [F_MAP_SET] = REG_FIELD(MAP_SET, 0, 15),
672 [F_ADCINTERVAL] = REG_FIELD(VM_CTRL_SET, 14, 15),
675 [F_EXTIADPEN] = REG_FIELD(VM_CTRL_SET, 9, 9),
685 [F_TMPTHR1B] = REG_FIELD(THERM_WINDOW_SET1, 8, 15),
687 [F_TMPTHR2B] = REG_FIELD(THERM_WINDOW_SET2, 8, 15),
689 [F_TMPTHR3B] = REG_FIELD(THERM_WINDOW_SET3, 8, 15),
691 [F_TMPTHR4B] = REG_FIELD(THERM_WINDOW_SET4, 8, 15),
693 [F_TMPTHR5B] = REG_FIELD(THERM_WINDOW_SET5, 8, 15),
726 [F_INT7_SET] = REG_FIELD(INT7_SET, 0, 15),
729 [F_INT4_SET] = REG_FIELD(INT4_SET, 0, 9),
730 [F_INT3_SET] = REG_FIELD(INT3_SET, 0, 15),
731 [F_INT2_SET] = REG_FIELD(INT2_SET, 0, 15),
732 [F_INT1_SET] = REG_FIELD(INT1_SET, 0, 15),
734 [F_VBUS_RBUV_DET] = REG_FIELD(INT1_SET, 15, 15),
736 [F_VBUS_TH_DET] = REG_FIELD(INT1_SET, 9, 9),
745 [F_VCC_RBUV_DET] = REG_FIELD(INT2_SET, 15, 15),
747 [F_VCC_TH_DET] = REG_FIELD(INT2_SET, 9, 9),
756 [F_TH_DET] = REG_FIELD(INT3_SET, 15, 15),
760 [F_VBAT_TH_DET] = REG_FIELD(INT3_SET, 9, 9),
768 [F_VSYS_TH_DET] = REG_FIELD(INT4_SET, 9, 9),
779 [F_EXTIADP_TH_DET] = REG_FIELD(INT5_SET, 9, 9),
799 [F_PROCHOT_DET] = REG_FIELD(INT7_SET, 15, 15),
803 [F_VACP_TH_DET] = REG_FIELD(INT7_SET, 9, 9),
813 [F_INT7_STATUS] = REG_FIELD(INT7_STATUS, 0, 15),
816 [F_INT4_STATUS] = REG_FIELD(INT4_STATUS, 0, 9),
817 [F_INT3_STATUS] = REG_FIELD(INT3_STATUS, 0, 15),
818 [F_INT2_STATUS] = REG_FIELD(INT2_STATUS, 0, 15),
819 [F_INT1_STATUS] = REG_FIELD(INT1_STATUS, 0, 15),
821 [F_ILIM_DECREASE] = REG_FIELD(OTPREG0, 0, 15),
822 [F_RESERVE_OTPREG1] = REG_FIELD(OTPREG1, 0, 15),
823 [F_POWER_SAVE_MODE] = REG_FIELD(SMBREG, 0, 15),
824 [F_DEBUG_MODE_SET] = REG_FIELD(DEBUG_MODE_SET, 0, 15),
825 [F_DEBUG0x14] = REG_FIELD(DEBUG0x14, 0, 15),
826 [F_DEBUG0x1A] = REG_FIELD(DEBUG0x1A, 0, 15),
855 #define STATUS_VSYS_OV BIT(15)
867 #define STATUS_VCC_CLPS BIT(9)
888 #define VBUS_RBUV_DET BIT(15)
890 #define VBUS_TH_DET BIT(9)
912 #define VCC_RBUV_DET BIT(15)
914 #define VCC_TH_DET BIT(9)
935 #define TH_DET BIT(15)
939 #define VBAT_TH_DET BIT(9)
961 #define VSYS_TH_DET BIT(9)
982 #define EXTIADP_TH_DET BIT(9)
1029 #define PROCHOT_DET BIT(15)
1033 #define VACP_TH_DET BIT(9)