Lines Matching full:reset

2  * Atmel AT91 SAM9 & SAMA5 SoCs reset code
20 #include <linux/reset-controller.h>
26 #include <dt-bindings/reset/sama7g5-reset.h>
28 #define AT91_RSTC_CR 0x00 /* Reset Controller Control Register */
29 #define AT91_RSTC_PROCRST BIT(0) /* Processor Reset */
30 #define AT91_RSTC_PERRST BIT(2) /* Peripheral Reset */
31 #define AT91_RSTC_EXTRST BIT(3) /* External Reset */
34 #define AT91_RSTC_SR 0x04 /* Reset Controller Status Register */
35 #define AT91_RSTC_URSTS BIT(0) /* User Reset Status */
36 #define AT91_RSTC_RSTTYP GENMASK(10, 8) /* Reset Type */
38 #define AT91_RSTC_SRCMP BIT(17) /* Software Reset Command in Progress */
40 #define AT91_RSTC_MR 0x08 /* Reset Controller Mode Register */
41 #define AT91_RSTC_URSTEN BIT(0) /* User Reset Enable */
42 #define AT91_RSTC_URSTASYNC BIT(2) /* User Reset Asynchronous Control */
43 #define AT91_RSTC_URSTIEN BIT(4) /* User Reset Interrupt Enable */
44 #define AT91_RSTC_ERSTL GENMASK(11, 8) /* External Reset Length */
47 * enum reset_type - reset types
48 * @RESET_TYPE_GENERAL: first power-up reset
51 * @RESET_TYPE_SOFTWARE: processor reset required by software
55 * @RESET_TYPE_ULP2: ULP2 reset
69 * struct at91_reset - AT91 reset specific data structure
70 * @rstc_base: base address for system reset
72 * @dev_base: base address for devices reset
74 * @data: platform specific reset data
75 * @rcdev: reset controller device
76 * @lock: lock for devices reset register access
77 * @nb: reset notifier block
78 * @args: SoC specific system reset arguments
97 * struct at91_reset_data - AT91 reset data
98 * @reset_args: SoC specific system reset arguments
100 * @device_reset_min_id: min id for device reset
101 * @device_reset_max_id: max id for device reset
112 * reset register it can be left driving the data bus and
118 struct at91_reset *reset = container_of(this, struct at91_reset, nb); in at91_reset() local
135 /* Reset CPU */ in at91_reset()
140 : "r" (reset->ramc_base[0]), in at91_reset()
141 "r" (reset->ramc_base[1]), in at91_reset()
142 "r" (reset->rstc_base), in at91_reset()
145 "r" (reset->data->reset_args), in at91_reset()
146 "r" (reset->ramc_lpr) in at91_reset()
152 static const char *at91_reset_reason(struct at91_reset *reset) in at91_reset_reason() argument
154 u32 reg = readl(reset->rstc_base + AT91_RSTC_SR); in at91_reset_reason()
194 struct at91_reset *reset = platform_get_drvdata(pdev); in power_on_reason_show() local
196 return sprintf(buf, "%s\n", at91_reset_reason(reset)); in power_on_reason_show()
259 struct at91_reset *reset = to_at91_reset(rcdev); in at91_reset_update() local
263 spin_lock_irqsave(&reset->lock, flags); in at91_reset_update()
264 val = readl_relaxed(reset->dev_base); in at91_reset_update()
269 writel_relaxed(val, reset->dev_base); in at91_reset_update()
270 spin_unlock_irqrestore(&reset->lock, flags); in at91_reset_update()
290 struct at91_reset *reset = to_at91_reset(rcdev); in at91_reset_dev_status() local
293 val = readl_relaxed(reset->dev_base); in at91_reset_dev_status()
307 struct at91_reset *reset = to_at91_reset(rcdev); in at91_reset_of_xlate() local
309 if (!reset->data->n_device_reset || in at91_reset_of_xlate()
310 (reset_spec->args[0] < reset->data->device_reset_min_id || in at91_reset_of_xlate()
311 reset_spec->args[0] > reset->data->device_reset_max_id)) in at91_reset_of_xlate()
317 static int at91_rcdev_init(struct at91_reset *reset, in at91_rcdev_init() argument
320 if (!reset->data->n_device_reset) in at91_rcdev_init()
323 reset->dev_base = devm_of_iomap(&pdev->dev, pdev->dev.of_node, 1, in at91_rcdev_init()
325 if (IS_ERR(reset->dev_base)) in at91_rcdev_init()
328 spin_lock_init(&reset->lock); in at91_rcdev_init()
329 reset->rcdev.ops = &at91_reset_ops; in at91_rcdev_init()
330 reset->rcdev.owner = THIS_MODULE; in at91_rcdev_init()
331 reset->rcdev.of_node = pdev->dev.of_node; in at91_rcdev_init()
332 reset->rcdev.nr_resets = reset->data->n_device_reset; in at91_rcdev_init()
333 reset->rcdev.of_reset_n_cells = 1; in at91_rcdev_init()
334 reset->rcdev.of_xlate = at91_reset_of_xlate; in at91_rcdev_init()
336 return devm_reset_controller_register(&pdev->dev, &reset->rcdev); in at91_rcdev_init()
342 struct at91_reset *reset; in at91_reset_probe() local
346 reset = devm_kzalloc(&pdev->dev, sizeof(*reset), GFP_KERNEL); in at91_reset_probe()
347 if (!reset) in at91_reset_probe()
350 reset->rstc_base = devm_of_iomap(&pdev->dev, pdev->dev.of_node, 0, NULL); in at91_reset_probe()
351 if (IS_ERR(reset->rstc_base)) { in at91_reset_probe()
352 dev_err(&pdev->dev, "Could not map reset controller address\n"); in at91_reset_probe()
359 reset->ramc_lpr = (u32)match->data; in at91_reset_probe()
360 reset->ramc_base[idx] = devm_of_iomap(&pdev->dev, np, 0, NULL); in at91_reset_probe()
361 if (IS_ERR(reset->ramc_base[idx])) { in at91_reset_probe()
370 reset->data = device_get_match_data(&pdev->dev); in at91_reset_probe()
371 if (!reset->data) in at91_reset_probe()
374 reset->nb.notifier_call = at91_reset; in at91_reset_probe()
375 reset->nb.priority = 192; in at91_reset_probe()
377 reset->sclk = devm_clk_get(&pdev->dev, NULL); in at91_reset_probe()
378 if (IS_ERR(reset->sclk)) in at91_reset_probe()
379 return PTR_ERR(reset->sclk); in at91_reset_probe()
381 ret = clk_prepare_enable(reset->sclk); in at91_reset_probe()
387 platform_set_drvdata(pdev, reset); in at91_reset_probe()
389 ret = at91_rcdev_init(reset, pdev); in at91_reset_probe()
394 u32 val = readl(reset->rstc_base + AT91_RSTC_MR); in at91_reset_probe()
397 reset->rstc_base + AT91_RSTC_MR); in at91_reset_probe()
400 ret = register_restart_handler(&reset->nb); in at91_reset_probe()
410 dev_info(&pdev->dev, "Starting after %s\n", at91_reset_reason(reset)); in at91_reset_probe()
415 clk_disable_unprepare(reset->sclk); in at91_reset_probe()
421 struct at91_reset *reset = platform_get_drvdata(pdev); in at91_reset_remove() local
423 unregister_restart_handler(&reset->nb); in at91_reset_remove()
424 clk_disable_unprepare(reset->sclk); in at91_reset_remove()
431 .name = "at91-reset",
438 MODULE_DESCRIPTION("Reset driver for Atmel SoCs");