64 			     struct jh71xx_pmu *pmu);
81 	struct jh71xx_pmu *pmu;  member
87 	struct jh71xx_pmu *pmu = pmd->pmu;  in jh71xx_pmu_get_state()  local
92 	*is_on = readl(pmu->base + pmu->match_data->pmu_status) & mask;  in jh71xx_pmu_get_state()
99 	struct jh71xx_pmu *pmu = pmd->pmu;  in jh7110_pmu_set_state()  local
107 	spin_lock_irqsave(&pmu->lock, flags);  in jh7110_pmu_set_state()
129 	writel(mask, pmu->base + mode);  in jh7110_pmu_set_state()
139 	writel(JH71XX_PMU_SW_ENCOURAGE_ON, pmu->base + JH71XX_PMU_SW_ENCOURAGE);  in jh7110_pmu_set_state()
140 	writel(encourage_lo, pmu->base + JH71XX_PMU_SW_ENCOURAGE);  in jh7110_pmu_set_state()
141 	writel(encourage_hi, pmu->base + JH71XX_PMU_SW_ENCOURAGE);  in jh7110_pmu_set_state()
143 	spin_unlock_irqrestore(&pmu->lock, flags);  in jh7110_pmu_set_state()
147 		ret = readl_poll_timeout_atomic(pmu->base + JH71XX_PMU_CURR_POWER_MODE,  in jh7110_pmu_set_state()
151 		ret = readl_poll_timeout_atomic(pmu->base + JH71XX_PMU_CURR_POWER_MODE,  in jh7110_pmu_set_state()
157 		dev_err(pmu->dev, "%s: failed to power %s\n",  in jh7110_pmu_set_state()
167 	struct jh71xx_pmu *pmu = pmd->pmu;  in jh7110_aon_pmu_set_state()  local
171 	spin_lock_irqsave(&pmu->lock, flags);  in jh7110_aon_pmu_set_state()
172 	val = readl(pmu->base + JH71XX_AON_PMU_SWITCH);  in jh7110_aon_pmu_set_state()
179 	writel(val, pmu->base + JH71XX_AON_PMU_SWITCH);  in jh7110_aon_pmu_set_state()
180 	spin_unlock_irqrestore(&pmu->lock, flags);  in jh7110_aon_pmu_set_state()
187 	struct jh71xx_pmu *pmu = pmd->pmu;  in jh71xx_pmu_set_state()  local
188 	const struct jh71xx_pmu_match_data *match_data = pmu->match_data;  in jh71xx_pmu_set_state()
194 		dev_dbg(pmu->dev, "unable to get current state for %s\n",  in jh71xx_pmu_set_state()
200 		dev_dbg(pmu->dev, "pm domain [%s] is already %sable status.\n",  in jh71xx_pmu_set_state()
226 static void jh71xx_pmu_int_enable(struct jh71xx_pmu *pmu, u32 mask, bool enable)  in jh71xx_pmu_int_enable()  argument
231 	spin_lock_irqsave(&pmu->lock, flags);  in jh71xx_pmu_int_enable()
232 	val = readl(pmu->base + JH71XX_PMU_TIMER_INT_MASK);  in jh71xx_pmu_int_enable()
239 	writel(val, pmu->base + JH71XX_PMU_TIMER_INT_MASK);  in jh71xx_pmu_int_enable()
240 	spin_unlock_irqrestore(&pmu->lock, flags);  in jh71xx_pmu_int_enable()
245 	struct jh71xx_pmu *pmu = data;  in jh71xx_pmu_interrupt()  local
248 	val = readl(pmu->base + JH71XX_PMU_INT_STATUS);  in jh71xx_pmu_interrupt()
251 		dev_dbg(pmu->dev, "sequence done.\n");  in jh71xx_pmu_interrupt()
253 		dev_dbg(pmu->dev, "hardware encourage requestion.\n");  in jh71xx_pmu_interrupt()
255 		dev_err(pmu->dev, "software encourage fail.\n");  in jh71xx_pmu_interrupt()
257 		dev_err(pmu->dev, "hardware encourage fail.\n");  in jh71xx_pmu_interrupt()
259 		dev_err(pmu->dev, "p-channel fail event.\n");  in jh71xx_pmu_interrupt()
262 	writel(val, pmu->base + JH71XX_PMU_INT_STATUS);  in jh71xx_pmu_interrupt()
263 	writel(val, pmu->base + JH71XX_PMU_EVENT_STATUS);  in jh71xx_pmu_interrupt()
268 static int jh7110_pmu_parse_irq(struct platform_device *pdev, struct jh71xx_pmu *pmu)  in jh7110_pmu_parse_irq()  argument
273 	pmu->irq = platform_get_irq(pdev, 0);  in jh7110_pmu_parse_irq()
274 	if (pmu->irq < 0)  in jh7110_pmu_parse_irq()
275 		return pmu->irq;  in jh7110_pmu_parse_irq()
277 	ret = devm_request_irq(dev, pmu->irq, jh71xx_pmu_interrupt,  in jh7110_pmu_parse_irq()
278 			       0, pdev->name, pmu);  in jh7110_pmu_parse_irq()
282 	jh71xx_pmu_int_enable(pmu, JH71XX_PMU_INT_ALL_MASK & ~JH71XX_PMU_INT_PCH_FAIL, true);  in jh7110_pmu_parse_irq()
287 static int jh71xx_pmu_init_domain(struct jh71xx_pmu *pmu, int index)  in jh71xx_pmu_init_domain()  argument
294 	pmd = devm_kzalloc(pmu->dev, sizeof(*pmd), GFP_KERNEL);  in jh71xx_pmu_init_domain()
298 	pmd->domain_info = &pmu->match_data->domain_info[index];  in jh71xx_pmu_init_domain()
299 	pmd->pmu = pmu;  in jh71xx_pmu_init_domain()
307 		dev_warn(pmu->dev, "unable to get current state for %s\n",  in jh71xx_pmu_init_domain()
314 	pmu->genpd_data.domains[index] = &pmd->genpd;  in jh71xx_pmu_init_domain()
324 	struct jh71xx_pmu *pmu;  in jh71xx_pmu_probe()  local
328 	pmu = devm_kzalloc(dev, sizeof(*pmu), GFP_KERNEL);  in jh71xx_pmu_probe()
329 	if (!pmu)  in jh71xx_pmu_probe()
332 	pmu->base = devm_platform_ioremap_resource(pdev, 0);  in jh71xx_pmu_probe()
333 	if (IS_ERR(pmu->base))  in jh71xx_pmu_probe()
334 		return PTR_ERR(pmu->base);  in jh71xx_pmu_probe()
336 	spin_lock_init(&pmu->lock);  in jh71xx_pmu_probe()
343 		ret = match_data->pmu_parse_irq(pdev, pmu);  in jh71xx_pmu_probe()
350 	pmu->genpd = devm_kcalloc(dev, match_data->num_domains,  in jh71xx_pmu_probe()
353 	if (!pmu->genpd)  in jh71xx_pmu_probe()
356 	pmu->dev = dev;  in jh71xx_pmu_probe()
357 	pmu->match_data = match_data;  in jh71xx_pmu_probe()
358 	pmu->genpd_data.domains = pmu->genpd;  in jh71xx_pmu_probe()
359 	pmu->genpd_data.num_domains = match_data->num_domains;  in jh71xx_pmu_probe()
362 		ret = jh71xx_pmu_init_domain(pmu, i);  in jh71xx_pmu_probe()
369 	ret = of_genpd_add_provider_onecell(np, &pmu->genpd_data);  in jh71xx_pmu_probe()