Lines Matching refs:cpr_write
257 static void cpr_write(struct cpr_drv *drv, u32 offset, u32 value) in cpr_write() function
280 cpr_write(drv, REG_RBIF_IRQ_CLEAR, CPR_INT_ALL); in cpr_irq_clr()
286 cpr_write(drv, REG_RBIF_CONT_NACK_CMD, 1); in cpr_irq_clr_nack()
292 cpr_write(drv, REG_RBIF_CONT_ACK_CMD, 1); in cpr_irq_clr_ack()
297 cpr_write(drv, REG_RBIF_IRQ_EN(0), int_bits); in cpr_irq_set()
337 cpr_write(drv, REG_RBIF_CONT_ACK_CMD, 1); in cpr_ctl_disable()
338 cpr_write(drv, REG_RBIF_CONT_NACK_CMD, 1); in cpr_ctl_disable()
378 cpr_write(drv, REG_RBCPR_STEP_QUOT, step_quot); in cpr_corner_restore()
382 cpr_write(drv, REG_RBCPR_GCNT_TARGET(i), 0); in cpr_corner_restore()
384 cpr_write(drv, REG_RBCPR_GCNT_TARGET(ro_sel), gcnt); in cpr_corner_restore()
386 cpr_write(drv, REG_RBCPR_CTL, ctl); in cpr_corner_restore()
688 cpr_write(drv, REG_RBIF_IRQ_EN(0), 0); in cpr_config()
689 cpr_write(drv, REG_RBCPR_CTL, 0); in cpr_config()
695 cpr_write(drv, REG_RBIF_LIMIT, val); in cpr_config()
696 cpr_write(drv, REG_RBIF_SW_VLEVEL, RBIF_SW_VLEVEL_DEFAULT); in cpr_config()
703 cpr_write(drv, REG_RBCPR_GCNT_TARGET(i), 0); in cpr_config()
713 cpr_write(drv, REG_RBCPR_TIMER_INTERVAL, val); in cpr_config()
721 cpr_write(drv, REG_RBIF_TIMER_ADJUST, val); in cpr_config()
728 cpr_write(drv, REG_RBCPR_CTL, val); in cpr_config()