86 	regmap_clear_bits(scpsys->base, pd->data->ctl_offs, pd->data->sram_pdn_bits);  in scpsys_sram_enable()
89 	ret = regmap_read_poll_timeout(scpsys->base, pd->data->ctl_offs, tmp,  in scpsys_sram_enable()
95 		regmap_set_bits(scpsys->base, pd->data->ctl_offs, PWR_SRAM_ISOINT_B_BIT);  in scpsys_sram_enable()
97 		regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_SRAM_CLKISO_BIT);  in scpsys_sram_enable()
110 		regmap_set_bits(scpsys->base, pd->data->ctl_offs, PWR_SRAM_CLKISO_BIT);  in scpsys_sram_disable()
112 		regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_SRAM_ISOINT_B_BIT);  in scpsys_sram_disable()
115 	regmap_set_bits(scpsys->base, pd->data->ctl_offs, pd->data->sram_pdn_bits);  in scpsys_sram_disable()
118 	return regmap_read_poll_timeout(scpsys->base, pd->data->ctl_offs, tmp,  in scpsys_sram_disable()
253 	regmap_set_bits(scpsys->base, pd->data->ctl_offs, PWR_ON_BIT);  in scpsys_power_on()
254 	regmap_set_bits(scpsys->base, pd->data->ctl_offs, PWR_ON_2ND_BIT);  in scpsys_power_on()
262 	regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_CLK_DIS_BIT);  in scpsys_power_on()
263 	regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_ISO_BIT);  in scpsys_power_on()
264 	regmap_set_bits(scpsys->base, pd->data->ctl_offs, PWR_RST_B_BIT);  in scpsys_power_on()
332 	regmap_set_bits(scpsys->base, pd->data->ctl_offs, PWR_ISO_BIT);  in scpsys_power_off()
333 	regmap_set_bits(scpsys->base, pd->data->ctl_offs, PWR_CLK_DIS_BIT);  in scpsys_power_off()
334 	regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_RST_B_BIT);  in scpsys_power_off()
335 	regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_ON_2ND_BIT);  in scpsys_power_off()
336 	regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_ON_BIT);  in scpsys_power_off()