Lines Matching +full:imx7d +full:- +full:pcie
1 // SPDX-License-Identifier: GPL-2.0+
8 * Copyright 2015-2017 Pengutronix, Lucas Stach <kernel@pengutronix.de>
20 #include <dt-bindings/power/imx7-power.h>
21 #include <dt-bindings/power/imx8mq-power.h>
22 #include <dt-bindings/power/imx8mm-power.h>
23 #include <dt-bindings/power/imx8mn-power.h>
24 #include <dt-bindings/power/imx8mp-power.h>
322 ret = pm_runtime_get_sync(domain->dev); in imx_pgc_power_up()
324 pm_runtime_put_noidle(domain->dev); in imx_pgc_power_up()
328 if (!IS_ERR(domain->regulator)) { in imx_pgc_power_up()
329 ret = regulator_enable(domain->regulator); in imx_pgc_power_up()
331 dev_err(domain->dev, in imx_pgc_power_up()
338 reset_control_assert(domain->reset); in imx_pgc_power_up()
341 ret = clk_bulk_prepare_enable(domain->num_clks, domain->clks); in imx_pgc_power_up()
343 dev_err(domain->dev, "failed to enable reset clocks\n"); in imx_pgc_power_up()
350 if (domain->bits.pxx) { in imx_pgc_power_up()
352 regmap_update_bits(domain->regmap, domain->regs->pup, in imx_pgc_power_up()
353 domain->bits.pxx, domain->bits.pxx); in imx_pgc_power_up()
358 ret = regmap_read_poll_timeout(domain->regmap, in imx_pgc_power_up()
359 domain->regs->pup, reg_val, in imx_pgc_power_up()
360 !(reg_val & domain->bits.pxx), in imx_pgc_power_up()
363 dev_err(domain->dev, "failed to command PGC\n"); in imx_pgc_power_up()
368 for_each_set_bit(pgc, &domain->pgc, 32) { in imx_pgc_power_up()
369 regmap_clear_bits(domain->regmap, GPC_PGC_CTRL(pgc), in imx_pgc_power_up()
377 reset_control_deassert(domain->reset); in imx_pgc_power_up()
380 if (domain->bits.hskreq) { in imx_pgc_power_up()
381 regmap_update_bits(domain->regmap, domain->regs->hsk, in imx_pgc_power_up()
382 domain->bits.hskreq, domain->bits.hskreq); in imx_pgc_power_up()
385 * ret = regmap_read_poll_timeout(domain->regmap, domain->regs->hsk, reg_val, in imx_pgc_power_up()
386 * (reg_val & domain->bits.hskack), 0, in imx_pgc_power_up()
389 * the BLK-CTL module BUS clk-en bit being set. in imx_pgc_power_up()
391 * There is a separate BLK-CTL module and we will have such a driver for it, in imx_pgc_power_up()
392 * that driver will set the BUS clk-en bit and handshake will be triggered in imx_pgc_power_up()
398 * For some BLK-CTL module (eg. AudioMix on i.MX8MP) doesn't have BUS in imx_pgc_power_up()
399 * clk-en bit, it is better to add delay here, as the BLK-CTL module in imx_pgc_power_up()
405 regmap_read_bypassed(domain->regmap, domain->regs->hsk, ®_val); in imx_pgc_power_up()
410 if (!domain->keep_clocks) in imx_pgc_power_up()
411 clk_bulk_disable_unprepare(domain->num_clks, domain->clks); in imx_pgc_power_up()
416 clk_bulk_disable_unprepare(domain->num_clks, domain->clks); in imx_pgc_power_up()
418 if (!IS_ERR(domain->regulator)) in imx_pgc_power_up()
419 regulator_disable(domain->regulator); in imx_pgc_power_up()
421 pm_runtime_put(domain->dev); in imx_pgc_power_up()
433 if (!domain->keep_clocks) { in imx_pgc_power_down()
434 ret = clk_bulk_prepare_enable(domain->num_clks, domain->clks); in imx_pgc_power_down()
436 dev_err(domain->dev, "failed to enable reset clocks\n"); in imx_pgc_power_down()
442 if (domain->bits.hskreq) { in imx_pgc_power_down()
443 regmap_clear_bits(domain->regmap, domain->regs->hsk, in imx_pgc_power_down()
444 domain->bits.hskreq); in imx_pgc_power_down()
446 ret = regmap_read_poll_timeout(domain->regmap, domain->regs->hsk, in imx_pgc_power_down()
448 !(reg_val & domain->bits.hskack), in imx_pgc_power_down()
451 dev_err(domain->dev, "failed to power down ADB400\n"); in imx_pgc_power_down()
456 if (domain->bits.pxx) { in imx_pgc_power_down()
458 for_each_set_bit(pgc, &domain->pgc, 32) { in imx_pgc_power_down()
459 regmap_update_bits(domain->regmap, GPC_PGC_CTRL(pgc), in imx_pgc_power_down()
464 regmap_update_bits(domain->regmap, domain->regs->pdn, in imx_pgc_power_down()
465 domain->bits.pxx, domain->bits.pxx); in imx_pgc_power_down()
470 ret = regmap_read_poll_timeout(domain->regmap, in imx_pgc_power_down()
471 domain->regs->pdn, reg_val, in imx_pgc_power_down()
472 !(reg_val & domain->bits.pxx), in imx_pgc_power_down()
475 dev_err(domain->dev, "failed to command PGC\n"); in imx_pgc_power_down()
481 clk_bulk_disable_unprepare(domain->num_clks, domain->clks); in imx_pgc_power_down()
483 if (!IS_ERR(domain->regulator)) { in imx_pgc_power_down()
484 ret = regulator_disable(domain->regulator); in imx_pgc_power_down()
486 dev_err(domain->dev, in imx_pgc_power_down()
493 pm_runtime_put_sync_suspend(domain->dev); in imx_pgc_power_down()
498 if (!domain->keep_clocks) in imx_pgc_power_down()
499 clk_bulk_disable_unprepare(domain->num_clks, domain->clks); in imx_pgc_power_down()
507 .name = "mipi-phy",
519 .name = "pcie-phy",
531 .name = "usb-hsic-phy",
597 .name = "usb-otg1",
608 .name = "usb-otg2",
670 .name = "mipi-csi1",
681 .name = "mipi-csi2",
757 .name = "pcie",
768 .name = "usb-otg1",
780 .name = "usb-otg2",
833 .name = "vpu-g1",
844 .name = "vpu-g2",
855 .name = "vpu-h1",
937 .name = "mipi-phy1",
948 .name = "pcie-phy1",
959 .name = "usb-otg1",
970 .name = "usb-otg2",
1073 .name = "vpu-g1",
1084 .name = "vpu-g2",
1095 .name = "vpu-h1",
1120 .name = "hdmi-phy",
1131 .name = "mipi-phy2",
1156 .name = "mediamix-isp-dwp",
1247 .name = "usb-otg1",
1326 struct imx_pgc_domain *domain = pdev->dev.platform_data; in imx_pgc_domain_probe()
1329 domain->dev = &pdev->dev; in imx_pgc_domain_probe()
1331 domain->regulator = devm_regulator_get_optional(domain->dev, "power"); in imx_pgc_domain_probe()
1332 if (IS_ERR(domain->regulator)) { in imx_pgc_domain_probe()
1333 if (PTR_ERR(domain->regulator) != -ENODEV) in imx_pgc_domain_probe()
1334 return dev_err_probe(domain->dev, PTR_ERR(domain->regulator), in imx_pgc_domain_probe()
1336 } else if (domain->voltage) { in imx_pgc_domain_probe()
1337 regulator_set_voltage(domain->regulator, in imx_pgc_domain_probe()
1338 domain->voltage, domain->voltage); in imx_pgc_domain_probe()
1341 domain->num_clks = devm_clk_bulk_get_all(domain->dev, &domain->clks); in imx_pgc_domain_probe()
1342 if (domain->num_clks < 0) in imx_pgc_domain_probe()
1343 return dev_err_probe(domain->dev, domain->num_clks, in imx_pgc_domain_probe()
1346 domain->reset = devm_reset_control_array_get_optional_exclusive(domain->dev); in imx_pgc_domain_probe()
1347 if (IS_ERR(domain->reset)) in imx_pgc_domain_probe()
1348 return dev_err_probe(domain->dev, PTR_ERR(domain->reset), in imx_pgc_domain_probe()
1351 pm_runtime_enable(domain->dev); in imx_pgc_domain_probe()
1353 if (domain->bits.map) in imx_pgc_domain_probe()
1354 regmap_update_bits(domain->regmap, domain->regs->map, in imx_pgc_domain_probe()
1355 domain->bits.map, domain->bits.map); in imx_pgc_domain_probe()
1357 ret = pm_genpd_init(&domain->genpd, NULL, true); in imx_pgc_domain_probe()
1359 dev_err(domain->dev, "Failed to init power domain\n"); in imx_pgc_domain_probe()
1364 of_property_read_bool(domain->dev->of_node, "power-domains")) in imx_pgc_domain_probe()
1365 lockdep_set_subclass(&domain->genpd.mlock, 1); in imx_pgc_domain_probe()
1367 ret = of_genpd_add_provider_simple(domain->dev->of_node, in imx_pgc_domain_probe()
1368 &domain->genpd); in imx_pgc_domain_probe()
1370 dev_err(domain->dev, "Failed to add genpd provider\n"); in imx_pgc_domain_probe()
1377 pm_genpd_remove(&domain->genpd); in imx_pgc_domain_probe()
1379 if (domain->bits.map) in imx_pgc_domain_probe()
1380 regmap_update_bits(domain->regmap, domain->regs->map, in imx_pgc_domain_probe()
1381 domain->bits.map, 0); in imx_pgc_domain_probe()
1382 pm_runtime_disable(domain->dev); in imx_pgc_domain_probe()
1389 struct imx_pgc_domain *domain = pdev->dev.platform_data; in imx_pgc_domain_remove()
1391 of_genpd_del_provider(domain->dev->of_node); in imx_pgc_domain_remove()
1392 pm_genpd_remove(&domain->genpd); in imx_pgc_domain_remove()
1394 if (domain->bits.map) in imx_pgc_domain_remove()
1395 regmap_update_bits(domain->regmap, domain->regs->map, in imx_pgc_domain_remove()
1396 domain->bits.map, 0); in imx_pgc_domain_remove()
1398 pm_runtime_disable(domain->dev); in imx_pgc_domain_remove()
1432 { "imx-pgc-domain", },
1438 .name = "imx-pgc",
1450 of_device_get_match_data(&pdev->dev); in builtin_platform_driver()
1456 .rd_table = domain_data->reg_access_table, in builtin_platform_driver()
1457 .wr_table = domain_data->reg_access_table, in builtin_platform_driver()
1460 struct device *dev = &pdev->dev; in builtin_platform_driver()
1466 pgc_np = of_get_child_by_name(dev->of_node, "pgc"); in builtin_platform_driver()
1469 return -EINVAL; in builtin_platform_driver()
1497 if (domain_index >= domain_data->domains_num) { in builtin_platform_driver()
1504 pd_pdev = platform_device_alloc("imx-pgc-domain", in builtin_platform_driver()
1508 return -ENOMEM; in builtin_platform_driver()
1512 &domain_data->domains[domain_index], in builtin_platform_driver()
1513 sizeof(domain_data->domains[domain_index])); in builtin_platform_driver()
1519 domain = pd_pdev->dev.platform_data; in builtin_platform_driver()
1520 domain->regmap = regmap; in builtin_platform_driver()
1521 domain->regs = domain_data->pgc_regs; in builtin_platform_driver()
1523 domain->genpd.power_on = imx_pgc_power_up; in builtin_platform_driver()
1524 domain->genpd.power_off = imx_pgc_power_down; in builtin_platform_driver()
1526 pd_pdev->dev.parent = dev; in builtin_platform_driver()
1527 device_set_node(&pd_pdev->dev, of_fwnode_handle(np)); in builtin_platform_driver()
1540 { .compatible = "fsl,imx7d-gpc", .data = &imx7_pgc_domain_data, },
1541 { .compatible = "fsl,imx8mm-gpc", .data = &imx8mm_pgc_domain_data, },
1542 { .compatible = "fsl,imx8mn-gpc", .data = &imx8mn_pgc_domain_data, },
1543 { .compatible = "fsl,imx8mp-gpc", .data = &imx8mp_pgc_domain_data, },
1544 { .compatible = "fsl,imx8mq-gpc", .data = &imx8m_pgc_domain_data, },
1550 .name = "imx-gpcv2",