75 	bool (*is_powered_off)(struct meson_ee_pwrc_domain *pwrc_domain);
271 static bool pwrc_ee_is_powered_off(struct meson_ee_pwrc_domain *pwrc_domain);
349 static bool pwrc_ee_is_powered_off(struct meson_ee_pwrc_domain *pwrc_domain)  in pwrc_ee_is_powered_off()  argument
353 	regmap_read(pwrc_domain->pwrc->regmap_ao,  in pwrc_ee_is_powered_off()
354 		    pwrc_domain->desc.top_pd->sleep_reg, &reg);  in pwrc_ee_is_powered_off()
356 	return (reg & pwrc_domain->desc.top_pd->sleep_mask);  in pwrc_ee_is_powered_off()
361 	struct meson_ee_pwrc_domain *pwrc_domain =  in meson_ee_pwrc_off()  local
365 	if (pwrc_domain->desc.top_pd)  in meson_ee_pwrc_off()
366 		regmap_update_bits(pwrc_domain->pwrc->regmap_ao,  in meson_ee_pwrc_off()
367 				   pwrc_domain->desc.top_pd->sleep_reg,  in meson_ee_pwrc_off()
368 				   pwrc_domain->desc.top_pd->sleep_mask,  in meson_ee_pwrc_off()
369 				   pwrc_domain->desc.top_pd->sleep_mask);  in meson_ee_pwrc_off()
372 	for (i = 0 ; i < pwrc_domain->desc.mem_pd_count ; ++i)  in meson_ee_pwrc_off()
373 		regmap_update_bits(pwrc_domain->pwrc->regmap_hhi,  in meson_ee_pwrc_off()
374 				   pwrc_domain->desc.mem_pd[i].reg,  in meson_ee_pwrc_off()
375 				   pwrc_domain->desc.mem_pd[i].mask,  in meson_ee_pwrc_off()
376 				   pwrc_domain->desc.mem_pd[i].mask);  in meson_ee_pwrc_off()
380 	if (pwrc_domain->desc.top_pd)  in meson_ee_pwrc_off()
381 		regmap_update_bits(pwrc_domain->pwrc->regmap_ao,  in meson_ee_pwrc_off()
382 				   pwrc_domain->desc.top_pd->iso_reg,  in meson_ee_pwrc_off()
383 				   pwrc_domain->desc.top_pd->iso_mask,  in meson_ee_pwrc_off()
384 				   pwrc_domain->desc.top_pd->iso_mask);  in meson_ee_pwrc_off()
386 	if (pwrc_domain->num_clks) {  in meson_ee_pwrc_off()
388 		clk_bulk_disable_unprepare(pwrc_domain->num_clks,  in meson_ee_pwrc_off()
389 					   pwrc_domain->clks);  in meson_ee_pwrc_off()
397 	struct meson_ee_pwrc_domain *pwrc_domain =  in meson_ee_pwrc_on()  local
401 	if (pwrc_domain->desc.top_pd)  in meson_ee_pwrc_on()
402 		regmap_update_bits(pwrc_domain->pwrc->regmap_ao,  in meson_ee_pwrc_on()
403 				   pwrc_domain->desc.top_pd->sleep_reg,  in meson_ee_pwrc_on()
404 				   pwrc_domain->desc.top_pd->sleep_mask, 0);  in meson_ee_pwrc_on()
407 	for (i = 0 ; i < pwrc_domain->desc.mem_pd_count ; ++i)  in meson_ee_pwrc_on()
408 		regmap_update_bits(pwrc_domain->pwrc->regmap_hhi,  in meson_ee_pwrc_on()
409 				   pwrc_domain->desc.mem_pd[i].reg,  in meson_ee_pwrc_on()
410 				   pwrc_domain->desc.mem_pd[i].mask, 0);  in meson_ee_pwrc_on()
414 	ret = reset_control_assert(pwrc_domain->rstc);  in meson_ee_pwrc_on()
418 	if (pwrc_domain->desc.top_pd)  in meson_ee_pwrc_on()
419 		regmap_update_bits(pwrc_domain->pwrc->regmap_ao,  in meson_ee_pwrc_on()
420 				   pwrc_domain->desc.top_pd->iso_reg,  in meson_ee_pwrc_on()
421 				   pwrc_domain->desc.top_pd->iso_mask, 0);  in meson_ee_pwrc_on()
423 	ret = reset_control_deassert(pwrc_domain->rstc);  in meson_ee_pwrc_on()
427 	return clk_bulk_prepare_enable(pwrc_domain->num_clks,  in meson_ee_pwrc_on()
428 				       pwrc_domain->clks);  in meson_ee_pwrc_on()