53 		 its_mode->power_control.stt_skin_temp[STT_TEMP_APU]);  in amd_pmf_dump_auto_mode_defaults()
55 		 its_mode->power_control.stt_skin_temp[STT_TEMP_HS2]);  in amd_pmf_dump_auto_mode_defaults()
56 	pr_debug("stt_min_limit_perf_on_lap: %u mW\n", its_mode->power_control.stt_min);  in amd_pmf_dump_auto_mode_defaults()
59 	pr_debug("stt_apu_perf: %u C\n", its_mode->power_control.stt_skin_temp[STT_TEMP_APU]);  in amd_pmf_dump_auto_mode_defaults()
60 	pr_debug("stt_hs2_perf: %u C\n", its_mode->power_control.stt_skin_temp[STT_TEMP_HS2]);  in amd_pmf_dump_auto_mode_defaults()
61 	pr_debug("stt_min_limit_perf: %u mW\n", its_mode->power_control.stt_min);  in amd_pmf_dump_auto_mode_defaults()
64 	pr_debug("stt_apu_balanced: %u C\n", its_mode->power_control.stt_skin_temp[STT_TEMP_APU]);  in amd_pmf_dump_auto_mode_defaults()
65 	pr_debug("stt_hs2_balanced: %u C\n", its_mode->power_control.stt_skin_temp[STT_TEMP_HS2]);  in amd_pmf_dump_auto_mode_defaults()
66 	pr_debug("stt_min_limit_balanced: %u mW\n", its_mode->power_control.stt_min);  in amd_pmf_dump_auto_mode_defaults()
69 	pr_debug("stt_apu_quiet: %u C\n", its_mode->power_control.stt_skin_temp[STT_TEMP_APU]);  in amd_pmf_dump_auto_mode_defaults()
70 	pr_debug("stt_hs2_quiet: %u C\n", its_mode->power_control.stt_skin_temp[STT_TEMP_HS2]);  in amd_pmf_dump_auto_mode_defaults()
71 	pr_debug("stt_min_limit_quiet: %u mW\n", its_mode->power_control.stt_min);  in amd_pmf_dump_auto_mode_defaults()
75 	pr_debug("fppt_perf_on_lap: %u mW\n", its_mode->power_control.fppt);  in amd_pmf_dump_auto_mode_defaults()
76 	pr_debug("sppt_perf_on_lap: %u mW\n", its_mode->power_control.sppt);  in amd_pmf_dump_auto_mode_defaults()
77 	pr_debug("spl_perf_on_lap: %u mW\n", its_mode->power_control.spl);  in amd_pmf_dump_auto_mode_defaults()
78 	pr_debug("sppt_apu_only_perf_on_lap: %u mW\n", its_mode->power_control.sppt_apu_only);  in amd_pmf_dump_auto_mode_defaults()
81 	pr_debug("fppt_perf: %u mW\n", its_mode->power_control.fppt);  in amd_pmf_dump_auto_mode_defaults()
82 	pr_debug("sppt_perf: %u mW\n", its_mode->power_control.sppt);  in amd_pmf_dump_auto_mode_defaults()
83 	pr_debug("spl_perf: %u mW\n", its_mode->power_control.spl);  in amd_pmf_dump_auto_mode_defaults()
84 	pr_debug("sppt_apu_only_perf: %u mW\n", its_mode->power_control.sppt_apu_only);  in amd_pmf_dump_auto_mode_defaults()
87 	pr_debug("fppt_balanced: %u mW\n", its_mode->power_control.fppt);  in amd_pmf_dump_auto_mode_defaults()
88 	pr_debug("sppt_balanced: %u mW\n", its_mode->power_control.sppt);  in amd_pmf_dump_auto_mode_defaults()
89 	pr_debug("spl_balanced: %u mW\n", its_mode->power_control.spl);  in amd_pmf_dump_auto_mode_defaults()
90 	pr_debug("sppt_apu_only_balanced: %u mW\n", its_mode->power_control.sppt_apu_only);  in amd_pmf_dump_auto_mode_defaults()
93 	pr_debug("fppt_quiet: %u mW\n", its_mode->power_control.fppt);  in amd_pmf_dump_auto_mode_defaults()
94 	pr_debug("sppt_quiet: %u mW\n", its_mode->power_control.sppt);  in amd_pmf_dump_auto_mode_defaults()
95 	pr_debug("spl_quiet: %u mW\n", its_mode->power_control.spl);  in amd_pmf_dump_auto_mode_defaults()
96 	pr_debug("sppt_apu_only_quiet: %u mW\n", its_mode->power_control.sppt_apu_only);  in amd_pmf_dump_auto_mode_defaults()
115 	struct power_table_control *pwr_ctrl = &config_store.mode_set[idx].power_control;  in amd_pmf_set_automode()
339 	pwr_ctrl = &config_store.mode_set[AUTO_QUIET].power_control;  in amd_pmf_load_defaults_auto_mode()
348 	pwr_ctrl = &config_store.mode_set[AUTO_BALANCE].power_control;  in amd_pmf_load_defaults_auto_mode()
357 	pwr_ctrl = &config_store.mode_set[AUTO_PERFORMANCE].power_control;  in amd_pmf_load_defaults_auto_mode()
366 	pwr_ctrl = &config_store.mode_set[AUTO_PERFORMANCE_ON_LAP].power_control;  in amd_pmf_load_defaults_auto_mode()