1 // SPDX-License-Identifier: GPL-2.0-or-later
8  * Author: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
100 	{"DISPLAY",     BIT(0)},
128 	{"DISPLAY",	BIT(0)},
160 	return ioread32(dev->regbase + reg_offset);  in amd_pmc_reg_read()
165 	iowrite32(val, dev->regbase + reg_offset);  in amd_pmc_reg_write()
187 	switch (dev->cpu_id) {  in amd_pmc_get_ip_info()
192 		dev->num_ips = 12;  in amd_pmc_get_ip_info()
193 		dev->ips_ptr = soc15_ip_blk;  in amd_pmc_get_ip_info()
194 		dev->smu_msg = 0x538;  in amd_pmc_get_ip_info()
197 		dev->num_ips = 21;  in amd_pmc_get_ip_info()
198 		dev->ips_ptr = soc15_ip_blk;  in amd_pmc_get_ip_info()
199 		dev->smu_msg = 0x538;  in amd_pmc_get_ip_info()
204 			dev->num_ips = ARRAY_SIZE(soc15_ip_blk_v2);  in amd_pmc_get_ip_info()
205 			dev->ips_ptr = soc15_ip_blk_v2;  in amd_pmc_get_ip_info()
207 			dev->num_ips = ARRAY_SIZE(soc15_ip_blk);  in amd_pmc_get_ip_info()
208 			dev->ips_ptr = soc15_ip_blk;  in amd_pmc_get_ip_info()
210 		dev->smu_msg = 0x938;  in amd_pmc_get_ip_info()
217 	if (dev->cpu_id == AMD_CPU_ID_PCO) {  in amd_pmc_setup_smu_logging()
218 		dev_warn_once(dev->dev, "SMU debugging info not supported on this platform\n");  in amd_pmc_setup_smu_logging()
219 		return -EINVAL;  in amd_pmc_setup_smu_logging()
223 	if (!dev->active_ips)  in amd_pmc_setup_smu_logging()
224 		amd_pmc_send_cmd(dev, 0, &dev->active_ips, SMU_MSG_GET_SUP_CONSTRAINTS, true);  in amd_pmc_setup_smu_logging()
227 	if (!dev->smu_virt_addr) {  in amd_pmc_setup_smu_logging()
235 		dev->smu_virt_addr = devm_ioremap(dev->dev, smu_phys_addr,  in amd_pmc_setup_smu_logging()
237 		if (!dev->smu_virt_addr)  in amd_pmc_setup_smu_logging()
238 			return -ENOMEM;  in amd_pmc_setup_smu_logging()
250 	if (!pdev->smu_virt_addr) {  in get_metrics_table()
257 	if (pdev->cpu_id == AMD_CPU_ID_PCO)  in get_metrics_table()
258 		return -ENODEV;  in get_metrics_table()
259 	memcpy_fromio(table, pdev->smu_virt_addr, sizeof(struct smu_metrics));  in get_metrics_table()
271 		dev_warn(pdev->dev, "Last suspend didn't reach deepest state\n");  in amd_pmc_validate_deepest()
281 	if (dev->cpu_id == AMD_CPU_ID_PCO)  in amd_pmc_get_smu_version()
282 		return -ENODEV;  in amd_pmc_get_smu_version()
288 	dev->smu_program = (val >> 24) & GENMASK(7, 0);  in amd_pmc_get_smu_version()
289 	dev->major = (val >> 16) & GENMASK(7, 0);  in amd_pmc_get_smu_version()
290 	dev->minor = (val >> 8) & GENMASK(7, 0);  in amd_pmc_get_smu_version()
291 	dev->rev = (val >> 0) & GENMASK(7, 0);  in amd_pmc_get_smu_version()
293 	dev_dbg(dev->dev, "SMU program %u version is %u.%u.%u\n",  in amd_pmc_get_smu_version()
294 		dev->smu_program, dev->major, dev->minor, dev->rev);  in amd_pmc_get_smu_version()
304 	if (!dev->major) {  in smu_fw_version_show()
310 	return sysfs_emit(buf, "%u.%u.%u\n", dev->major, dev->minor, dev->rev);  in smu_fw_version_show()
318 	if (!dev->major) {  in smu_program_show()
324 	return sysfs_emit(buf, "%u\n", dev->smu_program);  in smu_program_show()
335 	if (pdev->cpu_id == AMD_CPU_ID_PCO)  in pmc_attr_is_visible()
358 	struct amd_pmc_dev *dev = s->private;  in smu_fw_info_show()
363 		return -EINVAL;  in smu_fw_info_show()
367 	seq_printf(s, "Hint Count: %d\n", table.hint_count);  in smu_fw_info_show()
376 	for (idx = 0 ; idx < dev->num_ips ; idx++) {  in smu_fw_info_show()
377 		if (dev->ips_ptr[idx].bit_mask & dev->active_ips)  in smu_fw_info_show()
378 			seq_printf(s, "%-8s : %lld\n", dev->ips_ptr[idx].name,  in smu_fw_info_show()
388 	struct amd_pmc_dev *dev = s->private;  in s0ix_stats_show()
392 	if (!dev->fch_virt_addr) {  in s0ix_stats_show()
397 		dev->fch_virt_addr = devm_ioremap(dev->dev, fch_phys_addr, FCH_SSC_MAPPING_SIZE);  in s0ix_stats_show()
398 		if (!dev->fch_virt_addr)  in s0ix_stats_show()
399 			return -ENOMEM;  in s0ix_stats_show()
402 	entry_time = ioread32(dev->fch_virt_addr + FCH_S0I3_ENTRY_TIME_H_OFFSET);  in s0ix_stats_show()
403 	entry_time = entry_time << 32 | ioread32(dev->fch_virt_addr + FCH_S0I3_ENTRY_TIME_L_OFFSET);  in s0ix_stats_show()
405 	exit_time = ioread32(dev->fch_virt_addr + FCH_S0I3_EXIT_TIME_H_OFFSET);  in s0ix_stats_show()
406 	exit_time = exit_time << 32 | ioread32(dev->fch_virt_addr + FCH_S0I3_EXIT_TIME_L_OFFSET);  in s0ix_stats_show()
409 	residency = exit_time - entry_time;  in s0ix_stats_show()
427 	switch (pdev->cpu_id) {  in amd_pmc_idlemask_read()
430 		if (!pdev->major) {  in amd_pmc_idlemask_read()
435 		if (pdev->major > 56 || (pdev->major >= 55 && pdev->minor >= 37))  in amd_pmc_idlemask_read()
438 			return -EINVAL;  in amd_pmc_idlemask_read()
450 		return -EINVAL;  in amd_pmc_idlemask_read()
464 	return amd_pmc_idlemask_read(s->private, NULL, s);  in amd_pmc_idlemask_show()
470 	debugfs_remove_recursive(dev->dbgfs_dir);  in amd_pmc_dbgfs_unregister()
475 	dev->dbgfs_dir = debugfs_create_dir("amd_pmc", NULL);  in amd_pmc_dbgfs_register()
476 	debugfs_create_file("smu_fw_info", 0644, dev->dbgfs_dir, dev,  in amd_pmc_dbgfs_register()
478 	debugfs_create_file("s0ix_stats", 0644, dev->dbgfs_dir, dev,  in amd_pmc_dbgfs_register()
480 	debugfs_create_file("amd_pmc_idlemask", 0644, dev->dbgfs_dir, dev,  in amd_pmc_dbgfs_register()
486 	switch (dev->msg_port) {  in amd_pmc_get_msg_port()
500 	if (dev->msg_port == MSG_PORT_S2D) {  in amd_pmc_dump_registers()
501 		message = dev->stb_arg.msg;  in amd_pmc_dump_registers()
502 		argument = dev->stb_arg.arg;  in amd_pmc_dump_registers()
503 		response = dev->stb_arg.resp;  in amd_pmc_dump_registers()
505 		message = dev->smu_msg;  in amd_pmc_dump_registers()
511 	dev_dbg(dev->dev, "AMD_%s_REGISTER_RESPONSE:%x\n", amd_pmc_get_msg_port(dev), value);  in amd_pmc_dump_registers()
514 	dev_dbg(dev->dev, "AMD_%s_REGISTER_ARGUMENT:%x\n", amd_pmc_get_msg_port(dev), value);  in amd_pmc_dump_registers()
517 	dev_dbg(dev->dev, "AMD_%s_REGISTER_MESSAGE:%x\n", amd_pmc_get_msg_port(dev), value);  in amd_pmc_dump_registers()
525 	guard(mutex)(&dev->lock);  in amd_pmc_send_cmd()
527 	if (dev->msg_port == MSG_PORT_S2D) {  in amd_pmc_send_cmd()
528 		message = dev->stb_arg.msg;  in amd_pmc_send_cmd()
529 		argument = dev->stb_arg.arg;  in amd_pmc_send_cmd()
530 		response = dev->stb_arg.resp;  in amd_pmc_send_cmd()
532 		message = dev->smu_msg;  in amd_pmc_send_cmd()
538 	rc = readx_poll_timeout(ioread32, dev->regbase + response,  in amd_pmc_send_cmd()
542 		dev_err(dev->dev, "failed to talk to SMU\n");  in amd_pmc_send_cmd()
556 	rc = readx_poll_timeout(ioread32, dev->regbase + response,  in amd_pmc_send_cmd()
560 		dev_err(dev->dev, "SMU response timed out\n");  in amd_pmc_send_cmd()
573 		dev_err(dev->dev, "SMU not ready. err: 0x%x\n", val);  in amd_pmc_send_cmd()
574 		rc = -EBUSY;  in amd_pmc_send_cmd()
577 		dev_err(dev->dev, "SMU cmd unknown. err: 0x%x\n", val);  in amd_pmc_send_cmd()
578 		rc = -EINVAL;  in amd_pmc_send_cmd()
583 		dev_err(dev->dev, "SMU cmd failed. err: 0x%x\n", val);  in amd_pmc_send_cmd()
584 		rc = -EIO;  in amd_pmc_send_cmd()
594 	switch (dev->cpu_id) {  in amd_pmc_get_os_hint()
605 	return -EINVAL;  in amd_pmc_get_os_hint()
614 	if (pdev->cpu_id == AMD_CPU_ID_CZN) {  in amd_pmc_wa_irq1()
615 		if (!pdev->major) {  in amd_pmc_wa_irq1()
621 		if (pdev->major > 64 || (pdev->major == 64 && pdev->minor > 65))  in amd_pmc_wa_irq1()
647 	if (!pdev->major) {  in amd_pmc_verify_czn_rtc()
653 	if (pdev->major < 64 || (pdev->major == 64 && pdev->minor < 53))  in amd_pmc_verify_czn_rtc()
663 		dev_dbg(pdev->dev, "alarm not enabled\n");  in amd_pmc_verify_czn_rtc()
671 	duration = then-now;  in amd_pmc_verify_czn_rtc()
677 	/* will be stored in upper 16 bits of s0i3 hint argument,  in amd_pmc_verify_czn_rtc()
681 		return -EINVAL;  in amd_pmc_verify_czn_rtc()
697 	/* Reset and Start SMU logging - to monitor the s0i3 stats */  in amd_pmc_s2idle_prepare()
701 	if (pdev->cpu_id == AMD_CPU_ID_CZN && !disable_workarounds) {  in amd_pmc_s2idle_prepare()
704 			dev_err(pdev->dev, "failed to set RTC: %d\n", rc);  in amd_pmc_s2idle_prepare()
712 		dev_err(pdev->dev, "suspend failed: %d\n", rc);  in amd_pmc_s2idle_prepare()
718 		dev_err(pdev->dev, "error writing to STB: %d\n", rc);  in amd_pmc_s2idle_prepare()
728 	if (pdev->cpu_id == AMD_CPU_ID_CZN && !get_metrics_table(pdev, &table) &&  in amd_pmc_s2idle_check()
733 	amd_pmc_idlemask_read(pdev, pdev->dev, NULL);  in amd_pmc_s2idle_check()
737 		dev_err(pdev->dev, "error writing to STB: %d\n", rc);  in amd_pmc_s2idle_check()
742 	if (pdev->cpu_id == AMD_CPU_ID_PCO)  in amd_pmc_dump_data()
743 		return -ENODEV;  in amd_pmc_dump_data()
757 		dev_err(pdev->dev, "resume failed: %d\n", rc);  in amd_pmc_s2idle_restore()
764 		dev_err(pdev->dev, "error writing to STB: %d\n", rc);  in amd_pmc_s2idle_restore()
786 	if (pdev->disable_8042_wakeup && !disable_workarounds) {  in amd_pmc_suspend_handler()
790 			dev_err(pdev->dev, "failed to adjust keyboard wakeup: %d\n", rc);  in amd_pmc_suspend_handler()
825 	dev->dev = &pdev->dev;  in amd_pmc_probe()
829 		err = -ENODEV;  in amd_pmc_probe()
833 	dev->cpu_id = rdev->device;  in amd_pmc_probe()
835 	if (dev->cpu_id == AMD_CPU_ID_SP) {  in amd_pmc_probe()
836 		dev_warn_once(dev->dev, "S0i3 is not supported on this hardware\n");  in amd_pmc_probe()
837 		err = -ENODEV;  in amd_pmc_probe()
841 	dev->rdev = rdev;  in amd_pmc_probe()
844 		dev_err(dev->dev, "error reading 0x%x\n", AMD_PMC_BASE_ADDR_LO);  in amd_pmc_probe()
853 		dev_err(dev->dev, "error reading 0x%x\n", AMD_PMC_BASE_ADDR_HI);  in amd_pmc_probe()
861 	dev->regbase = devm_ioremap(dev->dev, base_addr + AMD_PMC_BASE_ADDR_OFFSET,  in amd_pmc_probe()
863 	if (!dev->regbase) {  in amd_pmc_probe()
864 		err = -ENOMEM;  in amd_pmc_probe()
868 	mutex_init(&dev->lock);  in amd_pmc_probe()
877 …	dev_warn(dev->dev, "failed to register LPS0 sleep handler, expect increased power consumption\n");  in amd_pmc_probe()
904 	pci_dev_put(dev->rdev);  in amd_pmc_remove()
907 	mutex_destroy(&dev->lock);  in amd_pmc_remove()