1 // SPDX-License-Identifier: GPL-2.0+
3  * Nvidia Data Processor Unit platform driver
80 #define MLXREG_DPU_NR_NONE				(-1)
83  * enum mlxreg_dpu_type - Data Processor Unit types
91 /* Default register access data. */
95 		.reg = MLXREG_DPU_REG_FPGA1_VER_OFFSET,
101 		.reg = MLXREG_DPU_REG_FPGA1_PN_OFFSET,
108 		.reg = MLXREG_DPU_REG_FPGA1_MVER_OFFSET,
114 		.reg = MLXREG_DPU_REG_RESET_GP1_OFFSET,
120 		.reg = MLXREG_DPU_REG_RESET_GP1_OFFSET,
126 		.reg = MLXREG_DPU_REG_RESET_GP1_OFFSET,
132 		.reg = MLXREG_DPU_REG_RESET_GP1_OFFSET,
138 		.reg = MLXREG_DPU_REG_RST_CAUSE1_OFFSET,
144 		.reg = MLXREG_DPU_REG_RST_CAUSE1_OFFSET,
150 		.reg = MLXREG_DPU_REG_RST_CAUSE1_OFFSET,
156 		.reg = MLXREG_DPU_REG_RST_CAUSE1_OFFSET,
162 		.reg = MLXREG_DPU_REG_RST_CAUSE1_OFFSET,
168 		.reg = MLXREG_DPU_REG_GP0_RO_OFFSET,
174 		.reg = MLXREG_DPU_REG_GP0_RO_OFFSET,
181 		.reg = MLXREG_DPU_REG_GP1_OFFSET,
187 		.reg = MLXREG_DPU_REG_GP4_OFFSET,
194 		.data = mlxreg_dpu_io_data,
198 /* Default hotplug data. */
202 		.reg = MLXREG_DPU_REG_PG_OFFSET,
208 		.reg = MLXREG_DPU_REG_PG_OFFSET,
214 		.reg = MLXREG_DPU_REG_PG_OFFSET,
220 		.reg = MLXREG_DPU_REG_PG_OFFSET,
226 		.reg = MLXREG_DPU_REG_PG_OFFSET,
232 		.reg = MLXREG_DPU_REG_PG_OFFSET,
238 		.reg = MLXREG_DPU_REG_PG_OFFSET,
244 		.reg = MLXREG_DPU_REG_PG_OFFSET,
253 		.reg = MLXREG_DPU_REG_HEALTH_OFFSET,
259 		.reg = MLXREG_DPU_REG_HEALTH_OFFSET,
265 		.reg = MLXREG_DPU_REG_HEALTH_OFFSET,
271 		.reg = MLXREG_DPU_REG_HEALTH_OFFSET,
277 		.reg = MLXREG_DPU_REG_HEALTH_OFFSET,
283 		.reg = MLXREG_DPU_REG_HEALTH_OFFSET,
291 		.data = mlxreg_dpu_power_events_items_data,
293 		.reg = MLXREG_DPU_REG_PG_OFFSET,
300 		.data = mlxreg_dpu_health_events_items_data,
302 		.reg = MLXREG_DPU_REG_HEALTH_OFFSET,
319  * struct mlxreg_dpu - device private data
321  * @data: platform core data
322  * @io_data: register access platform data
324  * @hotplug_data: hotplug platform data
329 	struct mlxreg_core_data *data;  member
336 static bool mlxreg_dpu_writeable_reg(struct device *dev, unsigned int reg)  in mlxreg_dpu_writeable_reg()  argument
338 	switch (reg) {  in mlxreg_dpu_writeable_reg()
354 static bool mlxreg_dpu_readable_reg(struct device *dev, unsigned int reg)  in mlxreg_dpu_readable_reg()  argument
356 	switch (reg) {  in mlxreg_dpu_readable_reg()
381 static bool mlxreg_dpu_volatile_reg(struct device *dev, unsigned int reg)  in mlxreg_dpu_volatile_reg()  argument
383 	switch (reg) {  in mlxreg_dpu_volatile_reg()
426 	mlxreg_dpu->hotplug_data = devm_kmemdup(dev, hotplug_data,  in mlxreg_dpu_copy_hotplug_data()
427 						sizeof(*mlxreg_dpu->hotplug_data), GFP_KERNEL);  in mlxreg_dpu_copy_hotplug_data()
428 	if (!mlxreg_dpu->hotplug_data)  in mlxreg_dpu_copy_hotplug_data()
429 		return -ENOMEM;  in mlxreg_dpu_copy_hotplug_data()
431 	mlxreg_dpu->hotplug_data->items = devm_kmemdup(dev, hotplug_data->items,  in mlxreg_dpu_copy_hotplug_data()
432 						       mlxreg_dpu->hotplug_data->count *  in mlxreg_dpu_copy_hotplug_data()
433 						       sizeof(*mlxreg_dpu->hotplug_data->items),  in mlxreg_dpu_copy_hotplug_data()
435 	if (!mlxreg_dpu->hotplug_data->items)  in mlxreg_dpu_copy_hotplug_data()
436 		return -ENOMEM;  in mlxreg_dpu_copy_hotplug_data()
438 	item = mlxreg_dpu->hotplug_data->items;  in mlxreg_dpu_copy_hotplug_data()
439 	for (i = 0; i < hotplug_data->count; i++, item++) {  in mlxreg_dpu_copy_hotplug_data()
440 		item->data = devm_kmemdup(dev, hotplug_data->items[i].data,  in mlxreg_dpu_copy_hotplug_data()
441 					  hotplug_data->items[i].count * sizeof(*item->data),  in mlxreg_dpu_copy_hotplug_data()
443 		if (!item->data)  in mlxreg_dpu_copy_hotplug_data()
444 			return -ENOMEM;  in mlxreg_dpu_copy_hotplug_data()
451 				  struct mlxreg_core_data *data, int irq)  in mlxreg_dpu_config_init()  argument
453 	struct device *dev = &data->hpdev.client->dev;  in mlxreg_dpu_config_init()
464 		/* Copy platform specific hotplug data. */  in mlxreg_dpu_config_init()
470 		mlxreg_dpu->io_data = &mlxreg_dpu_default_regs_io_data;  in mlxreg_dpu_config_init()
474 		return -ENODEV;  in mlxreg_dpu_config_init()
478 	if (mlxreg_dpu->io_data) {  in mlxreg_dpu_config_init()
479 		mlxreg_dpu->io_data->regmap = regmap;  in mlxreg_dpu_config_init()
480 		mlxreg_dpu->io_regs =  in mlxreg_dpu_config_init()
481 			platform_device_register_resndata(dev, "mlxreg-io",  in mlxreg_dpu_config_init()
482 							  data->slot, NULL, 0,  in mlxreg_dpu_config_init()
483 							  mlxreg_dpu->io_data,  in mlxreg_dpu_config_init()
484 							  sizeof(*mlxreg_dpu->io_data));  in mlxreg_dpu_config_init()
485 		if (IS_ERR(mlxreg_dpu->io_regs)) {  in mlxreg_dpu_config_init()
487 				data->hpdev.brdinfo->type, data->hpdev.nr,  in mlxreg_dpu_config_init()
488 				data->hpdev.brdinfo->addr);  in mlxreg_dpu_config_init()
489 			return PTR_ERR(mlxreg_dpu->io_regs);  in mlxreg_dpu_config_init()
494 	if (mlxreg_dpu->hotplug_data && irq) {  in mlxreg_dpu_config_init()
495 		mlxreg_dpu->hotplug_data->regmap = regmap;  in mlxreg_dpu_config_init()
496 		mlxreg_dpu->hotplug_data->irq = irq;  in mlxreg_dpu_config_init()
497 		mlxreg_dpu->hotplug =  in mlxreg_dpu_config_init()
498 			platform_device_register_resndata(dev, "mlxreg-hotplug",  in mlxreg_dpu_config_init()
499 							  data->slot, NULL, 0,  in mlxreg_dpu_config_init()
500 							  mlxreg_dpu->hotplug_data,  in mlxreg_dpu_config_init()
501 							  sizeof(*mlxreg_dpu->hotplug_data));  in mlxreg_dpu_config_init()
502 		if (IS_ERR(mlxreg_dpu->hotplug)) {  in mlxreg_dpu_config_init()
503 			err = PTR_ERR(mlxreg_dpu->hotplug);  in mlxreg_dpu_config_init()
511 	platform_device_unregister(mlxreg_dpu->io_regs);  in mlxreg_dpu_config_init()
518 	platform_device_unregister(mlxreg_dpu->hotplug);  in mlxreg_dpu_config_exit()
519 	platform_device_unregister(mlxreg_dpu->io_regs);  in mlxreg_dpu_config_exit()
524 	struct mlxreg_core_data *data;  in mlxreg_dpu_probe()  local
529 	data = dev_get_platdata(&pdev->dev);  in mlxreg_dpu_probe()
530 	if (!data || !data->hpdev.brdinfo)  in mlxreg_dpu_probe()
531 		return -EINVAL;  in mlxreg_dpu_probe()
533 	data->hpdev.adapter = i2c_get_adapter(data->hpdev.nr);  in mlxreg_dpu_probe()
534 	if (!data->hpdev.adapter)  in mlxreg_dpu_probe()
535 		return -EPROBE_DEFER;  in mlxreg_dpu_probe()
537 	mlxreg_dpu = devm_kzalloc(&pdev->dev, sizeof(*mlxreg_dpu), GFP_KERNEL);  in mlxreg_dpu_probe()
539 		err = -ENOMEM;  in mlxreg_dpu_probe()
544 	data->hpdev.client = i2c_new_client_device(data->hpdev.adapter,  in mlxreg_dpu_probe()
545 						   data->hpdev.brdinfo);  in mlxreg_dpu_probe()
546 	if (IS_ERR(data->hpdev.client)) {  in mlxreg_dpu_probe()
547 		dev_err(&pdev->dev, "Failed to create client %s at bus %d at addr 0x%02x\n",  in mlxreg_dpu_probe()
548 			data->hpdev.brdinfo->type, data->hpdev.nr, data->hpdev.brdinfo->addr);  in mlxreg_dpu_probe()
549 		err = PTR_ERR(data->hpdev.client);  in mlxreg_dpu_probe()
553 	regmap = devm_regmap_init_i2c(data->hpdev.client, &mlxreg_dpu_regmap_conf);  in mlxreg_dpu_probe()
555 		dev_err(&pdev->dev, "Failed to create regmap for client %s at bus %d at addr 0x%02x\n",  in mlxreg_dpu_probe()
556 			data->hpdev.brdinfo->type, data->hpdev.nr, data->hpdev.brdinfo->addr);  in mlxreg_dpu_probe()
565 		dev_err(&pdev->dev, "Failed to sync regmap for client %s at bus %d at addr 0x%02x\n",  in mlxreg_dpu_probe()
566 			data->hpdev.brdinfo->type, data->hpdev.nr, data->hpdev.brdinfo->addr);  in mlxreg_dpu_probe()
570 	mlxreg_dpu->data = data;  in mlxreg_dpu_probe()
571 	mlxreg_dpu->dev = &pdev->dev;  in mlxreg_dpu_probe()
574 	err = mlxreg_dpu_config_init(mlxreg_dpu, regmap, data, data->hpdev.brdinfo->irq);  in mlxreg_dpu_probe()
583 	i2c_unregister_device(data->hpdev.client);  in mlxreg_dpu_probe()
586 	i2c_put_adapter(data->hpdev.adapter);  in mlxreg_dpu_probe()
592 	struct mlxreg_core_data *data = dev_get_platdata(&pdev->dev);  in mlxreg_dpu_remove()  local
596 	i2c_unregister_device(data->hpdev.client);  in mlxreg_dpu_remove()
597 	i2c_put_adapter(data->hpdev.adapter);  in mlxreg_dpu_remove()
604 		.name = "mlxreg-dpu",
611 MODULE_DESCRIPTION("Nvidia Data Processor Unit platform driver");
613 MODULE_ALIAS("platform:mlxreg-dpu");