Lines Matching +full:dout +full:- +full:ports
1 // SPDX-License-Identifier: GPL-2.0
4 // Copyright (C) 2012-2015 Google, Inc
6 // This driver uses the ChromeOS EC byte-level message-based protocol for
55 * struct lpc_driver_data - driver data attached to a DMI device ID to indicate
72 * struct cros_ec_lpc - LPC device-specific data
77 * Returns a negative error code on error, or the 8-bit checksum
80 * Returns a negative error code on error, or the 8-bit checksum
145 offset - EC_HOST_CMD_REGION0,
164 offset - EC_HOST_CMD_REGION0,
181 dest[i] = readb(ec_lpc->base + offset - EC_HOST_CMD_REGION0 + i);
201 writeb(msg[i], ec_lpc->base + offset - EC_HOST_CMD_REGION0 + i);
217 ret = ec_lpc->read(ec_lpc, EC_LPC_ADDR_HOST_CMD, 1, &data);
231 struct cros_ec_lpc *ec_lpc = ec->priv;
235 u8 *dout;
242 ret = ec_lpc->write(ec_lpc, EC_LPC_ADDR_HOST_PACKET, ret, ec->dout);
248 ret = ec_lpc->write(ec_lpc, EC_LPC_ADDR_HOST_CMD, 1, &sum);
256 dev_warn(ec->dev, "EC response timed out\n");
257 ret = -EIO;
262 ret = ec_lpc->read(ec_lpc, EC_LPC_ADDR_HOST_DATA, 1, &sum);
265 msg->result = ret;
271 dout = (u8 *)&response;
272 ret = ec_lpc->read(ec_lpc, EC_LPC_ADDR_HOST_PACKET, sizeof(response),
273 dout);
278 msg->result = response.result;
280 if (response.data_len > msg->insize) {
281 dev_err(ec->dev,
283 response.data_len, msg->insize);
284 ret = -EMSGSIZE;
289 ret = ec_lpc->read(ec_lpc, EC_LPC_ADDR_HOST_PACKET +
291 msg->data);
297 dev_err(ec->dev,
300 ret = -EBADMSG;
313 struct cros_ec_lpc *ec_lpc = ec->priv;
318 if (msg->outsize > EC_PROTO2_MAX_PARAM_SIZE ||
319 msg->insize > EC_PROTO2_MAX_PARAM_SIZE) {
320 dev_err(ec->dev,
322 msg->outsize, msg->insize);
323 return -EINVAL;
328 args.command_version = msg->version;
329 args.data_size = msg->outsize;
332 sum = msg->command + args.flags + args.command_version + args.data_size;
335 ret = ec_lpc->write(ec_lpc, EC_LPC_ADDR_HOST_PARAM, msg->outsize,
336 msg->data);
343 ret = ec_lpc->write(ec_lpc, EC_LPC_ADDR_HOST_ARGS, sizeof(args),
349 sum = msg->command;
350 ret = ec_lpc->write(ec_lpc, EC_LPC_ADDR_HOST_CMD, 1, &sum);
358 dev_warn(ec->dev, "EC response timed out\n");
359 ret = -EIO;
364 ret = ec_lpc->read(ec_lpc, EC_LPC_ADDR_HOST_DATA, 1, &sum);
367 msg->result = ret;
373 ret = ec_lpc->read(ec_lpc, EC_LPC_ADDR_HOST_ARGS, sizeof(args), (u8 *)&args);
377 if (args.data_size > msg->insize) {
378 dev_err(ec->dev,
380 args.data_size, msg->insize);
381 ret = -ENOSPC;
386 sum = msg->command + args.flags + args.command_version + args.data_size;
389 ret = ec_lpc->read(ec_lpc, EC_LPC_ADDR_HOST_PARAM, args.data_size,
390 msg->data);
397 dev_err(ec->dev,
400 ret = -EBADMSG;
414 struct cros_ec_lpc *ec_lpc = ec->priv;
420 if (offset >= EC_MEMMAP_SIZE - bytes)
421 return -EINVAL;
425 ret = ec_lpc->read(ec_lpc, ec_lpc->mmio_memory_base + offset, bytes, s);
433 ret = ec_lpc->read(ec_lpc, ec_lpc->mmio_memory_base + i, 1, s);
451 ec_dev->last_event_time = cros_ec_get_time_ns();
454 dev_emerg(ec_dev->dev, "CrOS EC Panic Reported. Shutdown is imminent!");
455 blocking_notifier_call_chain(&ec_dev->panic_notifier, 0, ec_dev);
456 kobject_uevent_env(&ec_dev->dev->kobj, KOBJ_CHANGE, (char **)env);
458 __hw_protection_trigger("CrOS EC Panic", -1, HWPROT_ACT_SHUTDOWN);
463 if (value == ACPI_NOTIFY_CROS_EC_MKBP && ec_dev->mkbp_event_supported)
469 &ec_dev->event_notifier, 0,
501 switch (res->type) {
503 ec_lpc->mem32 = res->data.fixed_memory32;
513 struct device *dev = &pdev->dev;
525 return -ENOMEM;
527 ec_lpc->mmio_memory_base = EC_LPC_ADDR_MEMMAP;
534 quirks = driver_data->quirks;
540 ec_lpc->mmio_memory_base = driver_data->quirk_mmio_memory_base;
543 adev = cros_ec_lpc_get_device(driver_data->quirk_acpi_id);
546 driver_data->quirk_acpi_id);
547 return -ENODEV;
553 const char *name = driver_data->quirk_aml_mutex_name;
567 status = acpi_walk_resources(adev->handle, METHOD_NAME__CRS,
569 if (ACPI_SUCCESS(status) && ec_lpc->mem32.address_length) {
570 ec_lpc->base = devm_ioremap(dev,
571 ec_lpc->mem32.address,
572 ec_lpc->mem32.address_length);
573 if (!ec_lpc->base)
574 return -EINVAL;
576 ec_lpc->read = cros_ec_lpc_direct_read;
577 ec_lpc->write = cros_ec_lpc_direct_write;
580 if (!ec_lpc->read) {
582 * The Framework Laptop (and possibly other non-ChromeOS devices)
583 * only exposes the eight I/O ports that are required for the Microchip EC.
589 return -EBUSY;
601 ec_lpc->read = cros_ec_lpc_mec_read_bytes;
602 ec_lpc->write = cros_ec_lpc_mec_write_bytes;
604 ret = ec_lpc->read(ec_lpc, EC_LPC_ADDR_MEMMAP + EC_MEMMAP_ID, 2, buf);
608 if (!devm_request_region(dev, ec_lpc->mmio_memory_base, EC_MEMMAP_SIZE,
611 return -EBUSY;
614 /* Re-assign read/write operations for the non MEC variant */
615 ec_lpc->read = cros_ec_lpc_read_bytes;
616 ec_lpc->write = cros_ec_lpc_write_bytes;
617 ret = ec_lpc->read(ec_lpc, ec_lpc->mmio_memory_base + EC_MEMMAP_ID, 2,
623 return -ENODEV;
626 /* Reserve the remaining I/O ports required by the non-MEC protocol. */
628 EC_HOST_CMD_REGION_SIZE - EC_HOST_CMD_MEC_REGION_SIZE,
631 return -EBUSY;
636 return -EBUSY;
642 return -ENOMEM;
645 ec_dev->dev = dev;
646 ec_dev->phys_name = dev_name(dev);
647 ec_dev->cmd_xfer = cros_ec_cmd_xfer_lpc;
648 ec_dev->pkt_xfer = cros_ec_pkt_xfer_lpc;
649 ec_dev->cmd_readmem = cros_ec_lpc_readmem;
650 ec_dev->din_size = sizeof(struct ec_host_response) +
652 ec_dev->dout_size = sizeof(struct ec_host_request) + sizeof(struct ec_params_rwsig_action);
653 ec_dev->priv = ec_lpc;
661 ec_dev->irq = irq;
662 else if (irq != -ENXIO) {
678 status = acpi_install_notify_handler(adev->handle,
695 adev = ACPI_COMPANION(&pdev->dev);
697 acpi_remove_notify_handler(adev->handle, ACPI_ALL_NOTIFY,
746 /* x86-link, the Chromebook Pixel. */
753 /* x86-samus, the Chromebook Pixel 2. */
760 /* x86-peppy, the Acer C720 Chromebook. */
767 /* x86-glimmer, the Lenovo Thinkpad Yoga 11e. */
773 /* A small number of non-Chromebook/box machines also use the ChromeOS EC */
881 return -ENODEV;
893 platform_set_drvdata(&cros_ec_lpc_device, dmi_match->driver_data);