Lines Matching +full:pin +full:- +full:val
1 // SPDX-License-Identifier: GPL-2.0+
3 // Copyright (C) 2015-2017 Socionext Inc.
13 #include <linux/pinctrl/pinconf-generic.h>
19 #include "../pinctrl-utils.h"
20 #include "pinctrl-uniphier.h"
49 return priv->socdata->groups_count; in uniphier_pctl_get_groups_count()
57 return priv->socdata->groups[selector].name; in uniphier_pctl_get_group_name()
67 *pins = priv->socdata->groups[selector].pins; in uniphier_pctl_get_group_pins()
68 *num_pins = priv->socdata->groups[selector].num_pins; in uniphier_pctl_get_group_pins()
80 switch (uniphier_pin_get_pull_dir(desc->drv_data)) { in uniphier_pctl_pin_dbg_show()
100 switch (uniphier_pin_get_drv_type(desc->drv_data)) { in uniphier_pctl_pin_dbg_show()
150 unsigned int pin, unsigned int *reg, in uniphier_conf_get_drvctrl_data() argument
155 const struct pin_desc *desc = pin_desc_get(pctldev, pin); in uniphier_conf_get_drvctrl_data()
157 uniphier_pin_get_drv_type(desc->drv_data); in uniphier_conf_get_drvctrl_data()
192 /* drive strength control is not supported for this pin */ in uniphier_conf_get_drvctrl_data()
193 return -EINVAL; in uniphier_conf_get_drvctrl_data()
196 drvctrl = uniphier_pin_get_drvctrl(desc->drv_data); in uniphier_conf_get_drvctrl_data()
201 *mask = (1U << width) - 1; in uniphier_conf_get_drvctrl_data()
207 unsigned int pin, in uniphier_conf_pin_bias_get() argument
211 const struct pin_desc *desc = pin_desc_get(pctldev, pin); in uniphier_conf_pin_bias_get()
213 uniphier_pin_get_pull_dir(desc->drv_data); in uniphier_conf_pin_bias_get()
214 unsigned int pupdctrl, reg, shift, val; in uniphier_conf_pin_bias_get() local
224 return -EINVAL; in uniphier_conf_pin_bias_get()
231 return -EINVAL; in uniphier_conf_pin_bias_get()
237 return -EINVAL; in uniphier_conf_pin_bias_get()
243 pupdctrl = uniphier_pin_get_pupdctrl(desc->drv_data); in uniphier_conf_pin_bias_get()
248 ret = regmap_read(priv->regmap, reg, &val); in uniphier_conf_pin_bias_get()
252 val = (val >> shift) & 1; in uniphier_conf_pin_bias_get()
254 return (val == expected) ? 0 : -EINVAL; in uniphier_conf_pin_bias_get()
258 unsigned int pin, u32 *strength) in uniphier_conf_pin_drive_get() argument
261 unsigned int reg, shift, mask, val; in uniphier_conf_pin_drive_get() local
265 ret = uniphier_conf_get_drvctrl_data(pctldev, pin, ®, &shift, in uniphier_conf_pin_drive_get()
271 ret = regmap_read(priv->regmap, reg, &val); in uniphier_conf_pin_drive_get()
275 val = 0; in uniphier_conf_pin_drive_get()
278 *strength = strengths[(val >> shift) & mask]; in uniphier_conf_pin_drive_get()
284 unsigned int pin) in uniphier_conf_pin_input_enable_get() argument
287 const struct pin_desc *desc = pin_desc_get(pctldev, pin); in uniphier_conf_pin_input_enable_get()
288 unsigned int iectrl = uniphier_pin_get_iectrl(desc->drv_data); in uniphier_conf_pin_input_enable_get()
289 unsigned int reg, mask, val; in uniphier_conf_pin_input_enable_get() local
293 /* This pin is always input-enabled. */ in uniphier_conf_pin_input_enable_get()
296 if (priv->socdata->caps & UNIPHIER_PINCTRL_CAPS_PERPIN_IECTRL) in uniphier_conf_pin_input_enable_get()
297 iectrl = pin; in uniphier_conf_pin_input_enable_get()
302 ret = regmap_read(priv->regmap, reg, &val); in uniphier_conf_pin_input_enable_get()
306 return val & mask ? 0 : -EINVAL; in uniphier_conf_pin_input_enable_get()
310 unsigned pin, in uniphier_conf_pin_config_get() argument
322 ret = uniphier_conf_pin_bias_get(pctldev, pin, param); in uniphier_conf_pin_config_get()
325 ret = uniphier_conf_pin_drive_get(pctldev, pin, &arg); in uniphier_conf_pin_config_get()
329 ret = uniphier_conf_pin_input_enable_get(pctldev, pin); in uniphier_conf_pin_config_get()
333 ret = -EINVAL; in uniphier_conf_pin_config_get()
344 unsigned int pin, in uniphier_conf_pin_bias_set() argument
348 const struct pin_desc *desc = pin_desc_get(pctldev, pin); in uniphier_conf_pin_bias_set()
350 uniphier_pin_get_pull_dir(desc->drv_data); in uniphier_conf_pin_bias_set()
352 unsigned int val = 1; in uniphier_conf_pin_bias_set() local
360 dev_err(pctldev->dev, in uniphier_conf_pin_bias_set()
361 "can not disable pull register for pin %s\n", in uniphier_conf_pin_bias_set()
362 desc->name); in uniphier_conf_pin_bias_set()
363 return -EINVAL; in uniphier_conf_pin_bias_set()
365 val = 0; in uniphier_conf_pin_bias_set()
371 dev_err(pctldev->dev, in uniphier_conf_pin_bias_set()
372 "pull-up is unsupported for pin %s\n", in uniphier_conf_pin_bias_set()
373 desc->name); in uniphier_conf_pin_bias_set()
374 return -EINVAL; in uniphier_conf_pin_bias_set()
377 dev_err(pctldev->dev, "pull-up can not be total\n"); in uniphier_conf_pin_bias_set()
378 return -EINVAL; in uniphier_conf_pin_bias_set()
385 dev_err(pctldev->dev, in uniphier_conf_pin_bias_set()
386 "pull-down is unsupported for pin %s\n", in uniphier_conf_pin_bias_set()
387 desc->name); in uniphier_conf_pin_bias_set()
388 return -EINVAL; in uniphier_conf_pin_bias_set()
391 dev_err(pctldev->dev, "pull-down can not be total\n"); in uniphier_conf_pin_bias_set()
392 return -EINVAL; in uniphier_conf_pin_bias_set()
397 dev_err(pctldev->dev, in uniphier_conf_pin_bias_set()
398 "pull-up/down is unsupported for pin %s\n", in uniphier_conf_pin_bias_set()
399 desc->name); in uniphier_conf_pin_bias_set()
400 return -EINVAL; in uniphier_conf_pin_bias_set()
410 pupdctrl = uniphier_pin_get_pupdctrl(desc->drv_data); in uniphier_conf_pin_bias_set()
415 return regmap_update_bits(priv->regmap, reg, 1 << shift, val << shift); in uniphier_conf_pin_bias_set()
419 unsigned int pin, u32 strength) in uniphier_conf_pin_drive_set() argument
422 const struct pin_desc *desc = pin_desc_get(pctldev, pin); in uniphier_conf_pin_drive_set()
423 unsigned int reg, shift, mask, val; in uniphier_conf_pin_drive_set() local
427 ret = uniphier_conf_get_drvctrl_data(pctldev, pin, ®, &shift, in uniphier_conf_pin_drive_set()
430 dev_err(pctldev->dev, "cannot set drive strength for pin %s\n", in uniphier_conf_pin_drive_set()
431 desc->name); in uniphier_conf_pin_drive_set()
435 for (val = 0; val <= mask; val++) { in uniphier_conf_pin_drive_set()
436 if (strengths[val] > strength) in uniphier_conf_pin_drive_set()
440 if (val == 0) { in uniphier_conf_pin_drive_set()
441 dev_err(pctldev->dev, in uniphier_conf_pin_drive_set()
442 "unsupported drive strength %u mA for pin %s\n", in uniphier_conf_pin_drive_set()
443 strength, desc->name); in uniphier_conf_pin_drive_set()
444 return -EINVAL; in uniphier_conf_pin_drive_set()
450 val--; in uniphier_conf_pin_drive_set()
452 return regmap_update_bits(priv->regmap, reg, in uniphier_conf_pin_drive_set()
453 mask << shift, val << shift); in uniphier_conf_pin_drive_set()
457 unsigned int pin, u32 enable) in uniphier_conf_pin_input_enable() argument
460 const struct pin_desc *desc = pin_desc_get(pctldev, pin); in uniphier_conf_pin_input_enable()
461 unsigned int iectrl = uniphier_pin_get_iectrl(desc->drv_data); in uniphier_conf_pin_input_enable()
465 * Multiple pins share one input enable, per-pin disabling is in uniphier_conf_pin_input_enable()
468 if (!(priv->socdata->caps & UNIPHIER_PINCTRL_CAPS_PERPIN_IECTRL) && in uniphier_conf_pin_input_enable()
470 return -EINVAL; in uniphier_conf_pin_input_enable()
472 /* UNIPHIER_PIN_IECTRL_NONE means the pin is always input-enabled */ in uniphier_conf_pin_input_enable()
474 return enable ? 0 : -EINVAL; in uniphier_conf_pin_input_enable()
476 if (priv->socdata->caps & UNIPHIER_PINCTRL_CAPS_PERPIN_IECTRL) in uniphier_conf_pin_input_enable()
477 iectrl = pin; in uniphier_conf_pin_input_enable()
482 return regmap_update_bits(priv->regmap, reg, mask, enable ? mask : 0); in uniphier_conf_pin_input_enable()
486 unsigned pin, in uniphier_conf_pin_config_set() argument
502 ret = uniphier_conf_pin_bias_set(pctldev, pin, in uniphier_conf_pin_config_set()
506 ret = uniphier_conf_pin_drive_set(pctldev, pin, arg); in uniphier_conf_pin_config_set()
509 ret = uniphier_conf_pin_input_enable(pctldev, pin, arg); in uniphier_conf_pin_config_set()
512 dev_err(pctldev->dev, in uniphier_conf_pin_config_set()
515 return -EINVAL; in uniphier_conf_pin_config_set()
531 const unsigned *pins = priv->socdata->groups[selector].pins; in uniphier_conf_pin_config_group_set()
532 unsigned num_pins = priv->socdata->groups[selector].num_pins; in uniphier_conf_pin_config_group_set()
556 return priv->socdata->functions_count; in uniphier_pmx_get_functions_count()
564 return priv->socdata->functions[selector].name; in uniphier_pmx_get_function_name()
574 *groups = priv->socdata->functions[selector].groups; in uniphier_pmx_get_function_groups()
575 *num_groups = priv->socdata->functions[selector].num_groups; in uniphier_pmx_get_function_groups()
580 static int uniphier_pmx_set_one_mux(struct pinctrl_dev *pctldev, unsigned pin, in uniphier_pmx_set_one_mux() argument
588 /* some pins need input-enabling */ in uniphier_pmx_set_one_mux()
589 ret = uniphier_conf_pin_input_enable(pctldev, pin, 1); in uniphier_pmx_set_one_mux()
594 return 0; /* dedicated pin; nothing to do for pin-mux */ in uniphier_pmx_set_one_mux()
596 if (priv->socdata->caps & UNIPHIER_PINCTRL_CAPS_DBGMUX_SEPARATE) { in uniphier_pmx_set_one_mux()
616 reg = UNIPHIER_PINCTRL_PINMUX_BASE + pin * mux_bits / 32 * reg_stride; in uniphier_pmx_set_one_mux()
618 shift = pin * mux_bits % 32; in uniphier_pmx_set_one_mux()
619 mask = (1U << mux_bits) - 1; in uniphier_pmx_set_one_mux()
626 ret = regmap_update_bits(priv->regmap, reg, in uniphier_pmx_set_one_mux()
634 ret = regmap_write(priv->regmap, in uniphier_pmx_set_one_mux()
649 &priv->socdata->groups[group_selector]; in uniphier_pmx_set_mux()
653 for (i = 0; i < grp->num_pins; i++) { in uniphier_pmx_set_mux()
654 ret = uniphier_pmx_set_one_mux(pctldev, grp->pins[i], in uniphier_pmx_set_mux()
655 grp->muxvals[i]); in uniphier_pmx_set_mux()
671 if (range->pins) { in uniphier_pmx_gpio_request_enable()
672 for (i = 0; i < range->npins; i++) in uniphier_pmx_gpio_request_enable()
673 if (range->pins[i] == offset) in uniphier_pmx_gpio_request_enable()
676 if (WARN_ON(i == range->npins)) in uniphier_pmx_gpio_request_enable()
677 return -EINVAL; in uniphier_pmx_gpio_request_enable()
681 gpio_offset = offset - range->pin_base; in uniphier_pmx_gpio_request_enable()
684 gpio_offset += range->id; in uniphier_pmx_gpio_request_enable()
686 muxval = priv->socdata->get_gpio_muxval(offset, gpio_offset); in uniphier_pmx_gpio_request_enable()
707 list_for_each_entry(r, &priv->reg_regions, node) { in uniphier_pinctrl_suspend()
708 ret = regmap_bulk_read(priv->regmap, r->base, r->vals, in uniphier_pinctrl_suspend()
709 r->nregs); in uniphier_pinctrl_suspend()
723 list_for_each_entry(r, &priv->reg_regions, node) { in uniphier_pinctrl_resume()
724 ret = regmap_bulk_write(priv->regmap, r->base, r->vals, in uniphier_pinctrl_resume()
725 r->nregs); in uniphier_pinctrl_resume()
730 if (priv->socdata->caps & UNIPHIER_PINCTRL_CAPS_DBGMUX_SEPARATE) { in uniphier_pinctrl_resume()
731 ret = regmap_write(priv->regmap, in uniphier_pinctrl_resume()
757 return -ENOMEM; in uniphier_pinctrl_add_reg_region()
759 region->base = base; in uniphier_pinctrl_add_reg_region()
760 region->nregs = nregs; in uniphier_pinctrl_add_reg_region()
762 list_add_tail(®ion->node, &priv->reg_regions); in uniphier_pinctrl_add_reg_region()
772 const struct uniphier_pinctrl_socdata *socdata = priv->socdata; in uniphier_pinctrl_pm_init()
783 for (i = 0; i < socdata->npins; i++) { in uniphier_pinctrl_pm_init()
784 void *drv_data = socdata->pins[i].drv_data; in uniphier_pinctrl_pm_init()
811 if (socdata->caps & UNIPHIER_PINCTRL_CAPS_PERPIN_IECTRL) in uniphier_pinctrl_pm_init()
817 INIT_LIST_HEAD(&priv->reg_regions); in uniphier_pinctrl_pm_init()
821 socdata->npins, 8); in uniphier_pinctrl_pm_init()
866 struct device *dev = &pdev->dev; in uniphier_pinctrl_probe()
872 !socdata->pins || !socdata->npins || in uniphier_pinctrl_probe()
873 !socdata->groups || !socdata->groups_count || in uniphier_pinctrl_probe()
874 !socdata->functions || !socdata->functions_count) { in uniphier_pinctrl_probe()
876 return -EINVAL; in uniphier_pinctrl_probe()
881 return -ENOMEM; in uniphier_pinctrl_probe()
883 parent = of_get_parent(dev->of_node); in uniphier_pinctrl_probe()
884 priv->regmap = syscon_node_to_regmap(parent); in uniphier_pinctrl_probe()
887 if (IS_ERR(priv->regmap)) { in uniphier_pinctrl_probe()
889 return PTR_ERR(priv->regmap); in uniphier_pinctrl_probe()
892 priv->socdata = socdata; in uniphier_pinctrl_probe()
893 priv->pctldesc.name = dev->driver->name; in uniphier_pinctrl_probe()
894 priv->pctldesc.pins = socdata->pins; in uniphier_pinctrl_probe()
895 priv->pctldesc.npins = socdata->npins; in uniphier_pinctrl_probe()
896 priv->pctldesc.pctlops = &uniphier_pctlops; in uniphier_pinctrl_probe()
897 priv->pctldesc.pmxops = &uniphier_pmxops; in uniphier_pinctrl_probe()
898 priv->pctldesc.confops = &uniphier_confops; in uniphier_pinctrl_probe()
899 priv->pctldesc.owner = dev->driver->owner; in uniphier_pinctrl_probe()
905 priv->pctldev = devm_pinctrl_register(dev, &priv->pctldesc, priv); in uniphier_pinctrl_probe()
906 if (IS_ERR(priv->pctldev)) { in uniphier_pinctrl_probe()
908 return PTR_ERR(priv->pctldev); in uniphier_pinctrl_probe()